forked from OSchip/llvm-project
55 lines
1.9 KiB
Plaintext
55 lines
1.9 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer %s -o - | FileCheck %s
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---
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name: test_fexp_s32
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: test_fexp_s32
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[FEXP_:%[0-9]+]]:_(s32) = G_FEXP [[COPY]]
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; CHECK: $vgpr0 = COPY [[FEXP_]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = G_FEXP %0
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$vgpr0 = COPY %1
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...
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---
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name: test_fexp_v2s32
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; CHECK-LABEL: name: test_fexp_v2s32
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
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; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
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; CHECK: [[FEXP_:%[0-9]+]]:_(s32) = G_FEXP [[UV]]
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; CHECK: [[FEXP_1:%[0-9]+]]:_(s32) = G_FEXP [[UV1]]
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; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FEXP_]](s32), [[FEXP_1]](s32)
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; CHECK: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
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%0:_(<2 x s32>) = COPY $vgpr0_vgpr1
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%1:_(<2 x s32>) = G_FEXP %0
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: test_fexp_v3s32
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2
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; CHECK-LABEL: name: test_fexp_v3s32
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; CHECK: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
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; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)
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; CHECK: [[FEXP_:%[0-9]+]]:_(s32) = G_FEXP [[UV]]
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; CHECK: [[FEXP_1:%[0-9]+]]:_(s32) = G_FEXP [[UV1]]
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; CHECK: [[FEXP_2:%[0-9]+]]:_(s32) = G_FEXP [[UV2]]
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; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[FEXP_]](s32), [[FEXP_1]](s32), [[FEXP_2]](s32)
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; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)
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%0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
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%1:_(<3 x s32>) = G_FEXP %0
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$vgpr0_vgpr1_vgpr2 = COPY %1
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...
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