2020-06-05 03:31:28 +08:00
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# RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass si-fold-operands %s -o - | FileCheck -check-prefix=GCN %s
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AMDGPU: Avoid folding 2 constant operands into an SALU operation
Summary:
Catch the (admittedly unusual) case where SIFoldOperands attempts to fold 2
constant operands into the same SALU operation, with neither operand able to be
encoded as an inline constant.
Change-Id: Ibc48d662c9ffd8bbacd154976b0b1c257ace0927
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70896
2019-12-02 21:01:26 +08:00
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# GCN-LABEL: name: test_part_fold{{$}}
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# GCN: %2:sreg_32 = S_ADD_I32 70, %1
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---
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name: test_part_fold
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 70
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%1:sreg_32 = S_MOV_B32 80
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%2:sreg_32 = S_ADD_I32 %0, %1, implicit-def $scc
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...
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# GCN-LABEL: name: test_inline_const{{$}}
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# GCN: %2:sreg_32 = S_ADD_I32 70, 63
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---
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name: test_inline_const
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 70
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%1:sreg_32 = S_MOV_B32 63
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%2:sreg_32 = S_ADD_I32 %0, %1, implicit-def $scc
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...
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# GCN-LABEL: name: test_obscure{{$}}
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# GCN: %2:sreg_32 = S_LSHL2_ADD_U32 70, %1
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---
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name: test_obscure
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 70
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%1:sreg_32 = S_MOV_B32 80
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%2:sreg_32 = S_LSHL2_ADD_U32 %0, %1, implicit-def $scc
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...
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# GCN-LABEL: name: test_obscure_inline{{$}}
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# GCN: %2:sreg_32 = S_LSHL2_ADD_U32 70, 63
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---
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name: test_obscure_inline
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 70
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%1:sreg_32 = S_MOV_B32 63
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%2:sreg_32 = S_LSHL2_ADD_U32 %0, %1, implicit-def $scc
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...
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# GCN-LABEL: name: test_frameindex{{$}}
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# GCN: %1:sreg_32 = S_ADD_I32 %stack.0, %0
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---
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name: test_frameindex
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tracksRegLiveness: true
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stack:
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- { id: 0, type: default, offset: 0, size: 64, alignment: 16}
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 70
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%1:sreg_32 = S_ADD_I32 %stack.0, %0, implicit-def $scc
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...
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# GCN-LABEL: name: test_frameindex_inline{{$}}
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# GCN: %1:sreg_32 = S_ADD_I32 %stack.0, 63
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---
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name: test_frameindex_inline
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tracksRegLiveness: true
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stack:
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- { id: 0, type: default, offset: 0, size: 64, alignment: 16}
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body: |
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bb.0:
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%0:sreg_32 = S_MOV_B32 63
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%1:sreg_32 = S_ADD_I32 %stack.0, %0, implicit-def $scc
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...
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