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llvm-project/llvm/test/CodeGen/AMDGPU/fail-select-buffer-atomic-f...

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AMDGPU: Fix incorrect selection of buffer atomic fadd There were additional standalone patterns for these nodes which were missing the subtarget predicate.
2020-06-06 01:57:29 +08:00
; RUN: not --crash llc -march=amdgcn -mcpu=tahiti -o /dev/null %s 2>&1 | FileCheck -check-prefix=FAIL %s
; RUN: not --crash llc -march=amdgcn -mcpu=hawaii -o /dev/null %s 2>&1 | FileCheck -check-prefix=FAIL %s
; RUN: not --crash llc -march=amdgcn -mcpu=fiji -o /dev/null %s 2>&1 | FileCheck -check-prefix=FAIL %s
; RUN: not --crash llc -march=amdgcn -mcpu=gfx900 -o /dev/null %s 2>&1 | FileCheck -check-prefix=FAIL %s
; RUN: not --crash llc -march=amdgcn -mcpu=gfx1010 -o /dev/null %s 2>&1 | FileCheck -check-prefix=FAIL %s
; Make sure selection of these intrinsics fails on targets that do not
; have the instruction available.
; FIXME: Should also really make sure the v2f16 version fails.
[AMDGPU] Unify intrinsic ret/nortn interface We have a single noret intrinsic an a lot of special handling around it. Declare it just as any other but do not define rtn instructions itself instead. Differential Revision: https://reviews.llvm.org/D87719
2020-09-11 06:10:52 +08:00
; FAIL: LLVM ERROR: Cannot select: {{.+}}: f32,ch = BUFFER_ATOMIC_FADD
AMDGPU: Fix incorrect selection of buffer atomic fadd There were additional standalone patterns for these nodes which were missing the subtarget predicate.
2020-06-06 01:57:29 +08:00
define amdgpu_cs void @atomic_fadd(<4 x i32> inreg %arg0) {
[AMDGPU] Unify intrinsic ret/nortn interface We have a single noret intrinsic an a lot of special handling around it. Declare it just as any other but do not define rtn instructions itself instead. Differential Revision: https://reviews.llvm.org/D87719
2020-09-11 06:10:52 +08:00
%ret = call float @llvm.amdgcn.buffer.atomic.fadd.f32(float 1.0, <4 x i32> %arg0, i32 0, i32 112, i1 false)
AMDGPU: Fix incorrect selection of buffer atomic fadd There were additional standalone patterns for these nodes which were missing the subtarget predicate.
2020-06-06 01:57:29 +08:00
ret void
}
[AMDGPU] Unify intrinsic ret/nortn interface We have a single noret intrinsic an a lot of special handling around it. Declare it just as any other but do not define rtn instructions itself instead. Differential Revision: https://reviews.llvm.org/D87719
2020-09-11 06:10:52 +08:00
declare float @llvm.amdgcn.buffer.atomic.fadd.f32(float, <4 x i32>, i32, i32, i1 immarg) #0
AMDGPU: Fix incorrect selection of buffer atomic fadd There were additional standalone patterns for these nodes which were missing the subtarget predicate.
2020-06-06 01:57:29 +08:00
attributes #0 = { nounwind }