maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/llvm/test/MC/RISCV/rv32fc-valid.s

20 lines
671 B
ArmAsm
Raw Normal View History

[RISCV] Enable emission of alias instructions by default This patch switches the default for -riscv-no-aliases to false and updates all affected MC and CodeGen tests. As recommended in D41071, MC tests use the canonical instructions and the CodeGen tests use the aliases. Additionally, for the f and d instructions with rounding mode, the tests for the aliased versions are moved and tightened such that they can actually detect if alias emission is enabled. (see D40902 for context) Differential Revision: https://reviews.llvm.org/D41225 Patch by Mario Werner. llvm-svn: 320797
2017-12-15 17:47:01 +08:00
# RUN: llvm-mc %s -triple=riscv32 -mattr=+c,+f -riscv-no-aliases -show-encoding \
[RISCV] MC layer support for the remaining RVC instructions Differential Revision: https://reviews.llvm.org/D40003 Patch by Shiva Chen. llvm-svn: 320558
2017-12-13 17:32:55 +08:00
# RUN: | FileCheck -check-prefixes=CHECK,CHECK-INST %s
# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+c,+f < %s \
[RISCV] Enable emission of alias instructions by default This patch switches the default for -riscv-no-aliases to false and updates all affected MC and CodeGen tests. As recommended in D41071, MC tests use the canonical instructions and the CodeGen tests use the aliases. Additionally, for the f and d instructions with rounding mode, the tests for the aliased versions are moved and tightened such that they can actually detect if alias emission is enabled. (see D40902 for context) Differential Revision: https://reviews.llvm.org/D41225 Patch by Mario Werner. llvm-svn: 320797
2017-12-15 17:47:01 +08:00
# RUN: | llvm-objdump -mattr=+c,+f -riscv-no-aliases -d - \
# RUN: | FileCheck -check-prefix=CHECK-INST %s
[RISCV] MC layer support for the remaining RVC instructions Differential Revision: https://reviews.llvm.org/D40003 Patch by Shiva Chen. llvm-svn: 320558
2017-12-13 17:32:55 +08:00
# CHECK-INST: c.flwsp fs0, 252(sp)
# CHECK: encoding: [0x7e,0x74]
c.flwsp fs0, 252(sp)
# CHECK-INST: c.fswsp fa7, 252(sp)
# CHECK: encoding: [0xc6,0xff]
c.fswsp fa7, 252(sp)
# CHECK-INST: c.flw fa3, 124(a5)
# CHECK: encoding: [0xf4,0x7f]
c.flw fa3, 124(a5)
# CHECK-INST: c.fsw fa2, 124(a1)
# CHECK: encoding: [0xf0,0xfd]
c.fsw fa2, 124(a1)