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llvm-project/llvm/lib/Target/Hexagon/HexagonDepArch.td

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[Hexagon] Add support for Hexagon V65 llvm-svn: 320404
2017-12-12 02:57:54 +08:00
//===- HexagonDepArch.td --------------------------------------------------===//
[Hexagon] Replace instruction definitions with auto-generated ones llvm-svn: 294753
2017-02-10 23:33:13 +08:00
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
[Hexagon] Add support for Hexagon V65 llvm-svn: 320404
2017-12-12 02:57:54 +08:00
// Automatically generated file, please consult code owner before editing.
//===----------------------------------------------------------------------===//
[Hexagon] Replace instruction definitions with auto-generated ones llvm-svn: 294753
2017-02-10 23:33:13 +08:00
[Hexagon] Add support for Hexagon V65 llvm-svn: 320404
2017-12-12 02:57:54 +08:00
def ArchV65: SubtargetFeature<"v65", "HexagonArchVersion", "Hexagon::ArchEnum::V65", "Enable Hexagon V65 architecture">;
def HasV65T : Predicate<"HST->hasV65TOps()">, AssemblerPredicate<"ArchV65">;
[Hexagon] Update Hexagon ArchEnum and sync some downstream changes(NFC) Differential Revision: https://reviews.llvm.org/D38850 llvm-svn: 316099
2017-10-19 01:45:22 +08:00
def ArchV62: SubtargetFeature<"v62", "HexagonArchVersion", "Hexagon::ArchEnum::V62", "Enable Hexagon V62 architecture">;
[Hexagon] Introduce Hexagon V62 llvm-svn: 294805
2017-02-11 07:46:45 +08:00
def HasV62T : Predicate<"HST->hasV62TOps()">, AssemblerPredicate<"ArchV62">;
[Hexagon] Update Hexagon ArchEnum and sync some downstream changes(NFC) Differential Revision: https://reviews.llvm.org/D38850 llvm-svn: 316099
2017-10-19 01:45:22 +08:00
def ArchV60: SubtargetFeature<"v60", "HexagonArchVersion", "Hexagon::ArchEnum::V60", "Enable Hexagon V60 architecture">;
[Hexagon] Replace instruction definitions with auto-generated ones llvm-svn: 294753
2017-02-10 23:33:13 +08:00
def HasV60T : Predicate<"HST->hasV60TOps()">, AssemblerPredicate<"ArchV60">;
[Hexagon] Update Hexagon ArchEnum and sync some downstream changes(NFC) Differential Revision: https://reviews.llvm.org/D38850 llvm-svn: 316099
2017-10-19 01:45:22 +08:00
def ArchV55: SubtargetFeature<"v55", "HexagonArchVersion", "Hexagon::ArchEnum::V55", "Enable Hexagon V55 architecture">;
[Hexagon] Replace instruction definitions with auto-generated ones llvm-svn: 294753
2017-02-10 23:33:13 +08:00
def HasV55T : Predicate<"HST->hasV55TOps()">, AssemblerPredicate<"ArchV55">;
[Hexagon] Update Hexagon ArchEnum and sync some downstream changes(NFC) Differential Revision: https://reviews.llvm.org/D38850 llvm-svn: 316099
2017-10-19 01:45:22 +08:00
def ArchV4: SubtargetFeature<"v4", "HexagonArchVersion", "Hexagon::ArchEnum::V4", "Enable Hexagon V4 architecture">;
[Hexagon] Replace instruction definitions with auto-generated ones llvm-svn: 294753
2017-02-10 23:33:13 +08:00
def HasV4T : Predicate<"HST->hasV4TOps()">, AssemblerPredicate<"ArchV4">;
[Hexagon] Update Hexagon ArchEnum and sync some downstream changes(NFC) Differential Revision: https://reviews.llvm.org/D38850 llvm-svn: 316099
2017-10-19 01:45:22 +08:00
def ArchV5: SubtargetFeature<"v5", "HexagonArchVersion", "Hexagon::ArchEnum::V5", "Enable Hexagon V5 architecture">;
[Hexagon] Replace instruction definitions with auto-generated ones llvm-svn: 294753
2017-02-10 23:33:13 +08:00
def HasV5T : Predicate<"HST->hasV5TOps()">, AssemblerPredicate<"ArchV5">;