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llvm-project/llvm/test/CodeGen/Thumb2/tail-call-r9.ll

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ARM: R9 is not safe to use for tcGPR. Indirect tail-calls shouldn't use R9 for the branch destination, as it's not reliably a call-clobbered register. rdar://14793425 llvm-svn: 188967
2013-08-22 08:14:24 +08:00
; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-m3 | FileCheck %s
@foo = common global void ()* null, align 4
; Make sure in the presence of a tail call, r9 doesn't get used to hold
; the destination address. It's callee-saved in AAPCS.
define arm_aapcscc void @test(i32 %a) nounwind {
; CHECK-LABEL: test:
Fix broken CHECK lines. llvm-svn: 199016
2014-01-12 05:06:00 +08:00
; CHECK-NOT: bx r9
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%tmp = load void ()*, void ()** @foo, align 4
ARM: R9 is not safe to use for tcGPR. Indirect tail-calls shouldn't use R9 for the branch destination, as it's not reliably a call-clobbered register. rdar://14793425 llvm-svn: 188967
2013-08-22 08:14:24 +08:00
tail call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r12}"() nounwind
tail call arm_aapcscc void %tmp() nounwind
ret void
}