forked from OSchip/llvm-project
29 lines
1016 B
LLVM
29 lines
1016 B
LLVM
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; RUN: llc -O2 < %s | FileCheck %s
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target datalayout = "e-m:e-p:32:32-i1:32-i64:64-a:0-v32:32-n16:32"
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target triple = "hexagon"
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; Check that the two ":sat" instructions are in the same packet.
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; CHECK: foo
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; CHECK: {
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; CHECK: :sat
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; CHECK-NEXT: :sat
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target datalayout = "e-m:e-p:32:32-i1:32-i64:64-a:0-v32:32-n16:32"
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target triple = "hexagon"
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; Function Attrs: nounwind readnone
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define i32 @foo(i32 %Rs, i32 %Rt, i32 %Ru) #0 {
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entry:
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%0 = tail call i32 @llvm.hexagon.S2.asr.r.r.sat(i32 %Rs, i32 %Ru)
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%1 = tail call i32 @llvm.hexagon.S2.asr.r.r.sat(i32 %Rt, i32 %Ru)
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%add = add nsw i32 %1, %0
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ret i32 %add
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}
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; Function Attrs: nounwind readnone
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declare i32 @llvm.hexagon.S2.asr.r.r.sat(i32, i32) #1
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attributes #0 = { nounwind readnone "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #1 = { nounwind readnone }
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