2019-08-01 11:33:15 +08:00
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX6 %s
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# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX7 %s
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2019-09-16 22:14:40 +08:00
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX7 %s
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2019-08-01 11:33:15 +08:00
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# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
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2019-09-16 22:14:40 +08:00
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# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
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2019-08-01 11:33:15 +08:00
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---
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name: atomicrmw_fadd_s32_local
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; GFX6-LABEL: name: atomicrmw_fadd_s32_local
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; GFX6: liveins: $vgpr0, $vgpr1
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; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX6: $m0 = S_MOV_B32 -1
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; GFX6: [[DS_ADD_RTN_F32_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32 [[COPY]], [[COPY1]], 0, 0, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 3)
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; GFX6: $vgpr0 = COPY [[DS_ADD_RTN_F32_]]
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; GFX7-LABEL: name: atomicrmw_fadd_s32_local
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; GFX7: liveins: $vgpr0, $vgpr1
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; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX7: $m0 = S_MOV_B32 -1
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; GFX7: [[DS_ADD_RTN_F32_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32 [[COPY]], [[COPY1]], 0, 0, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 3)
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; GFX7: $vgpr0 = COPY [[DS_ADD_RTN_F32_]]
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; GFX9-LABEL: name: atomicrmw_fadd_s32_local
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; GFX9: liveins: $vgpr0, $vgpr1
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; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX9: [[DS_ADD_RTN_F32_gfx9_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32_gfx9 [[COPY]], [[COPY1]], 0, 0, implicit $exec :: (load store seq_cst 4, addrspace 3)
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; GFX9: $vgpr0 = COPY [[DS_ADD_RTN_F32_gfx9_]]
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%0:vgpr(p3) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s32) = G_ATOMICRMW_FADD %0(p3), %1 :: (load store seq_cst 4, addrspace 3)
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$vgpr0 = COPY %2
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...
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---
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name: atomicrmw_fadd_s32_local_noret
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; GFX6-LABEL: name: atomicrmw_fadd_s32_local_noret
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; GFX6: liveins: $vgpr0, $vgpr1
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; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX6: $m0 = S_MOV_B32 -1
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; GFX6: [[DS_ADD_RTN_F32_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32 [[COPY]], [[COPY1]], 0, 0, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 3)
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; GFX7-LABEL: name: atomicrmw_fadd_s32_local_noret
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; GFX7: liveins: $vgpr0, $vgpr1
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; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX7: $m0 = S_MOV_B32 -1
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; GFX7: [[DS_ADD_RTN_F32_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32 [[COPY]], [[COPY1]], 0, 0, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 3)
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; GFX9-LABEL: name: atomicrmw_fadd_s32_local_noret
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; GFX9: liveins: $vgpr0, $vgpr1
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; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX9: [[DS_ADD_RTN_F32_gfx9_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32_gfx9 [[COPY]], [[COPY1]], 0, 0, implicit $exec :: (load store seq_cst 4, addrspace 3)
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%0:vgpr(p3) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s32) = G_ATOMICRMW_FADD %0(p3), %1 :: (load store seq_cst 4, addrspace 3)
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...
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---
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name: atomicrmw_fadd_s32_local_gep4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; GFX6-LABEL: name: atomicrmw_fadd_s32_local_gep4
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; GFX6: liveins: $vgpr0, $vgpr1
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; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX6: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
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; GFX6: %3:vgpr_32, dead %5:sreg_64_xexec = V_ADD_I32_e64 [[COPY]], [[V_MOV_B32_e32_]], 0, implicit $exec
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; GFX6: $m0 = S_MOV_B32 -1
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; GFX6: [[DS_ADD_RTN_F32_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32 %3, [[COPY1]], 0, 0, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 3)
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; GFX6: $vgpr0 = COPY [[DS_ADD_RTN_F32_]]
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; GFX7-LABEL: name: atomicrmw_fadd_s32_local_gep4
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; GFX7: liveins: $vgpr0, $vgpr1
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; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX7: $m0 = S_MOV_B32 -1
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; GFX7: [[DS_ADD_RTN_F32_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32 [[COPY]], [[COPY1]], 4, 0, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 3)
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; GFX7: $vgpr0 = COPY [[DS_ADD_RTN_F32_]]
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; GFX9-LABEL: name: atomicrmw_fadd_s32_local_gep4
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; GFX9: liveins: $vgpr0, $vgpr1
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; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX9: [[DS_ADD_RTN_F32_gfx9_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32_gfx9 [[COPY]], [[COPY1]], 4, 0, implicit $exec :: (load store seq_cst 4, addrspace 3)
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; GFX9: $vgpr0 = COPY [[DS_ADD_RTN_F32_gfx9_]]
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%0:vgpr(p3) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s32) = G_CONSTANT i32 4
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[globalisel] Rename G_GEP to G_PTR_ADD
Summary:
G_GEP is rather poorly named. It's a simple pointer+scalar addition and
doesn't support any of the complexities of getelementptr. I therefore
propose that we rename it. There's a G_PTR_MASK so let's follow that
convention and go with G_PTR_ADD
Reviewers: volkan, aditya_nandakumar, bogner, rovka, arsenm
Subscribers: sdardis, jvesely, wdng, nhaehnle, hiraditya, jrtc27, atanasyan, arphaman, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69734
2019-11-02 04:18:00 +08:00
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%3:vgpr(p3) = G_PTR_ADD %0, %2
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2019-08-01 11:33:15 +08:00
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%4:vgpr(s32) = G_ATOMICRMW_FADD %3(p3), %1 :: (load store seq_cst 4, addrspace 3)
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$vgpr0 = COPY %4
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...
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