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llvm-project/clang/test/OpenMP/atomic_write_codegen.c

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[OpenMP] Ensure testing for versions 4.5 and default - Part 3 This third patch in the series removes version 5.0 string from test cases making them check for default version. It also add test cases for version 4.5. Reviewed By: ABataev Differential Revision: https://reviews.llvm.org/D85214
2020-08-28 03:35:36 +08:00
// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -x c -emit-llvm %s -o - | FileCheck %s
// RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s
// RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
[OPENMP] Support for -fopenmp-simd option with compilation of simd loops only. Added support for -fopenmp-simd option that allows compilation of simd-based constructs without emission of OpenMP runtime calls. llvm-svn: 321560
2017-12-30 02:07:07 +08:00
[OpenMP] Ensure testing for versions 4.5 and default - Part 3 This third patch in the series removes version 5.0 string from test cases making them check for default version. It also add test cases for version 4.5. Reviewed By: ABataev Differential Revision: https://reviews.llvm.org/D85214
2020-08-28 03:35:36 +08:00
// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
// RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s
// RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
[OPENMP] Support for -fopenmp-simd option with compilation of simd loops only. Added support for -fopenmp-simd option that allows compilation of simd-based constructs without emission of OpenMP runtime calls. llvm-svn: 321560
2017-12-30 02:07:07 +08:00
// SIMD-ONLY0-NOT: {{__kmpc|__tgt}}
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// expected-no-diagnostics
Revert "Revert r241620 and follow-up commits" and move the initialization of the llvm targets from clang/CodeGen into ClangCheck.cpp and CIndex.cpp. llvm-svn: 241653
2015-07-08 09:00:30 +08:00
// REQUIRES: x86-registered-target
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#ifndef HEADER
#define HEADER
_Bool bv, bx;
char cv, cx;
unsigned char ucv, ucx;
short sv, sx;
unsigned short usv, usx;
int iv, ix;
unsigned int uiv, uix;
long lv, lx;
unsigned long ulv, ulx;
long long llv, llx;
unsigned long long ullv, ullx;
float fv, fx;
double dv, dx;
long double ldv, ldx;
_Complex int civ, cix;
_Complex float cfv, cfx;
_Complex double cdv, cdx;
typedef int int4 __attribute__((__vector_size__(16)));
int4 int4x;
struct BitFields {
int : 32;
int a : 31;
} bfx;
struct BitFields_packed {
int : 32;
int a : 31;
} __attribute__ ((__packed__)) bfx_packed;
struct BitFields2 {
int : 31;
int a : 1;
} bfx2;
struct BitFields2_packed {
int : 31;
int a : 1;
} __attribute__ ((__packed__)) bfx2_packed;
struct BitFields3 {
int : 11;
int a : 14;
} bfx3;
struct BitFields3_packed {
int : 11;
int a : 14;
} __attribute__ ((__packed__)) bfx3_packed;
struct BitFields4 {
short : 16;
int a: 1;
long b : 7;
} bfx4;
struct BitFields4_packed {
short : 16;
int a: 1;
long b : 7;
} __attribute__ ((__packed__)) bfx4_packed;
typedef float float2 __attribute__((ext_vector_type(2)));
float2 float2x;
Produce a better diagnostic for global register variables. Currently, when there is a global register variable in a program that is bound to an invalid register, clang/llvm prints an error message that is not very user-friendly. This commit improves the diagnostic and moves the check that used to be in the backend to Sema. In addition, it makes changes to error out if the size of the register doesn't match the declared variable size. e.g., volatile register int B asm ("rbp"); rdar://problem/23084219 Differential Revision: http://reviews.llvm.org/D13834 llvm-svn: 253405
2015-11-18 08:15:28 +08:00
// Register "0" is currently an invalid register for global register variables.
// Use "esp" instead of "0".
// register int rix __asm__("0");
register int rix __asm__("esp");
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
Use functions with prototypes when appropriate; NFC A significant number of our tests in C accidentally use functions without prototypes. This patch converts the function signatures to have a prototype for the situations where the test is not specific to K&R C declarations. e.g., void func(); becomes void func(void); This is the seventh batch of tests being updated (there are a significant number of other tests left to be updated).
2022-02-11 05:04:13 +08:00
int main(void) {
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i32 1, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @civ, i32 0, i32 1) monotonic, align 4
[OPENMP] Fixed codegen for __real/__imag expressions in atomic constructs. For __real/__imag unary expressions clang emits lvalue with the associated type from the original complex expression, but not the underlying builtin integer or float type. This causes crash in codegen for atomic constructs, if __real/__imag expression are used in atomic constructs. llvm-svn: 286129
2016-11-08 02:15:02 +08:00
#pragma omp atomic write
__imag(civ) = 1;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i8, i8*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i8 {{.*}} monotonic, align 1
[OPENMP50]Add restrictions for memory order clauses in atomic directive. Added restrictions for atomic directive. 1. If atomic-clause is read then memory-order-clause must not be acq_rel or release. 2. If atomic-clause is write then memory-order-clause must not be acq_rel or acquire. 3. If atomic-clause is update or not present then memory-order-clause must not be acq_rel or acquire.
2020-02-11 22:35:52 +08:00
#pragma omp atomic write
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
bx = bv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i8, i8*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i8 {{.*}} release, align 1
[OPENMP50]Add support for 'release' clause. Added full support for 'release' clause in flush|atomic directives.
2020-02-11 04:49:05 +08:00
#pragma omp atomic write release
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
cx = cv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i8, i8*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i8 {{.*}} monotonic, align 1
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
ucx = ucv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i16, i16*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i16 {{.*}} monotonic, align 2
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
sx = sv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i16, i16*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i16 {{.*}} monotonic, align 2
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
usx = usv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i32, i32*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i32 {{.*}} monotonic, align 4
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
ix = iv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i32, i32*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i32 {{.*}} monotonic, align 4
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
uix = uiv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i64, i64*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i64 {{.*}} monotonic, align 8
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
lx = lv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i64, i64*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i64 {{.*}} monotonic, align 8
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
ulx = ulv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i64, i64*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i64 {{.*}} monotonic, align 8
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
llx = llv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i64, i64*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i64 {{.*}} monotonic, align 8
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
ullx = ullv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load float, float*
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: bitcast float {{.*}} to i32
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i32 {{.*}}, i32* bitcast (float* {{.*}} monotonic, align 4
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
fx = fv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load double, double*
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: bitcast double {{.*}} to i64
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i64 {{.*}}, i64* bitcast (double* {{.*}} monotonic, align 8
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
dx = dv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: [[LD:%.+]] = load x86_fp80, x86_fp80*
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[LDTEMP:%.*]] to i8*
Change memcpy/memove/memset to have dest and source alignment attributes (Step 1). Summary: Upstream LLVM is changing the the prototypes of the @llvm.memcpy/memmove/memset intrinsics. This change updates the Clang tests for this change. The @llvm.memcpy/memmove/memset intrinsics currently have an explicit argument which is required to be a constant integer. It represents the alignment of the dest (and source), and so must be the minimum of the actual alignment of the two. This change removes the alignment argument in favour of placing the alignment attribute on the source and destination pointers of the memory intrinsic call. For example, code which used to read: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 100, i32 4, i1 false) will now read call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %dest, i8* align 4 %src, i32 100, i1 false) At this time the source and destination alignments must be the same (Step 1). Step 2 of the change, to be landed shortly, will relax that contraint and allow the source and destination to have different alignments. llvm-svn: 322964
2018-01-20 01:12:54 +08:00
// CHECK: call void @llvm.memset.p0i8.i64(i8* align 16 [[BITCAST]], i8 0, i64 16, i1 false)
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: store x86_fp80 [[LD]], x86_fp80* [[LDTEMP]]
// CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[LDTEMP:%.*]] to i128*
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: [[LD:%.+]] = load i128, i128* [[BITCAST]]
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i128 [[LD]], i128* bitcast (x86_fp80* {{.*}} monotonic, align 16
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
ldx = ldv;
Test case updates for explicit type parameter to the gep operator llvm-svn: 232187
2015-03-14 02:21:46 +08:00
// CHECK: [[REAL_VAL:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.*}}, i32 0, i32 0)
// CHECK: [[IMG_VAL:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.*}}, i32 0, i32 1)
Update Clang tests to handle explicitly typed gep changes in LLVM. llvm-svn: 230783
2015-02-28 03:18:17 +08:00
// CHECK: [[TEMP_REAL_REF:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[TEMP:%.+]], i32 0, i32 0
// CHECK: [[TEMP_IMG_REF:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[TEMP]], i32 0, i32 1
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: store i32 [[REAL_VAL]], i32* [[TEMP_REAL_REF]]
// CHECK: store i32 [[IMG_VAL]], i32* [[TEMP_IMG_REF]]
// CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[TEMP]] to i8*
[Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default Turning on `enable_noundef_analysis` flag allows better codegen by removing freeze instructions. I modified clang by renaming `enable_noundef_analysis` flag to `disable-noundef-analysis` and turning it off by default. Test updates are made as a separate patch: D108453 Reviewed By: eugenis Differential Revision: https://reviews.llvm.org/D105169
2022-01-16 17:53:11 +08:00
// CHECK: call void @__atomic_store(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* @{{.*}} to i8*), i8* noundef [[BITCAST]], i32 noundef 0)
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
cix = civ;
Test case updates for explicit type parameter to the gep operator llvm-svn: 232187
2015-03-14 02:21:46 +08:00
// CHECK: [[REAL_VAL:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.*}}, i32 0, i32 0)
// CHECK: [[IMG_VAL:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.*}}, i32 0, i32 1)
Update Clang tests to handle explicitly typed gep changes in LLVM. llvm-svn: 230783
2015-02-28 03:18:17 +08:00
// CHECK: [[TEMP_REAL_REF:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[TEMP:%.+]], i32 0, i32 0
// CHECK: [[TEMP_IMG_REF:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[TEMP]], i32 0, i32 1
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: store float [[REAL_VAL]], float* [[TEMP_REAL_REF]]
// CHECK: store float [[IMG_VAL]], float* [[TEMP_IMG_REF]]
// CHECK: [[BITCAST:%.+]] = bitcast { float, float }* [[TEMP]] to i8*
[Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default Turning on `enable_noundef_analysis` flag allows better codegen by removing freeze instructions. I modified clang by renaming `enable_noundef_analysis` flag to `disable-noundef-analysis` and turning it off by default. Test updates are made as a separate patch: D108453 Reviewed By: eugenis Differential Revision: https://reviews.llvm.org/D105169
2022-01-16 17:53:11 +08:00
// CHECK: call void @__atomic_store(i64 noundef 8, i8* noundef bitcast ({ float, float }* @{{.*}} to i8*), i8* noundef [[BITCAST]], i32 noundef 0)
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
cfx = cfv;
Test case updates for explicit type parameter to the gep operator llvm-svn: 232187
2015-03-14 02:21:46 +08:00
// CHECK: [[REAL_VAL:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.*}}, i32 0, i32 0)
// CHECK: [[IMG_VAL:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.*}}, i32 0, i32 1)
Update Clang tests to handle explicitly typed gep changes in LLVM. llvm-svn: 230783
2015-02-28 03:18:17 +08:00
// CHECK: [[TEMP_REAL_REF:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[TEMP:%.+]], i32 0, i32 0
// CHECK: [[TEMP_IMG_REF:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[TEMP]], i32 0, i32 1
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: store double [[REAL_VAL]], double* [[TEMP_REAL_REF]]
// CHECK: store double [[IMG_VAL]], double* [[TEMP_IMG_REF]]
// CHECK: [[BITCAST:%.+]] = bitcast { double, double }* [[TEMP]] to i8*
[Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default Turning on `enable_noundef_analysis` flag allows better codegen by removing freeze instructions. I modified clang by renaming `enable_noundef_analysis` flag to `disable-noundef-analysis` and turning it off by default. Test updates are made as a separate patch: D108453 Reviewed By: eugenis Differential Revision: https://reviews.llvm.org/D105169
2022-01-16 17:53:11 +08:00
// CHECK: call void @__atomic_store(i64 noundef 16, i8* noundef bitcast ({ double, double }* @{{.*}} to i8*), i8* noundef [[BITCAST]], i32 noundef 5)
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: call{{.*}} @__kmpc_flush(
#pragma omp atomic seq_cst write
cdx = cdv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i8, i8*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i64 {{.*}} monotonic, align 8
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
ulx = bv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i8, i8*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i8 {{.*}} monotonic, align 1
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
bx = cv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i8, i8*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i8 {{.*}} seq_cst, align 1
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: call{{.*}} @__kmpc_flush(
#pragma omp atomic write, seq_cst
cx = ucv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i16, i16*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i64 {{.*}} monotonic, align 8
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
ulx = sv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i16, i16*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i64 {{.*}} monotonic, align 8
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
lx = usv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i32, i32*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i32 {{.*}} seq_cst, align 4
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: call{{.*}} @__kmpc_flush(
#pragma omp atomic seq_cst, write
uix = iv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i32, i32*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i32 {{.*}} monotonic, align 4
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
ix = uiv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i64, i64*
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[VAL:%.+]] = trunc i64 %{{.*}} to i32
Update Clang tests to handle explicitly typed gep changes in LLVM. llvm-svn: 230783
2015-02-28 03:18:17 +08:00
// CHECK: [[TEMP_REAL_REF:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[TEMP:%.+]], i32 0, i32 0
// CHECK: [[TEMP_IMG_REF:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[TEMP]], i32 0, i32 1
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: store i32 [[VAL]], i32* [[TEMP_REAL_REF]]
// CHECK: store i32 0, i32* [[TEMP_IMG_REF]]
// CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[TEMP]] to i8*
[Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default Turning on `enable_noundef_analysis` flag allows better codegen by removing freeze instructions. I modified clang by renaming `enable_noundef_analysis` flag to `disable-noundef-analysis` and turning it off by default. Test updates are made as a separate patch: D108453 Reviewed By: eugenis Differential Revision: https://reviews.llvm.org/D105169
2022-01-16 17:53:11 +08:00
// CHECK: call void @__atomic_store(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* @{{.+}} to i8*), i8* noundef [[BITCAST]], i32 noundef 0)
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
cix = lv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i64, i64*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i32 %{{.+}}, i32* bitcast (float* {{.*}} monotonic, align 4
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
fx = ulv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i64, i64*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i64 %{{.+}}, i64* bitcast (double* {{.*}} monotonic, align 8
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
dx = llv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i64, i64*
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[VAL:%.+]] = uitofp i64 %{{.+}} to x86_fp80
// CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i8*
Change memcpy/memove/memset to have dest and source alignment attributes (Step 1). Summary: Upstream LLVM is changing the the prototypes of the @llvm.memcpy/memmove/memset intrinsics. This change updates the Clang tests for this change. The @llvm.memcpy/memmove/memset intrinsics currently have an explicit argument which is required to be a constant integer. It represents the alignment of the dest (and source), and so must be the minimum of the actual alignment of the two. This change removes the alignment argument in favour of placing the alignment attribute on the source and destination pointers of the memory intrinsic call. For example, code which used to read: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 100, i32 4, i1 false) will now read call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %dest, i8* align 4 %src, i32 100, i1 false) At this time the source and destination alignments must be the same (Step 1). Step 2 of the change, to be landed shortly, will relax that contraint and allow the source and destination to have different alignments. llvm-svn: 322964
2018-01-20 01:12:54 +08:00
// CHECK: call void @llvm.memset.p0i8.i64(i8* align 16 [[BITCAST]], i8 0, i64 16, i1 false)
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: store x86_fp80 [[VAL]], x86_fp80* [[TEMP]]
// CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[TEMP]] to i128*
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: [[VAL:%.+]] = load i128, i128* [[BITCAST]]
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i128 [[VAL]], i128* bitcast (x86_fp80* {{.*}} monotonic, align 16
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
ldx = ullv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load float, float*
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[VAL:%.+]] = fptosi float %{{.*}} to i32
Update Clang tests to handle explicitly typed gep changes in LLVM. llvm-svn: 230783
2015-02-28 03:18:17 +08:00
// CHECK: [[TEMP_REAL_REF:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[TEMP:%.+]], i32 0, i32 0
// CHECK: [[TEMP_IMG_REF:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[TEMP]], i32 0, i32 1
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: store i32 [[VAL]], i32* [[TEMP_REAL_REF]]
// CHECK: store i32 0, i32* [[TEMP_IMG_REF]]
// CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[TEMP]] to i8*
[Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default Turning on `enable_noundef_analysis` flag allows better codegen by removing freeze instructions. I modified clang by renaming `enable_noundef_analysis` flag to `disable-noundef-analysis` and turning it off by default. Test updates are made as a separate patch: D108453 Reviewed By: eugenis Differential Revision: https://reviews.llvm.org/D105169
2022-01-16 17:53:11 +08:00
// CHECK: call void @__atomic_store(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* @{{.+}} to i8*), i8* noundef [[BITCAST]], i32 noundef 0)
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
cix = fv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load double, double*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i16 {{.*}} monotonic, align 2
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
sx = dv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load x86_fp80, x86_fp80*
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i8 {{.*}} monotonic, align 1
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
bx = ldv;
Test case updates for explicit type parameter to the gep operator llvm-svn: 232187
2015-03-14 02:21:46 +08:00
// CHECK: load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0)
// CHECK: load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1)
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: icmp ne i32 %{{.+}}, 0
// CHECK: icmp ne i32 %{{.+}}, 0
// CHECK: or i1
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i8 {{.*}} monotonic, align 1
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
bx = civ;
Test case updates for explicit type parameter to the gep operator llvm-svn: 232187
2015-03-14 02:21:46 +08:00
// CHECK: load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.*}}, i32 0, i32 0)
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i16 {{.*}} monotonic, align 2
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
usx = cfv;
Test case updates for explicit type parameter to the gep operator llvm-svn: 232187
2015-03-14 02:21:46 +08:00
// CHECK: load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 0)
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i64 {{.*}} monotonic, align 8
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
#pragma omp atomic write
llx = cdv;
[OPENMP] Fix for failed tests for 'omp atomic write' construct. llvm-svn: 235576
2015-04-23 15:56:25 +08:00
// CHECK-DAG: [[IDX:%.+]] = load i16, i16* @{{.+}}
// CHECK-DAG: load i8, i8*
// CHECK-DAG: [[VEC_ITEM_VAL:%.+]] = zext i1 %{{.+}} to i32
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[I128VAL:%.+]] = load atomic i128, i128* bitcast (<4 x i32>* [[DEST:@.+]] to i128*) monotonic, align 16
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: br label %[[CONT:.+]]
// CHECK: [[CONT]]
[OPENMP] Fixed bug in atomic update/capture/write constructs. Fixed a bug with codegen for destination atomic l-value with padding and junk in this padding bytes. llvm-svn: 237422
2015-05-15 16:36:34 +08:00
// CHECK: [[OLD_I128:%.+]] = phi i128 [ [[I128VAL]], %{{.+}} ], [ [[FAILED_I128_OLD_VAL:%.+]], %[[CONT]] ]
// CHECK: [[BITCAST:%.+]] = bitcast <4 x i32>* [[LDTEMP:%.+]] to i128*
// CHECK: store i128 [[OLD_I128]], i128* [[BITCAST]],
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[LDTEMP]]
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <4 x i32> [[VEC_VAL]], i32 [[VEC_ITEM_VAL]], i16 [[IDX]]
// CHECK: store <4 x i32> [[NEW_VEC_VAL]], <4 x i32>* [[LDTEMP]]
[OPENMP] Fixed bug in atomic update/capture/write constructs. Fixed a bug with codegen for destination atomic l-value with padding and junk in this padding bytes. llvm-svn: 237422
2015-05-15 16:36:34 +08:00
// CHECK: [[NEW_I128:%.+]] = load i128, i128* [[BITCAST]]
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (<4 x i32>* [[DEST]] to i128*), i128 [[OLD_I128]], i128 [[NEW_I128]] monotonic monotonic, align 16
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[FAILED_I128_OLD_VAL:%.+]] = extractvalue { i128, i1 } [[RES]], 0
// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i128, i1 } [[RES]], 1
[OPENMP] Fixed bug in codegen of 'atomic write'. Fixed codegen for exit/continue order after success/failed atomic cmpxchg instruction for 'atomic write' construct. llvm-svn: 232712
2015-03-19 16:44:10 +08:00
// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[EXIT]]
#pragma omp atomic write
int4x[sv] = bv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load x86_fp80, x86_fp80* @{{.+}}
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i32
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*) monotonic, align 4
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: br label %[[CONT:.+]]
// CHECK: [[CONT]]
// CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
// CHECK: [[BF_VALUE:%.+]] = and i32 [[NEW_VAL]], 2147483647
// CHECK: [[BF_CLEAR:%.+]] = and i32 %{{.+}}, -2147483648
// CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
// CHECK: store i32 %{{.+}}, i32* [[LDTEMP:%.+]]
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[LDTEMP]]
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0
// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1
[OPENMP] Fixed bug in codegen of 'atomic write'. Fixed codegen for exit/continue order after success/failed atomic cmpxchg instruction for 'atomic write' construct. llvm-svn: 232712
2015-03-19 16:44:10 +08:00
// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[EXIT]]
#pragma omp atomic write
bfx.a = ldv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load x86_fp80, x86_fp80* @{{.+}}
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i32
// CHECK: [[BITCAST:%.+]] = bitcast i32* [[LDTEMP:%.+]] to i8*
[Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default Turning on `enable_noundef_analysis` flag allows better codegen by removing freeze instructions. I modified clang by renaming `enable_noundef_analysis` flag to `disable-noundef-analysis` and turning it off by default. Test updates are made as a separate patch: D108453 Reviewed By: eugenis Differential Revision: https://reviews.llvm.org/D105169
2022-01-16 17:53:11 +08:00
// CHECK: call void @__atomic_load(i64 noundef 4, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* noundef [[BITCAST]], i32 noundef 0)
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: br label %[[CONT:.+]]
// CHECK: [[CONT]]
[OPENMP] Fixed bug in atomic update/capture/write constructs. Fixed a bug with codegen for destination atomic l-value with padding and junk in this padding bytes. llvm-svn: 237422
2015-05-15 16:36:34 +08:00
// CHECK: [[OLD_BF_VALUE:%.+]] = load i32, i32* [[LDTEMP]],
// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[LDTEMP1:%.+]],
// CHECK: [[OLD_BF_VALUE:%.+]] = load i32, i32* [[LDTEMP1]],
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[BF_VALUE:%.+]] = and i32 [[NEW_VAL]], 2147483647
[OPENMP] Fixed bug in atomic update/capture/write constructs. Fixed a bug with codegen for destination atomic l-value with padding and junk in this padding bytes. llvm-svn: 237422
2015-05-15 16:36:34 +08:00
// CHECK: [[BF_CLEAR:%.+]] = and i32 [[OLD_BF_VALUE]], -2147483648
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
[OPENMP] Fixed bug in atomic update/capture/write constructs. Fixed a bug with codegen for destination atomic l-value with padding and junk in this padding bytes. llvm-svn: 237422
2015-05-15 16:36:34 +08:00
// CHECK: store i32 %{{.+}}, i32* [[LDTEMP1]]
// CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP]] to i8*
// CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP1]] to i8*
[Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default Turning on `enable_noundef_analysis` flag allows better codegen by removing freeze instructions. I modified clang by renaming `enable_noundef_analysis` flag to `disable-noundef-analysis` and turning it off by default. Test updates are made as a separate patch: D108453 Reviewed By: eugenis Differential Revision: https://reviews.llvm.org/D105169
2022-01-16 17:53:11 +08:00
// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 4, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* noundef [[BITCAST_TEMP_OLD_BF_ADDR]], i8* noundef [[BITCAST_TEMP_NEW_BF_ADDR]], i32 noundef 0, i32 noundef 0)
[OPENMP] Fixed bug in codegen of 'atomic write'. Fixed codegen for exit/continue order after success/failed atomic cmpxchg instruction for 'atomic write' construct. llvm-svn: 232712
2015-03-19 16:44:10 +08:00
// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[EXIT]]
#pragma omp atomic write
bfx_packed.a = ldv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load x86_fp80, x86_fp80* @{{.+}}
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i32
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0) monotonic, align 4
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: br label %[[CONT:.+]]
// CHECK: [[CONT]]
// CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
// CHECK: [[BF_AND:%.+]] = and i32 [[NEW_VAL]], 1
// CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 31
// CHECK: [[BF_CLEAR:%.+]] = and i32 %{{.+}}, 2147483647
// CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
// CHECK: store i32 %{{.+}}, i32* [[LDTEMP:%.+]]
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[LDTEMP]]
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0
// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1
[OPENMP] Fixed bug in codegen of 'atomic write'. Fixed codegen for exit/continue order after success/failed atomic cmpxchg instruction for 'atomic write' construct. llvm-svn: 232712
2015-03-19 16:44:10 +08:00
// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[EXIT]]
#pragma omp atomic write
bfx2.a = ldv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load x86_fp80, x86_fp80* @{{.+}}
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i32
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3) monotonic, align 1
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: br label %[[CONT:.+]]
// CHECK: [[CONT]]
// CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
// CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i8
// CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 1
// CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 7
// CHECK: [[BF_CLEAR:%.+]] = and i8 %{{.+}}, 127
// CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]]
// CHECK: store i8 %{{.+}}, i8* [[LDTEMP:%.+]]
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[LDTEMP]]
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0
// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1
[OPENMP] Fixed bug in codegen of 'atomic write'. Fixed codegen for exit/continue order after success/failed atomic cmpxchg instruction for 'atomic write' construct. llvm-svn: 232712
2015-03-19 16:44:10 +08:00
// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[EXIT]]
#pragma omp atomic write
bfx2_packed.a = ldv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load x86_fp80, x86_fp80* @{{.+}}
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i32
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0) monotonic, align 4
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: br label %[[CONT:.+]]
// CHECK: [[CONT]]
// CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
// CHECK: [[BF_AND:%.+]] = and i32 [[NEW_VAL]], 16383
// CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 11
// CHECK: [[BF_CLEAR:%.+]] = and i32 %{{.+}}, -33552385
// CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
// CHECK: store i32 %{{.+}}, i32* [[LDTEMP:%.+]]
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[LDTEMP]]
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0
// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1
[OPENMP] Fixed bug in codegen of 'atomic write'. Fixed codegen for exit/continue order after success/failed atomic cmpxchg instruction for 'atomic write' construct. llvm-svn: 232712
2015-03-19 16:44:10 +08:00
// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[EXIT]]
#pragma omp atomic write
bfx3.a = ldv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load x86_fp80, x86_fp80* @{{.+}}
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i32
// CHECK: [[LDTEMP:%.+]] = bitcast i32* %{{.+}} to i24*
// CHECK: [[BITCAST:%.+]] = bitcast i24* %{{.+}} to i8*
[Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default Turning on `enable_noundef_analysis` flag allows better codegen by removing freeze instructions. I modified clang by renaming `enable_noundef_analysis` flag to `disable-noundef-analysis` and turning it off by default. Test updates are made as a separate patch: D108453 Reviewed By: eugenis Differential Revision: https://reviews.llvm.org/D105169
2022-01-16 17:53:11 +08:00
// CHECK: call void @__atomic_load(i64 noundef 3, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* noundef [[BITCAST]], i32 noundef 0)
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: br label %[[CONT:.+]]
// CHECK: [[CONT]]
[OPENMP] Fixed bug in atomic update/capture/write constructs. Fixed a bug with codegen for destination atomic l-value with padding and junk in this padding bytes. llvm-svn: 237422
2015-05-15 16:36:34 +08:00
// CHECK: [[OLD_VAL:%.+]] = load i24, i24* %{{.+}},
// CHECK: store i24 [[OLD_VAL]], i24* [[TEMP:%.+]],
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i24
// CHECK: [[BF_AND:%.+]] = and i24 [[TRUNC]], 16383
// CHECK: [[BF_VALUE:%.+]] = shl i24 [[BF_AND]], 3
// CHECK: [[BF_CLEAR:%.+]] = and i24 %{{.+}}, -131065
// CHECK: or i24 [[BF_CLEAR]], [[BF_VALUE]]
[OPENMP] Fixed bug in atomic update/capture/write constructs. Fixed a bug with codegen for destination atomic l-value with padding and junk in this padding bytes. llvm-svn: 237422
2015-05-15 16:36:34 +08:00
// CHECK: store i24 %{{.+}}, i24* [[TEMP]]
// CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i24* [[LDTEMP]] to i8*
// CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i24* [[TEMP]] to i8*
[Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default Turning on `enable_noundef_analysis` flag allows better codegen by removing freeze instructions. I modified clang by renaming `enable_noundef_analysis` flag to `disable-noundef-analysis` and turning it off by default. Test updates are made as a separate patch: D108453 Reviewed By: eugenis Differential Revision: https://reviews.llvm.org/D105169
2022-01-16 17:53:11 +08:00
// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 3, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* noundef [[BITCAST_TEMP_OLD_BF_ADDR]], i8* noundef [[BITCAST_TEMP_NEW_BF_ADDR]], i32 noundef 0, i32 noundef 0)
[OPENMP] Fixed bug in codegen of 'atomic write'. Fixed codegen for exit/continue order after success/failed atomic cmpxchg instruction for 'atomic write' construct. llvm-svn: 232712
2015-03-19 16:44:10 +08:00
// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[EXIT]]
#pragma omp atomic write
bfx3_packed.a = ldv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load x86_fp80, x86_fp80* @{{.+}}
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i32
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic, align 8
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: br label %[[CONT:.+]]
// CHECK: [[CONT]]
// CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
// CHECK: [[ZEXT:%.+]] = zext i32 [[NEW_VAL]] to i64
// CHECK: [[BF_AND:%.+]] = and i64 [[ZEXT]], 1
// CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND]], 16
// CHECK: [[BF_CLEAR:%.+]] = and i64 %{{.+}}, -65537
// CHECK: or i64 [[BF_CLEAR]], [[BF_VALUE]]
// CHECK: store i64 %{{.+}}, i64* [[LDTEMP:%.+]]
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[LDTEMP]]
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic, align 8
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0
// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1
[OPENMP] Fixed bug in codegen of 'atomic write'. Fixed codegen for exit/continue order after success/failed atomic cmpxchg instruction for 'atomic write' construct. llvm-svn: 232712
2015-03-19 16:44:10 +08:00
// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[EXIT]]
#pragma omp atomic write
bfx4.a = ldv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load x86_fp80, x86_fp80* @{{.+}}
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i32
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) monotonic, align 1
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: br label %[[CONT:.+]]
// CHECK: [[CONT]]
// CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
// CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i8
// CHECK: [[BF_VALUE:%.+]] = and i8 [[TRUNC]], 1
// CHECK: [[BF_CLEAR:%.+]] = and i8 %{{.+}}, -2
// CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]]
// CHECK: store i8 %{{.+}}, i8* [[LDTEMP:%.+]]
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[LDTEMP]]
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0
// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1
[OPENMP] Fixed bug in codegen of 'atomic write'. Fixed codegen for exit/continue order after success/failed atomic cmpxchg instruction for 'atomic write' construct. llvm-svn: 232712
2015-03-19 16:44:10 +08:00
// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[EXIT]]
#pragma omp atomic write
bfx4_packed.a = ldv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load x86_fp80, x86_fp80* @{{.+}}
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i64
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic, align 8
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: br label %[[CONT:.+]]
// CHECK: [[CONT]]
// CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
// CHECK: [[BF_AND:%.+]] = and i64 [[NEW_VAL]], 127
// CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND]], 17
// CHECK: [[BF_CLEAR:%.+]] = and i64 %{{.+}}, -16646145
// CHECK: or i64 [[BF_CLEAR]], [[BF_VALUE]]
// CHECK: store i64 %{{.+}}, i64* [[LDTEMP:%.+]]
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[LDTEMP]]
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic, align 8
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0
// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1
[OPENMP] Fixed bug in codegen of 'atomic write'. Fixed codegen for exit/continue order after success/failed atomic cmpxchg instruction for 'atomic write' construct. llvm-svn: 232712
2015-03-19 16:44:10 +08:00
// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[EXIT]]
#pragma omp atomic write
bfx4.b = ldv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load x86_fp80, x86_fp80* @{{.+}}
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i64
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) monotonic, align 1
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: br label %[[CONT:.+]]
// CHECK: [[CONT]]
// CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
// CHECK: [[TRUNC:%.+]] = trunc i64 [[NEW_VAL]] to i8
// CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 127
// CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 1
// CHECK: [[BF_CLEAR:%.+]] = and i8 %{{.+}}, 1
// CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]]
// CHECK: store i8 %{{.+}}, i8* [[LDTEMP:%.+]]
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[LDTEMP]]
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0
// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1
[OPENMP] Fixed bug in codegen of 'atomic write'. Fixed codegen for exit/continue order after success/failed atomic cmpxchg instruction for 'atomic write' construct. llvm-svn: 232712
2015-03-19 16:44:10 +08:00
// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[EXIT]]
[OPENMP50]Add support for relaxed clause in atomic directive. Added full support for relaxed clause.
2020-02-12 00:10:43 +08:00
#pragma omp atomic relaxed write
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
bfx4_packed.b = ldv;
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: load i64, i64*
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[VEC_ITEM_VAL:%.+]] = uitofp i64 %{{.+}} to float
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[I64VAL:%.+]] = load atomic i64, i64* bitcast (<2 x float>* [[DEST:@.+]] to i64*) monotonic, align 8
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: br label %[[CONT:.+]]
// CHECK: [[CONT]]
[OPENMP] Fixed bug in atomic update/capture/write constructs. Fixed a bug with codegen for destination atomic l-value with padding and junk in this padding bytes. llvm-svn: 237422
2015-05-15 16:36:34 +08:00
// CHECK: [[OLD_I64:%.+]] = phi i64 [ [[I64VAL]], %{{.+}} ], [ [[FAILED_I64_OLD_VAL:%.+]], %[[CONT]] ]
// CHECK: [[BITCAST:%.+]] = bitcast <2 x float>* [[LDTEMP:%.+]] to i64*
// CHECK: store i64 [[OLD_I64]], i64* [[BITCAST]],
Update Clang tests to handle explicitly typed load changes in LLVM. llvm-svn: 230795
2015-02-28 05:19:58 +08:00
// CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP]]
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <2 x float> [[VEC_VAL]], float [[VEC_ITEM_VAL]], i64 0
// CHECK: store <2 x float> [[NEW_VEC_VAL]], <2 x float>* [[LDTEMP]]
[OPENMP] Fixed bug in atomic update/capture/write constructs. Fixed a bug with codegen for destination atomic l-value with padding and junk in this padding bytes. llvm-svn: 237422
2015-05-15 16:36:34 +08:00
// CHECK: [[NEW_I64:%.+]] = load i64, i64* [[BITCAST]]
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (<2 x float>* [[DEST]] to i64*), i64 [[OLD_I64]], i64 [[NEW_I64]] monotonic monotonic, align 8
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[FAILED_I64_OLD_VAL:%.+]] = extractvalue { i64, i1 } [[RES]], 0
// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1
[OPENMP] Fixed bug in codegen of 'atomic write'. Fixed codegen for exit/continue order after success/failed atomic cmpxchg instruction for 'atomic write' construct. llvm-svn: 232712
2015-03-19 16:44:10 +08:00
// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: [[EXIT]]
[OPENMP50]Add support for relaxed clause in atomic directive. Added full support for relaxed clause.
2020-02-12 00:10:43 +08:00
#pragma omp atomic write relaxed
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
float2x.x = ulv;
// CHECK: call i32 @llvm.read_register.i32(
// CHECK: sitofp i32 %{{.+}} to double
// CHECK: bitcast double %{{.+}} to i64
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: store atomic i64 %{{.+}}, i64* bitcast (double* @{{.+}} to i64*) seq_cst, align 8
[OPENMP] Codegen for "#pragma omp atomic write" For global reg lvalue - use regular store through global register. For simple lvalue - use simple atomic store. For bitfields, vector element, extended vector elements - the original value of the whole storage (for vector elements) or of some aligned value (for bitfields) is atomically read, the part of this value for the given lvalue is modified and then use atomic compare-and-exchange operation to try to atomically write modified value (if it was not modified). Also, changes in this patch fix the bug for '#pragma omp atomic read' applied to extended vector elements. Differential Revision: http://reviews.llvm.org/D7369 llvm-svn: 230736
2015-02-27 14:33:30 +08:00
// CHECK: call{{.*}} @__kmpc_flush(
#pragma omp atomic write seq_cst
dv = rix;
return 0;
}
#endif