2005-07-02 06:44:09 +08:00
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//===-- X86IntelAsmPrinter.cpp - Convert X86 LLVM code to Intel assembly --===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to Intel format assembly language.
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// This printer is the output mechanism used by `llc'.
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//
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//===----------------------------------------------------------------------===//
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#include "X86IntelAsmPrinter.h"
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2006-09-08 06:06:40 +08:00
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#include "X86TargetAsmInfo.h"
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2005-07-02 06:44:09 +08:00
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#include "X86.h"
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2006-05-02 09:16:28 +08:00
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#include "llvm/Constants.h"
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2005-07-02 06:44:09 +08:00
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#include "llvm/Module.h"
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#include "llvm/Assembly/Writer.h"
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#include "llvm/Support/Mangler.h"
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2006-09-08 06:06:40 +08:00
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#include "llvm/Target/TargetAsmInfo.h"
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2006-02-18 08:15:05 +08:00
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#include "llvm/Target/TargetOptions.h"
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2005-07-02 06:44:09 +08:00
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using namespace llvm;
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/// runOnMachineFunction - This uses the printMachineInstruction()
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/// method to print assembly for each instruction.
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///
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bool X86IntelAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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2005-11-21 15:51:23 +08:00
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SetupMachineFunction(MF);
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2005-07-02 06:44:09 +08:00
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O << "\n\n";
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// Print out constants referenced by the function
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2005-11-21 16:32:23 +08:00
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EmitConstantPool(MF.getConstantPool());
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2005-07-02 06:44:09 +08:00
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// Print out labels for the function.
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2006-09-15 02:23:27 +08:00
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const Function* F = MF.getFunction();
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switch (F->getLinkage()) {
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default: assert(0 && "Unsupported linkage type!");
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case Function::InternalLinkage:
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SwitchToTextSection("_text", F);
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EmitAlignment(4);
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break;
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case Function::DLLExportLinkage:
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DLLExportedFns.insert(CurrentFnName);
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//FALLS THROUGH
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case Function::ExternalLinkage:
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2006-05-02 09:16:28 +08:00
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O << "\tpublic " << CurrentFnName << "\n";
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2006-09-15 02:23:27 +08:00
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SwitchToTextSection("_text", F);
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EmitAlignment(4);
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break;
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}
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2006-05-02 09:16:28 +08:00
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O << CurrentFnName << "\tproc near\n";
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2006-04-08 04:44:42 +08:00
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2005-07-02 06:44:09 +08:00
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// Print out code for the function.
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for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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I != E; ++I) {
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// Print a label for the basic block if there are any predecessors.
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2006-05-02 13:37:32 +08:00
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if (I->pred_begin() != I->pred_end()) {
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printBasicBlockLabel(I, true);
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O << '\n';
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}
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2005-07-02 06:44:09 +08:00
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for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
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II != E; ++II) {
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// Print the assembly for the instruction.
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O << "\t";
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printMachineInstruction(II);
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}
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}
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2006-05-02 09:16:28 +08:00
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O << CurrentFnName << "\tendp\n";
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2005-07-02 06:44:09 +08:00
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// We didn't modify anything.
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return false;
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}
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2005-12-01 02:54:35 +08:00
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void X86IntelAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) {
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2005-07-15 06:52:25 +08:00
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unsigned char value = MI->getOperand(Op).getImmedValue();
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assert(value <= 7 && "Invalid ssecc argument!");
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switch (value) {
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case 0: O << "eq"; break;
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case 1: O << "lt"; break;
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case 2: O << "le"; break;
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case 3: O << "unord"; break;
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case 4: O << "neq"; break;
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case 5: O << "nlt"; break;
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case 6: O << "nle"; break;
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case 7: O << "ord"; break;
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}
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}
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2006-02-07 07:41:19 +08:00
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void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
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const char *Modifier) {
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2005-07-02 06:44:09 +08:00
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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switch (MO.getType()) {
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2006-05-05 02:05:43 +08:00
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case MachineOperand::MO_Register:
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2006-05-05 13:40:20 +08:00
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if (MRegisterInfo::isPhysicalRegister(MO.getReg())) {
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unsigned Reg = MO.getReg();
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2006-06-01 06:34:26 +08:00
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if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
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2006-09-08 14:48:29 +08:00
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MVT::ValueType VT = (strcmp(Modifier,"subreg64") == 0) ?
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MVT::i64 : ((strcmp(Modifier, "subreg32") == 0) ? MVT::i32 :
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((strcmp(Modifier,"subreg16") == 0) ? MVT::i16 :MVT::i8));
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2006-05-05 13:40:20 +08:00
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Reg = getX86SubSuperRegister(Reg, VT);
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}
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O << RI.get(Reg).Name;
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} else
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2006-05-01 13:53:50 +08:00
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O << "reg" << MO.getReg();
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2005-07-02 06:44:09 +08:00
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return;
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2006-05-05 01:21:20 +08:00
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case MachineOperand::MO_Immediate:
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2006-05-26 16:04:31 +08:00
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O << MO.getImmedValue();
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2005-07-02 06:44:09 +08:00
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return;
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2006-04-23 02:53:45 +08:00
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case MachineOperand::MO_MachineBasicBlock:
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printBasicBlockLabel(MO.getMachineBasicBlock());
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2005-07-02 06:44:09 +08:00
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return;
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2006-02-26 16:28:12 +08:00
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case MachineOperand::MO_ConstantPoolIndex: {
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bool isMemOp = Modifier && !strcmp(Modifier, "mem");
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if (!isMemOp) O << "OFFSET ";
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2006-09-07 02:34:40 +08:00
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O << "[" << TAI->getPrivateGlobalPrefix() << "CPI"
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<< getFunctionNumber() << "_" << MO.getConstantPoolIndex();
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2006-02-26 16:28:12 +08:00
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int Offset = MO.getOffset();
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if (Offset > 0)
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O << " + " << Offset;
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else if (Offset < 0)
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O << Offset;
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O << "]";
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return;
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}
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2005-07-02 06:44:09 +08:00
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case MachineOperand::MO_GlobalAddress: {
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2006-02-18 08:15:05 +08:00
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bool isCallOp = Modifier && !strcmp(Modifier, "call");
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bool isMemOp = Modifier && !strcmp(Modifier, "mem");
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2006-09-15 02:23:27 +08:00
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GlobalValue *GV = MO.getGlobal();
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2006-02-18 08:15:05 +08:00
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if (!isMemOp && !isCallOp) O << "OFFSET ";
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2006-09-15 02:23:27 +08:00
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if (GV->hasDLLImportLinkage()) {
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// FIXME: This should be fixed with full support of stdcall & fastcall
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// CC's
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O << "__imp_";
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}
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O << Mang->getValueName(GV);
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2005-07-02 06:44:09 +08:00
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int Offset = MO.getOffset();
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if (Offset > 0)
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O << " + " << Offset;
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else if (Offset < 0)
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2005-11-30 09:59:00 +08:00
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O << Offset;
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2005-07-02 06:44:09 +08:00
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return;
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}
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2006-02-18 08:15:05 +08:00
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case MachineOperand::MO_ExternalSymbol: {
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bool isCallOp = Modifier && !strcmp(Modifier, "call");
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2006-02-23 04:19:42 +08:00
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if (!isCallOp) O << "OFFSET ";
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2006-09-07 02:34:40 +08:00
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O << TAI->getGlobalPrefix() << MO.getSymbolName();
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2005-07-02 06:44:09 +08:00
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return;
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2006-02-18 08:15:05 +08:00
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}
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2005-07-02 06:44:09 +08:00
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default:
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O << "<unknown operand type>"; return;
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}
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}
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2006-09-08 14:48:29 +08:00
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void X86IntelAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op,
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const char *Modifier) {
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2005-07-02 06:44:09 +08:00
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assert(isMem(MI, Op) && "Invalid memory reference!");
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const MachineOperand &BaseReg = MI->getOperand(Op);
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int ScaleVal = MI->getOperand(Op+1).getImmedValue();
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const MachineOperand &IndexReg = MI->getOperand(Op+2);
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const MachineOperand &DispSpec = MI->getOperand(Op+3);
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if (BaseReg.isFrameIndex()) {
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O << "[frame slot #" << BaseReg.getFrameIndex();
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if (DispSpec.getImmedValue())
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O << " + " << DispSpec.getImmedValue();
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O << "]";
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return;
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}
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O << "[";
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bool NeedPlus = false;
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if (BaseReg.getReg()) {
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2006-09-08 14:48:29 +08:00
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printOp(BaseReg, Modifier);
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2005-07-02 06:44:09 +08:00
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NeedPlus = true;
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}
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if (IndexReg.getReg()) {
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if (NeedPlus) O << " + ";
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if (ScaleVal != 1)
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O << ScaleVal << "*";
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2006-09-08 14:48:29 +08:00
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printOp(IndexReg, Modifier);
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2005-07-02 06:44:09 +08:00
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NeedPlus = true;
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}
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2006-02-26 16:28:12 +08:00
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if (DispSpec.isGlobalAddress() || DispSpec.isConstantPoolIndex()) {
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2005-07-02 06:44:09 +08:00
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if (NeedPlus)
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O << " + ";
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2006-02-07 16:38:37 +08:00
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printOp(DispSpec, "mem");
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2005-07-02 06:44:09 +08:00
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} else {
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int DispVal = DispSpec.getImmedValue();
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if (DispVal || (!BaseReg.getReg() && !IndexReg.getReg())) {
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if (NeedPlus)
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if (DispVal > 0)
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O << " + ";
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else {
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O << " - ";
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DispVal = -DispVal;
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}
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O << DispVal;
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}
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}
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O << "]";
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}
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2006-02-18 08:15:05 +08:00
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void X86IntelAsmPrinter::printPICLabel(const MachineInstr *MI, unsigned Op) {
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O << "\"L" << getFunctionNumber() << "$pb\"\n";
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O << "\"L" << getFunctionNumber() << "$pb\":";
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}
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2005-07-02 06:44:09 +08:00
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2006-04-29 07:19:39 +08:00
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bool X86IntelAsmPrinter::printAsmMRegister(const MachineOperand &MO,
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2006-04-29 07:11:40 +08:00
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const char Mode) {
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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unsigned Reg = MO.getReg();
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switch (Mode) {
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default: return true; // Unknown mode.
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case 'b': // Print QImode register
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2006-05-05 13:40:20 +08:00
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Reg = getX86SubSuperRegister(Reg, MVT::i8);
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2006-04-29 07:11:40 +08:00
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break;
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case 'h': // Print QImode high register
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2006-05-05 13:40:20 +08:00
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Reg = getX86SubSuperRegister(Reg, MVT::i8, true);
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2006-04-29 07:11:40 +08:00
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break;
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case 'w': // Print HImode register
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2006-05-05 13:40:20 +08:00
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Reg = getX86SubSuperRegister(Reg, MVT::i16);
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2006-04-29 07:11:40 +08:00
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break;
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case 'k': // Print SImode register
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2006-05-05 13:40:20 +08:00
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Reg = getX86SubSuperRegister(Reg, MVT::i32);
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2006-04-29 07:11:40 +08:00
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break;
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}
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2006-05-05 13:40:20 +08:00
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O << '%' << RI.get(Reg).Name;
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2006-04-29 07:11:40 +08:00
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return false;
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}
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2006-04-29 05:19:05 +08:00
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/// PrintAsmOperand - Print out an operand for an inline asm expression.
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///
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bool X86IntelAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant,
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const char *ExtraCode) {
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// Does this asm operand have a single letter operand modifier?
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if (ExtraCode && ExtraCode[0]) {
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if (ExtraCode[1] != 0) return true; // Unknown modifier.
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switch (ExtraCode[0]) {
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default: return true; // Unknown modifier.
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2006-04-29 07:11:40 +08:00
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case 'b': // Print QImode register
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case 'h': // Print QImode high register
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case 'w': // Print HImode register
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case 'k': // Print SImode register
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2006-04-29 07:19:39 +08:00
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return printAsmMRegister(MI->getOperand(OpNo), ExtraCode[0]);
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2006-04-29 05:19:05 +08:00
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}
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}
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printOperand(MI, OpNo);
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return false;
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}
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bool X86IntelAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
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unsigned OpNo,
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unsigned AsmVariant,
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const char *ExtraCode) {
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if (ExtraCode && ExtraCode[0])
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return true; // Unknown modifier.
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printMemReference(MI, OpNo);
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return false;
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}
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2005-07-02 06:44:09 +08:00
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/// printMachineInstruction -- Print out a single X86 LLVM instruction
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/// MI in Intel syntax to the current output stream.
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///
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void X86IntelAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
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++EmittedInsts;
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2006-05-05 13:40:20 +08:00
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// See if a truncate instruction can be turned into a nop.
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switch (MI->getOpcode()) {
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default: break;
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2006-09-08 14:48:29 +08:00
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case X86::TRUNC_64to32:
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case X86::TRUNC_64to16:
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case X86::TRUNC_32to16:
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case X86::TRUNC_32to8:
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case X86::TRUNC_16to8:
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case X86::TRUNC_32_to8:
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case X86::TRUNC_16_to8: {
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2006-05-05 13:40:20 +08:00
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const MachineOperand &MO0 = MI->getOperand(0);
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const MachineOperand &MO1 = MI->getOperand(1);
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unsigned Reg0 = MO0.getReg();
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unsigned Reg1 = MO1.getReg();
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2006-09-08 14:48:29 +08:00
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unsigned Opc = MI->getOpcode();
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if (Opc == X86::TRUNC_64to32)
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Reg1 = getX86SubSuperRegister(Reg1, MVT::i32);
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else if (Opc == X86::TRUNC_32to16 || Opc == X86::TRUNC_64to16)
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2006-05-08 16:01:26 +08:00
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Reg1 = getX86SubSuperRegister(Reg1, MVT::i16);
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2006-05-05 13:40:20 +08:00
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else
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2006-05-08 16:01:26 +08:00
|
|
|
Reg1 = getX86SubSuperRegister(Reg1, MVT::i8);
|
2006-09-07 02:34:40 +08:00
|
|
|
O << TAI->getCommentString() << " TRUNCATE ";
|
2006-05-08 16:01:26 +08:00
|
|
|
if (Reg0 != Reg1)
|
|
|
|
O << "\n\t";
|
2006-05-05 13:40:20 +08:00
|
|
|
break;
|
|
|
|
}
|
2006-09-08 14:48:29 +08:00
|
|
|
case X86::PsMOVZX64rr32:
|
|
|
|
O << TAI->getCommentString() << " ZERO-EXTEND " << "\n\t";
|
|
|
|
break;
|
2006-05-05 13:40:20 +08:00
|
|
|
}
|
|
|
|
|
2005-07-02 06:44:09 +08:00
|
|
|
// Call the autogenerated instruction printer routines.
|
|
|
|
printInstruction(MI);
|
|
|
|
}
|
|
|
|
|
|
|
|
bool X86IntelAsmPrinter::doInitialization(Module &M) {
|
2006-05-07 05:27:14 +08:00
|
|
|
X86SharedAsmPrinter::doInitialization(M);
|
2006-05-09 13:12:53 +08:00
|
|
|
|
2006-09-07 02:34:40 +08:00
|
|
|
Mang->markCharUnacceptable('.');
|
2006-05-05 00:20:22 +08:00
|
|
|
|
2006-05-02 11:11:50 +08:00
|
|
|
O << "\t.686\n\t.model flat\n\n";
|
|
|
|
|
|
|
|
// Emit declarations for external functions.
|
|
|
|
for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I)
|
|
|
|
if (I->isExternal())
|
|
|
|
O << "\textern " << Mang->getValueName(I) << ":near\n";
|
|
|
|
|
2006-05-07 05:27:14 +08:00
|
|
|
// Emit declarations for external globals. Note that VC++ always declares
|
|
|
|
// external globals to have type byte, and if that's good enough for VC++...
|
2006-05-02 11:11:50 +08:00
|
|
|
for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
|
|
|
|
I != E; ++I) {
|
|
|
|
if (I->isExternal())
|
|
|
|
O << "\textern " << Mang->getValueName(I) << ":byte\n";
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool X86IntelAsmPrinter::doFinalization(Module &M) {
|
2006-05-07 05:27:14 +08:00
|
|
|
const TargetData *TD = TM.getTargetData();
|
|
|
|
|
|
|
|
// Print out module-level global variables here.
|
|
|
|
for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
|
|
|
|
I != E; ++I) {
|
|
|
|
if (I->isExternal()) continue; // External global require no code
|
|
|
|
|
|
|
|
// Check to see if this is a special global used by LLVM, if so, emit it.
|
|
|
|
if (EmitSpecialLLVMGlobal(I))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
std::string name = Mang->getValueName(I);
|
|
|
|
Constant *C = I->getInitializer();
|
|
|
|
unsigned Size = TD->getTypeSize(C->getType());
|
|
|
|
unsigned Align = getPreferredAlignmentLog(I);
|
|
|
|
bool bCustomSegment = false;
|
|
|
|
|
|
|
|
switch (I->getLinkage()) {
|
|
|
|
case GlobalValue::LinkOnceLinkage:
|
|
|
|
case GlobalValue::WeakLinkage:
|
2006-05-09 12:59:56 +08:00
|
|
|
SwitchToDataSection("", 0);
|
2006-05-07 05:27:14 +08:00
|
|
|
O << name << "?\tsegment common 'COMMON'\n";
|
|
|
|
bCustomSegment = true;
|
|
|
|
// FIXME: the default alignment is 16 bytes, but 1, 2, 4, and 256
|
|
|
|
// are also available.
|
|
|
|
break;
|
|
|
|
case GlobalValue::AppendingLinkage:
|
2006-05-09 12:59:56 +08:00
|
|
|
SwitchToDataSection("", 0);
|
2006-05-07 05:27:14 +08:00
|
|
|
O << name << "?\tsegment public 'DATA'\n";
|
|
|
|
bCustomSegment = true;
|
|
|
|
// FIXME: the default alignment is 16 bytes, but 1, 2, 4, and 256
|
|
|
|
// are also available.
|
|
|
|
break;
|
2006-09-15 02:23:27 +08:00
|
|
|
case GlobalValue::DLLExportLinkage:
|
|
|
|
DLLExportedGVs.insert(name);
|
|
|
|
// FALL THROUGH
|
2006-05-07 05:27:14 +08:00
|
|
|
case GlobalValue::ExternalLinkage:
|
|
|
|
O << "\tpublic " << name << "\n";
|
|
|
|
// FALL THROUGH
|
|
|
|
case GlobalValue::InternalLinkage:
|
2006-09-07 02:34:40 +08:00
|
|
|
SwitchToDataSection(TAI->getDataSection(), I);
|
2006-05-07 05:27:14 +08:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
assert(0 && "Unknown linkage type!");
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!bCustomSegment)
|
|
|
|
EmitAlignment(Align, I);
|
|
|
|
|
2006-09-07 02:34:40 +08:00
|
|
|
O << name << ":\t\t\t\t" << TAI->getCommentString()
|
|
|
|
<< " " << I->getName() << '\n';
|
2006-05-07 05:27:14 +08:00
|
|
|
|
|
|
|
EmitGlobalConstant(C);
|
|
|
|
|
|
|
|
if (bCustomSegment)
|
|
|
|
O << name << "?\tends\n";
|
|
|
|
}
|
2006-09-15 02:23:27 +08:00
|
|
|
|
|
|
|
// Output linker support code for dllexported globals
|
|
|
|
if ((DLLExportedGVs.begin() != DLLExportedGVs.end()) ||
|
|
|
|
(DLLExportedFns.begin() != DLLExportedFns.end())) {
|
|
|
|
SwitchToDataSection("", 0);
|
|
|
|
O << "; WARNING: The following code is valid only with MASM v8.x and (possible) higher\n"
|
|
|
|
<< "; This version of MASM is usually shipped with Microsoft Visual Studio 2005\n"
|
|
|
|
<< "; or (possible) further versions. Unfortunately, there is no way to support\n"
|
|
|
|
<< "; dllexported symbols in the earlier versions of MASM in fully automatic way\n\n";
|
|
|
|
O << "_drectve\t segment info alias('.drectve')\n";
|
|
|
|
}
|
|
|
|
|
|
|
|
for (std::set<std::string>::iterator i = DLLExportedGVs.begin(),
|
|
|
|
e = DLLExportedGVs.end();
|
|
|
|
i != e; ++i) {
|
|
|
|
O << "\t db ' /EXPORT:" << *i << ",data'\n";
|
|
|
|
}
|
|
|
|
|
|
|
|
for (std::set<std::string>::iterator i = DLLExportedFns.begin(),
|
|
|
|
e = DLLExportedFns.end();
|
|
|
|
i != e; ++i) {
|
|
|
|
O << "\t db ' /EXPORT:" << *i << "'\n";
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((DLLExportedGVs.begin() != DLLExportedGVs.end()) ||
|
|
|
|
(DLLExportedFns.begin() != DLLExportedFns.end())) {
|
|
|
|
O << "_drectve\t ends\n";
|
|
|
|
}
|
2006-05-07 05:27:14 +08:00
|
|
|
|
|
|
|
// Bypass X86SharedAsmPrinter::doFinalization().
|
|
|
|
AsmPrinter::doFinalization(M);
|
2006-05-09 13:15:24 +08:00
|
|
|
SwitchToDataSection("", 0);
|
2006-05-02 11:11:50 +08:00
|
|
|
O << "\tend\n";
|
2006-05-07 05:27:14 +08:00
|
|
|
return false; // success
|
2005-07-02 06:44:09 +08:00
|
|
|
}
|
|
|
|
|
2006-05-02 09:16:28 +08:00
|
|
|
void X86IntelAsmPrinter::EmitString(const ConstantArray *CVA) const {
|
|
|
|
unsigned NumElts = CVA->getNumOperands();
|
|
|
|
if (NumElts) {
|
|
|
|
// ML does not have escape sequences except '' for '. It also has a maximum
|
|
|
|
// string length of 255.
|
|
|
|
unsigned len = 0;
|
|
|
|
bool inString = false;
|
|
|
|
for (unsigned i = 0; i < NumElts; i++) {
|
|
|
|
int n = cast<ConstantInt>(CVA->getOperand(i))->getRawValue() & 255;
|
|
|
|
if (len == 0)
|
|
|
|
O << "\tdb ";
|
|
|
|
|
|
|
|
if (n >= 32 && n <= 127) {
|
|
|
|
if (!inString) {
|
|
|
|
if (len > 0) {
|
|
|
|
O << ",'";
|
|
|
|
len += 2;
|
|
|
|
} else {
|
|
|
|
O << "'";
|
|
|
|
len++;
|
|
|
|
}
|
|
|
|
inString = true;
|
|
|
|
}
|
|
|
|
if (n == '\'') {
|
|
|
|
O << "'";
|
|
|
|
len++;
|
|
|
|
}
|
|
|
|
O << char(n);
|
|
|
|
} else {
|
|
|
|
if (inString) {
|
|
|
|
O << "'";
|
|
|
|
len++;
|
|
|
|
inString = false;
|
|
|
|
}
|
|
|
|
if (len > 0) {
|
|
|
|
O << ",";
|
|
|
|
len++;
|
|
|
|
}
|
|
|
|
O << n;
|
|
|
|
len += 1 + (n > 9) + (n > 99);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (len > 60) {
|
|
|
|
if (inString) {
|
|
|
|
O << "'";
|
|
|
|
inString = false;
|
|
|
|
}
|
|
|
|
O << "\n";
|
|
|
|
len = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (len > 0) {
|
|
|
|
if (inString)
|
|
|
|
O << "'";
|
|
|
|
O << "\n";
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2005-07-02 06:44:09 +08:00
|
|
|
// Include the auto-generated portion of the assembly writer.
|
|
|
|
#include "X86GenAsmWriter1.inc"
|