llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-default.mir

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# RUN: llc -O0 -march amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -o - | FileCheck %s
# Check the default mappings for various instructions.
---
# CHECK-LABEL: name: test_fconstant_f32_1
name: test_fconstant_f32_1
legalized: true
body: |
bb.0:
; CHECK: %0:sgpr(s32) = G_FCONSTANT float 1.0
%0:_(s32) = G_FCONSTANT float 1.0
...
---
# CHECK-LABEL: name: test_fconstant_f64_1
name: test_fconstant_f64_1
legalized: true
body: |
bb.0:
; CHECK: %0:sgpr(s64) = G_FCONSTANT double 1.0
%0:_(s64) = G_FCONSTANT double 1.0
...
---
# CHECK-LABEL: name: test_fconstant_f16_1
name: test_fconstant_f16_1
legalized: true
body: |
bb.0:
; CHECK: %0:sgpr(s32) = G_FCONSTANT half 0xH3C00
%0:_(s32) = G_FCONSTANT half 1.0
...