forked from OSchip/llvm-project
538 lines
16 KiB
LLVM
538 lines
16 KiB
LLVM
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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;
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; Note: Print verbose stackmaps using -debug-only=stackmaps.
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; CHECK: .section .llvm_stackmaps
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; CHECK-NEXT: __LLVM_StackMaps:
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; Header
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; CHECK-NEXT: .byte 3
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 0
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; Num Functions
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; CHECK-NEXT: .long 15
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; Num LargeConstants
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; CHECK-NEXT: .long 3
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; Num Callsites
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; CHECK-NEXT: .long 19
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; Functions and stack size
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; CHECK-NEXT: .quad constantargs
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; CHECK-NEXT: .quad 160
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; CHECK-NEXT: .quad 1
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; CHECK-NEXT: .quad osrinline
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; CHECK-NEXT: .quad 160
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; CHECK-NEXT: .quad 1
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; CHECK-NEXT: .quad osrcold
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; CHECK-NEXT: .quad 160
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; CHECK-NEXT: .quad 1
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; CHECK-NEXT: .quad propertyRead
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; CHECK-NEXT: .quad 160
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; CHECK-NEXT: .quad 1
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; CHECK-NEXT: .quad propertyWrite
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; CHECK-NEXT: .quad 160
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; CHECK-NEXT: .quad 1
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; CHECK-NEXT: .quad jsVoidCall
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; CHECK-NEXT: .quad 160
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; CHECK-NEXT: .quad 1
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; CHECK-NEXT: .quad jsIntCall
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; CHECK-NEXT: .quad 160
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; CHECK-NEXT: .quad 1
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; CHECK-NEXT: .quad spilledValue
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; CHECK-NEXT: .quad 240
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; CHECK-NEXT: .quad 1
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; CHECK-NEXT: .quad spilledStackMapValue
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; CHECK-NEXT: .quad 200
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; CHECK-NEXT: .quad 1
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; CHECK-NEXT: .quad spillSubReg
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; CHECK-NEXT: .quad 168
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; CHECK-NEXT: .quad 1
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; CHECK-NEXT: .quad liveConstant
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; CHECK-NEXT: .quad 160
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; CHECK-NEXT: .quad 1
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; CHECK-NEXT: .quad directFrameIdx
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; CHECK-NEXT: .quad 200
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; CHECK-NEXT: .quad 2
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; CHECK-NEXT: .quad longid
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; CHECK-NEXT: .quad 160
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; CHECK-NEXT: .quad 4
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; CHECK-NEXT: .quad clobberScratch
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; CHECK-NEXT: .quad 168
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; CHECK-NEXT: .quad 1
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; CHECK-NEXT: .quad needsStackRealignment
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; CHECK-NEXT: .quad -1
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; CHECK-NEXT: .quad 1
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; Large Constants
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; CHECK-NEXT: .quad 2147483648
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; CHECK-NEXT: .quad 4294967295
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; CHECK-NEXT: .quad 4294967296
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; Callsites
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; Constant arguments
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;
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; CHECK-NEXT: .quad 1
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; CHECK-NEXT: .long .L{{.*}}-constantargs
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 12
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; SmallConstant
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; CHECK-NEXT: .byte 4
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long -1
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; SmallConstant
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; CHECK-NEXT: .byte 4
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long -1
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; SmallConstant
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; CHECK-NEXT: .byte 4
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long 65536
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; SmallConstant
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; CHECK-NEXT: .byte 4
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long 2000000000
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; SmallConstant
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; CHECK-NEXT: .byte 4
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long 2147483647
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; SmallConstant
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; CHECK-NEXT: .byte 4
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long -1
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; SmallConstant
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; CHECK-NEXT: .byte 4
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long -1
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; SmallConstant
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; CHECK-NEXT: .byte 4
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long 0
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; LargeConstant at index 0
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; CHECK-NEXT: .byte 5
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long 0
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; LargeConstant at index 1
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; CHECK-NEXT: .byte 5
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long 1
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; LargeConstant at index 2
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; CHECK-NEXT: .byte 5
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long 2
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; SmallConstant
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; CHECK-NEXT: .byte 4
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long -1
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define void @constantargs() {
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entry:
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%0 = inttoptr i64 12345 to i8*
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tail call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 1, i32 14, i8* %0, i32 0, i16 65535, i16 -1, i32 65536, i32 2000000000, i32 2147483647, i32 -1, i32 4294967295, i32 4294967296, i64 2147483648, i64 4294967295, i64 4294967296, i64 -1)
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ret void
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}
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; Inline OSR Exit
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;
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; CHECK: .long .L{{.*}}-osrinline
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 2
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; CHECK-NEXT: .byte 1
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short {{[0-9]+}}
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long 0
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; CHECK-NEXT: .byte 1
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short {{[0-9]+}}
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long 0
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define void @osrinline(i64 %a, i64 %b) {
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entry:
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; Runtime void->void call.
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call void inttoptr (i64 -559038737 to void ()*)()
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; Followed by inline OSR patchpoint with 12-byte shadow and 2 live vars.
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call void (i64, i32, ...) @llvm.experimental.stackmap(i64 3, i32 12, i64 %a, i64 %b)
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ret void
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}
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; Cold OSR Exit
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;
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; 2 live variables in register.
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;
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; CHECK: .long .L{{.*}}-osrcold
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 2
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; CHECK-NEXT: .byte 1
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short {{[0-9]+}}
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long 0
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; CHECK-NEXT: .byte 1
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short {{[0-9]+}}
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long 0
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define void @osrcold(i64 %a, i64 %b) {
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entry:
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%test = icmp slt i64 %a, %b
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br i1 %test, label %ret, label %cold
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cold:
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; OSR patchpoint with 12-byte nop-slide and 2 live vars.
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%thunk = inttoptr i64 -559038737 to i8*
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call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 4, i32 14, i8* %thunk, i32 0, i64 %a, i64 %b)
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unreachable
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ret:
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ret void
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}
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; Property Read
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; CHECK: .long .L{{.*}}-propertyRead
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 2
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; CHECK-NEXT: .byte 1
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short {{[0-9]+}}
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long 0
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; CHECK-NEXT: .byte 1
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short {{[0-9]+}}
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long 0
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define i64 @propertyRead(i64* %obj) {
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entry:
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%resolveRead = inttoptr i64 -559038737 to i8*
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%result = call anyregcc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 14, i8* %resolveRead, i32 1, i64* %obj)
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%add = add i64 %result, 3
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ret i64 %add
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}
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; Property Write
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; CHECK: .long .L{{.*}}-propertyWrite
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 2
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; CHECK-NEXT: .byte 1
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short {{[0-9]+}}
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long 0
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; CHECK-NEXT: .byte 1
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short {{[0-9]+}}
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long 0
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define void @propertyWrite(i64 %dummy1, i64* %obj, i64 %dummy2, i64 %a) {
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entry:
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%resolveWrite = inttoptr i64 -559038737 to i8*
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call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 6, i32 14, i8* %resolveWrite, i32 2, i64* %obj, i64 %a)
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ret void
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}
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; Void JS Call
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;
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; 2 live variables in registers.
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;
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; CHECK: .long .L{{.*}}-jsVoidCall
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 2
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; CHECK-NEXT: .byte 1
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short {{[0-9]+}}
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long 0
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; CHECK-NEXT: .byte 1
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short {{[0-9]+}}
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long 0
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define void @jsVoidCall(i64 %dummy1, i64* %obj, i64 %arg, i64 %l1, i64 %l2) {
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entry:
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%resolveCall = inttoptr i64 -559038737 to i8*
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call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 7, i32 14, i8* %resolveCall, i32 2, i64* %obj, i64 %arg, i64 %l1, i64 %l2)
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ret void
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}
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; i64 JS Call
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;
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; 2 live variables in registers.
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;
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; CHECK: .long .L{{.*}}-jsIntCall
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 2
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; CHECK-NEXT: .byte 1
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short {{[0-9]+}}
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long 0
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; CHECK-NEXT: .byte 1
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short {{[0-9]+}}
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long 0
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define i64 @jsIntCall(i64 %dummy1, i64* %obj, i64 %arg, i64 %l1, i64 %l2) {
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entry:
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%resolveCall = inttoptr i64 -559038737 to i8*
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%result = call i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 8, i32 14, i8* %resolveCall, i32 2, i64* %obj, i64 %arg, i64 %l1, i64 %l2)
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%add = add i64 %result, 3
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ret i64 %add
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}
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; Spilled stack map values.
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;
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; Verify 17 stack map entries.
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;
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; CHECK: .long .L{{.*}}-spilledValue
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 17
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;
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; Check that at least one is a spilled entry from the parameter area.
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; Location: Indirect r15 + XX
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; CHECK: .byte 3
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 8
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; CHECK-NEXT: .short 15
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .long
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define void @spilledValue(i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16) {
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entry:
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|
|
call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 11, i32 14, i8* null, i32 5, i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16)
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; Spilled stack map values.
|
||
|
|
;
|
||
|
|
; Verify 17 stack map entries.
|
||
|
|
;
|
||
|
|
; CHECK: .long .L{{.*}}-spilledStackMapValue
|
||
|
|
; CHECK-NEXT: .short 0
|
||
|
|
; CHECK-NEXT: .short 17
|
||
|
|
;
|
||
|
|
; Check that at least one is a spilled entry from the parameter area.
|
||
|
|
; Location: Indirect r15 + XX
|
||
|
|
; CHECK: .byte 3
|
||
|
|
; CHECK-NEXT: .byte 0
|
||
|
|
; CHECK-NEXT: .short 8
|
||
|
|
; CHECK-NEXT: .short 15
|
||
|
|
; CHECK-NEXT: .short 0
|
||
|
|
; CHECK-NEXT: .long
|
||
|
|
define void @spilledStackMapValue(i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16) {
|
||
|
|
entry:
|
||
|
|
call void (i64, i32, ...) @llvm.experimental.stackmap(i64 12, i32 16, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16)
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; Spill a subregister stackmap operand.
|
||
|
|
;
|
||
|
|
; CHECK: .long .L{{.*}}-spillSubReg
|
||
|
|
; CHECK-NEXT: .short 0
|
||
|
|
; 4 locations
|
||
|
|
; CHECK-NEXT: .short 1
|
||
|
|
;
|
||
|
|
; Check that the subregister operand is a 4-byte spill.
|
||
|
|
; Location: Indirect, 4-byte, %r15 + 164
|
||
|
|
; CHECK: .byte 3
|
||
|
|
; CHECK-NEXT: .byte 0
|
||
|
|
; CHECK-NEXT: .short 4
|
||
|
|
; CHECK-NEXT: .short 15
|
||
|
|
; CHECK-NEXT: .short 0
|
||
|
|
; CHECK-NEXT: .long 164
|
||
|
|
define void @spillSubReg(i64 %arg) #0 {
|
||
|
|
bb:
|
||
|
|
br i1 undef, label %bb1, label %bb2
|
||
|
|
|
||
|
|
bb1:
|
||
|
|
unreachable
|
||
|
|
|
||
|
|
bb2:
|
||
|
|
%tmp = load i64, i64* inttoptr (i64 140685446136880 to i64*)
|
||
|
|
br i1 undef, label %bb16, label %bb17
|
||
|
|
|
||
|
|
bb16:
|
||
|
|
unreachable
|
||
|
|
|
||
|
|
bb17:
|
||
|
|
%tmp32 = trunc i64 %tmp to i32
|
||
|
|
br i1 undef, label %bb60, label %bb61
|
||
|
|
|
||
|
|
bb60:
|
||
|
|
tail call void asm sideeffect "nopr %r0", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14}"() nounwind
|
||
|
|
tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 13, i32 6, i32 %tmp32)
|
||
|
|
unreachable
|
||
|
|
|
||
|
|
bb61:
|
||
|
|
unreachable
|
||
|
|
}
|
||
|
|
|
||
|
|
; Map a constant value.
|
||
|
|
;
|
||
|
|
; CHECK: .long .L{{.*}}-liveConstant
|
||
|
|
; CHECK-NEXT: .short 0
|
||
|
|
; 1 location
|
||
|
|
; CHECK-NEXT: .short 1
|
||
|
|
; Loc 0: SmallConstant
|
||
|
|
; CHECK-NEXT: .byte 4
|
||
|
|
; CHECK-NEXT: .byte 0
|
||
|
|
; CHECK-NEXT: .short 8
|
||
|
|
; CHECK-NEXT: .short 0
|
||
|
|
; CHECK-NEXT: .short 0
|
||
|
|
; CHECK-NEXT: .long 33
|
||
|
|
|
||
|
|
define void @liveConstant() {
|
||
|
|
tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 15, i32 6, i32 33)
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; Directly map an alloca's address.
|
||
|
|
;
|
||
|
|
; Callsite 16
|
||
|
|
; CHECK: .long .L{{.*}}-directFrameIdx
|
||
|
|
; CHECK-NEXT: .short 0
|
||
|
|
; 1 location
|
||
|
|
; CHECK-NEXT: .short 1
|
||
|
|
; Loc 0: Direct %r15 + ofs
|
||
|
|
; CHECK-NEXT: .byte 2
|
||
|
|
; CHECK-NEXT: .byte 0
|
||
|
|
; CHECK-NEXT: .short 8
|
||
|
|
; CHECK-NEXT: .short 15
|
||
|
|
; CHECK-NEXT: .short 0
|
||
|
|
; CHECK-NEXT: .long
|
||
|
|
|
||
|
|
; Callsite 17
|
||
|
|
; CHECK: .long .L{{.*}}-directFrameIdx
|
||
|
|
; CHECK-NEXT: .short 0
|
||
|
|
; 2 locations
|
||
|
|
; CHECK-NEXT: .short 2
|
||
|
|
; Loc 0: Direct %r15 + ofs
|
||
|
|
; CHECK-NEXT: .byte 2
|
||
|
|
; CHECK-NEXT: .byte 0
|
||
|
|
; CHECK-NEXT: .short 8
|
||
|
|
; CHECK-NEXT: .short 15
|
||
|
|
; CHECK-NEXT: .short 0
|
||
|
|
; CHECK-NEXT: .long
|
||
|
|
; Loc 1: Direct %r15 + ofs
|
||
|
|
; CHECK-NEXT: .byte 2
|
||
|
|
; CHECK-NEXT: .byte 0
|
||
|
|
; CHECK-NEXT: .short 8
|
||
|
|
; CHECK-NEXT: .short 15
|
||
|
|
; CHECK-NEXT: .short 0
|
||
|
|
; CHECK-NEXT: .long
|
||
|
|
define void @directFrameIdx() {
|
||
|
|
entry:
|
||
|
|
%metadata1 = alloca i64, i32 3, align 8
|
||
|
|
store i64 11, i64* %metadata1
|
||
|
|
store i64 12, i64* %metadata1
|
||
|
|
store i64 13, i64* %metadata1
|
||
|
|
call void (i64, i32, ...) @llvm.experimental.stackmap(i64 16, i32 0, i64* %metadata1)
|
||
|
|
%metadata2 = alloca i8, i32 4, align 8
|
||
|
|
%metadata3 = alloca i16, i32 4, align 8
|
||
|
|
call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 17, i32 6, i8* null, i32 0, i8* %metadata2, i16* %metadata3)
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; Test a 64-bit ID.
|
||
|
|
;
|
||
|
|
; CHECK: .quad 4294967295
|
||
|
|
; CHECK: .long .L{{.*}}-longid
|
||
|
|
; CHECK: .quad 4294967296
|
||
|
|
; CHECK: .long .L{{.*}}-longid
|
||
|
|
; CHECK: .quad 9223372036854775807
|
||
|
|
; CHECK: .long .L{{.*}}-longid
|
||
|
|
; CHECK: .quad -1
|
||
|
|
; CHECK: .long .L{{.*}}-longid
|
||
|
|
define void @longid() {
|
||
|
|
entry:
|
||
|
|
tail call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 4294967295, i32 0, i8* null, i32 0)
|
||
|
|
tail call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 4294967296, i32 0, i8* null, i32 0)
|
||
|
|
tail call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 9223372036854775807, i32 0, i8* null, i32 0)
|
||
|
|
tail call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 -1, i32 0, i8* null, i32 0)
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; Map a value when %r0 and %r1 are the only free registers.
|
||
|
|
; The scratch registers should not be used for a live stackmap value.
|
||
|
|
;
|
||
|
|
; CHECK: .long .L{{.*}}-clobberScratch
|
||
|
|
; CHECK-NEXT: .short 0
|
||
|
|
; 1 location
|
||
|
|
; CHECK-NEXT: .short 1
|
||
|
|
; Loc 0: Indirect %r15 + offset
|
||
|
|
; CHECK-NEXT: .byte 3
|
||
|
|
; CHECK-NEXT: .byte 0
|
||
|
|
; CHECK-NEXT: .short 4
|
||
|
|
; CHECK-NEXT: .short 15
|
||
|
|
; CHECK-NEXT: .short 0
|
||
|
|
; CHECK-NEXT: .long 164
|
||
|
|
define void @clobberScratch(i32 %a) {
|
||
|
|
tail call void asm sideeffect "nopr %r0", "~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14}"() nounwind
|
||
|
|
tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 16, i32 8, i32 %a)
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; A stack frame which needs to be realigned at runtime (to meet alignment
|
||
|
|
; criteria for values on the stack) does not have a fixed frame size.
|
||
|
|
; CHECK: .long .L{{.*}}-needsStackRealignment
|
||
|
|
; CHECK-NEXT: .short 0
|
||
|
|
; 0 locations
|
||
|
|
; CHECK-NEXT: .short 0
|
||
|
|
define void @needsStackRealignment() {
|
||
|
|
%val = alloca i64, i32 3, align 128
|
||
|
|
tail call void (...) @escape_values(i64* %val)
|
||
|
|
; Note: Adding any non-constant to the stackmap would fail because we
|
||
|
|
; expected to be able to address off the frame pointer. In a realigned
|
||
|
|
; frame, we must use the stack pointer instead. This is a separate bug.
|
||
|
|
tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 0, i32 0)
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
declare void @escape_values(...)
|
||
|
|
|
||
|
|
declare void @llvm.experimental.stackmap(i64, i32, ...)
|
||
|
|
declare void @llvm.experimental.patchpoint.void(i64, i32, i8*, i32, ...)
|
||
|
|
declare i64 @llvm.experimental.patchpoint.i64(i64, i32, i8*, i32, ...)
|