forked from OSchip/llvm-project
60 lines
1.5 KiB
LLVM
60 lines
1.5 KiB
LLVM
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; RUN: opt -basicaa -scoped-noalias -loop-vectorize -licm -force-vector-width=2 \
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; RUN: -force-vector-interleave=1 -S < %s | FileCheck %s
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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; In order to vectorize the inner loop, it needs to be versioned with
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; memchecks between {A} x {B, C} first:
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;
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; for (i = 0; i < n; i++)
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; for (j = 0; j < m; j++)
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; A[j] += B[i] + C[j];
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;
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; Since in the versioned vector loop A and B can no longer alias, B[i] can be
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; LICM'ed from the inner loop.
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define void @f(i32* %a, i32* %b, i32* %c) {
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entry:
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br label %outer
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outer:
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%i.2 = phi i64 [ 0, %entry ], [ %i, %inner.end ]
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%arrayidxB = getelementptr inbounds i32, i32* %b, i64 %i.2
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br label %inner.ph
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inner.ph:
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; CHECK: vector.ph:
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; CHECK: load i32, i32* %arrayidxB,
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; CHECK: br label %vector.body
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br label %inner
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inner:
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%j.2 = phi i64 [ 0, %inner.ph ], [ %j, %inner ]
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%arrayidxA = getelementptr inbounds i32, i32* %a, i64 %j.2
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%loadA = load i32, i32* %arrayidxA, align 4
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%loadB = load i32, i32* %arrayidxB, align 4
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%arrayidxC = getelementptr inbounds i32, i32* %c, i64 %j.2
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%loadC = load i32, i32* %arrayidxC, align 4
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%add = add nuw i32 %loadA, %loadB
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%add2 = add nuw i32 %add, %loadC
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store i32 %add2, i32* %arrayidxA, align 4
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%j = add nuw nsw i64 %j.2, 1
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%cond1 = icmp eq i64 %j, 20
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br i1 %cond1, label %inner.end, label %inner
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inner.end:
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%i = add nuw nsw i64 %i.2, 1
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%cond2 = icmp eq i64 %i, 30
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br i1 %cond2, label %outer.end, label %outer
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outer.end:
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ret void
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}
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