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llvm-project/llvm/test/MC/AArch64/noneon-diagnostics.s

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AArch64/ARM64: enable MC-level diagnostic tests for NEON insts. Obviously we can't expect the two backends to produce identical diagnostics, since what's possible depends quite a bit on how the .td files are structured. I think the ARM64 diagnostics are basically of the same quality in all the changed cases, so I've split the CHECK lines. llvm-svn: 208084
2014-05-06 20:50:55 +08:00
// RUN: not llvm-mc -triple arm64-none-linux-gnu -mattr=-neon < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-ARM64-ERROR < %t %s
AArch64: add initial NEON support Patch by Ana Pazos. - Completed implementation of instruction formats: AdvSIMD three same AdvSIMD modified immediate AdvSIMD scalar pairwise - Completed implementation of instruction classes (some of the instructions in these classes belong to yet unfinished instruction formats): Vector Arithmetic Vector Immediate Vector Pairwise Arithmetic - Initial implementation of instruction formats: AdvSIMD scalar two-reg misc AdvSIMD scalar three same - Intial implementation of instruction class: Scalar Arithmetic - Initial clang changes to support arm v8 intrinsics. Note: no clang changes for scalar intrinsics function name mangling yet. - Comprehensive test cases for added instructions To verify auto codegen, encoding, decoding, diagnosis, intrinsics. llvm-svn: 187567
2013-08-01 17:20:35 +08:00
fmla v3.4s, v12.4s, v17.4s
fmla v1.2d, v30.2d, v20.2d
fmla v9.2s, v9.2s, v0.2s
// CHECK-ERROR: error: instruction requires a CPU feature not currently enabled
// CHECK-ERROR-NEXT: fmla v3.4s, v12.4s, v17.4s
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: instruction requires a CPU feature not currently enabled
// CHECK-ERROR-NEXT: fmla v1.2d, v30.2d, v20.2d
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: instruction requires a CPU feature not currently enabled
// CHECK-ERROR-NEXT: fmla v9.2s, v9.2s, v0.2s
// CHECK-ERROR-NEXT: ^
AArch64/ARM64: enable MC-level diagnostic tests for NEON insts. Obviously we can't expect the two backends to produce identical diagnostics, since what's possible depends quite a bit on how the .td files are structured. I think the ARM64 diagnostics are basically of the same quality in all the changed cases, so I've split the CHECK lines. llvm-svn: 208084
2014-05-06 20:50:55 +08:00
// CHECK-ARM64-ERROR: error: instruction requires: neon
// CHECK-ARM64-ERROR-NEXT: fmla v3.4s, v12.4s, v17.4s
// CHECK-ARM64-ERROR-NEXT: ^
// CHECK-ARM64-ERROR-NEXT: error: instruction requires: neon
// CHECK-ARM64-ERROR-NEXT: fmla v1.2d, v30.2d, v20.2d
// CHECK-ARM64-ERROR-NEXT: ^
// CHECK-ARM64-ERROR-NEXT: error: instruction requires: neon
// CHECK-ARM64-ERROR-NEXT: fmla v9.2s, v9.2s, v0.2s
// CHECK-ARM64-ERROR-NEXT: ^
AArch64: add initial NEON support Patch by Ana Pazos. - Completed implementation of instruction formats: AdvSIMD three same AdvSIMD modified immediate AdvSIMD scalar pairwise - Completed implementation of instruction classes (some of the instructions in these classes belong to yet unfinished instruction formats): Vector Arithmetic Vector Immediate Vector Pairwise Arithmetic - Initial implementation of instruction formats: AdvSIMD scalar two-reg misc AdvSIMD scalar three same - Intial implementation of instruction class: Scalar Arithmetic - Initial clang changes to support arm v8 intrinsics. Note: no clang changes for scalar intrinsics function name mangling yet. - Comprehensive test cases for added instructions To verify auto codegen, encoding, decoding, diagnosis, intrinsics. llvm-svn: 187567
2013-08-01 17:20:35 +08:00
fmls v3.4s, v12.4s, v17.4s
fmls v1.2d, v30.2d, v20.2d
fmls v9.2s, v9.2s, v0.2s
// CHECK-ERROR: error: instruction requires a CPU feature not currently enabled
// CHECK-ERROR-NEXT: fmls v3.4s, v12.4s, v17.4s
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: instruction requires a CPU feature not currently enabled
// CHECK-ERROR-NEXT: fmls v1.2d, v30.2d, v20.2d
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: instruction requires a CPU feature not currently enabled
// CHECK-ERROR-NEXT: fmls v9.2s, v9.2s, v0.2s
// CHECK-ERROR-NEXT: ^
AArch64/ARM64: enable MC-level diagnostic tests for NEON insts. Obviously we can't expect the two backends to produce identical diagnostics, since what's possible depends quite a bit on how the .td files are structured. I think the ARM64 diagnostics are basically of the same quality in all the changed cases, so I've split the CHECK lines. llvm-svn: 208084
2014-05-06 20:50:55 +08:00
// CHECK-ARM64-ERROR: error: instruction requires: neon
// CHECK-ARM64-ERROR-NEXT: fmls v3.4s, v12.4s, v17.4s
// CHECK-ARM64-ERROR-NEXT: ^
// CHECK-ARM64-ERROR-NEXT: error: instruction requires: neon
// CHECK-ARM64-ERROR-NEXT: fmls v1.2d, v30.2d, v20.2d
// CHECK-ARM64-ERROR-NEXT: ^
// CHECK-ARM64-ERROR-NEXT: error: instruction requires: neon
// CHECK-ARM64-ERROR-NEXT: fmls v9.2s, v9.2s, v0.2s
// CHECK-ARM64-ERROR-NEXT: ^