2015-06-30 07:51:55 +08:00
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// WebAssemblyInstrInfo.td-Describe the WebAssembly Instructions-*- tablegen -*-
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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2015-07-11 02:23:10 +08:00
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///
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/// \file
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/// \brief WebAssembly Instruction definitions.
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///
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2015-06-30 07:51:55 +08:00
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// WebAssembly Instruction Predicate Definitions.
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//===----------------------------------------------------------------------===//
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2015-07-02 07:41:25 +08:00
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def HasAddr32 : Predicate<"!Subtarget->hasAddr64()">;
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def HasAddr64 : Predicate<"Subtarget->hasAddr64()">;
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def HasSIMD128 : Predicate<"Subtarget->hasSIMD128()">,
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AssemblerPredicate<"FeatureSIMD128", "simd128">;
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2015-06-30 07:51:55 +08:00
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//===----------------------------------------------------------------------===//
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// WebAssembly-specific DAG Node Types.
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//===----------------------------------------------------------------------===//
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2015-08-25 06:16:48 +08:00
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def SDT_WebAssemblyCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>]>;
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def SDT_WebAssemblyCallSeqEnd :
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SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>;
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2015-09-10 00:13:47 +08:00
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def SDT_WebAssemblyCall0 : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
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def SDT_WebAssemblyCall1 : SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>;
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2015-09-17 00:51:30 +08:00
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def SDT_WebAssemblySwitch : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
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2015-08-01 01:53:38 +08:00
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def SDT_WebAssemblyArgument : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>;
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2015-08-01 05:04:18 +08:00
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def SDT_WebAssemblyReturn : SDTypeProfile<0, -1, []>;
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def SDT_WebAssemblyWrapper : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>,
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SDTCisPtrTy<0>]>;
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2015-08-01 01:53:38 +08:00
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2015-06-30 07:51:55 +08:00
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//===----------------------------------------------------------------------===//
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// WebAssembly-specific DAG Nodes.
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//===----------------------------------------------------------------------===//
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2015-08-25 06:16:48 +08:00
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def WebAssemblycallseq_start :
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SDNode<"ISD::CALLSEQ_START", SDT_WebAssemblyCallSeqStart,
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[SDNPHasChain, SDNPOutGlue]>;
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def WebAssemblycallseq_end :
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SDNode<"ISD::CALLSEQ_END", SDT_WebAssemblyCallSeqEnd,
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[SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>;
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2015-09-10 00:13:47 +08:00
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def WebAssemblycall0 : SDNode<"WebAssemblyISD::CALL0",
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SDT_WebAssemblyCall0,
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[SDNPHasChain, SDNPVariadic]>;
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def WebAssemblycall1 : SDNode<"WebAssemblyISD::CALL1",
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SDT_WebAssemblyCall1,
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[SDNPHasChain, SDNPVariadic]>;
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2015-09-17 00:51:30 +08:00
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def WebAssemblyswitch : SDNode<"WebAssemblyISD::SWITCH",
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SDT_WebAssemblySwitch,
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[SDNPHasChain, SDNPVariadic]>;
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2015-08-01 01:53:38 +08:00
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def WebAssemblyargument : SDNode<"WebAssemblyISD::ARGUMENT",
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SDT_WebAssemblyArgument>;
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def WebAssemblyreturn : SDNode<"WebAssemblyISD::RETURN",
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SDT_WebAssemblyReturn, [SDNPHasChain]>;
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def WebAssemblywrapper : SDNode<"WebAssemblyISD::Wrapper",
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SDT_WebAssemblyWrapper>;
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2015-08-01 01:53:38 +08:00
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2015-06-30 07:51:55 +08:00
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//===----------------------------------------------------------------------===//
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// WebAssembly-specific Operands.
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//===----------------------------------------------------------------------===//
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2015-07-11 02:23:10 +08:00
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/*
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* TODO(jfb): Add the following.
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*
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* get_local: read the current value of a local variable
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* set_local: set the current value of a local variable
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*/
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2015-09-17 00:51:30 +08:00
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def bb_op : Operand<OtherVT>;
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def tjumptable_op : Operand<iPTR>;
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def global : Operand<iPTR>;
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2015-06-30 07:51:55 +08:00
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//===----------------------------------------------------------------------===//
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// WebAssembly Instruction Format Definitions.
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//===----------------------------------------------------------------------===//
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include "WebAssemblyInstrFormats.td"
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2015-08-01 12:48:44 +08:00
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multiclass ARGUMENT<WebAssemblyRegClass vt> {
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def ARGUMENT_#vt : I<(outs vt:$res), (ins i32imm:$argno),
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[(set vt:$res, (WebAssemblyargument timm:$argno))]>;
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}
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2015-09-26 09:09:44 +08:00
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defm : ARGUMENT<I32>;
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defm : ARGUMENT<I64>;
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defm : ARGUMENT<F32>;
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defm : ARGUMENT<F64>;
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2015-08-01 01:53:38 +08:00
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2015-08-11 06:36:48 +08:00
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2015-11-14 04:27:45 +08:00
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def CONST_I32 : I<(outs I32:$res), (ins i32imm:$imm),
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2015-11-06 04:44:29 +08:00
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[(set I32:$res, imm:$imm)],
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"i32.const $res, $imm">;
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def CONST_I64 : I<(outs I64:$res), (ins i64imm:$imm),
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[(set I64:$res, imm:$imm)],
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"i64.const $res, $imm">;
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def CONST_F32 : I<(outs F32:$res), (ins f32imm:$imm),
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[(set F32:$res, fpimm:$imm)],
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"f32.const $res, $imm">;
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def CONST_F64 : I<(outs F64:$res), (ins f64imm:$imm),
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[(set F64:$res, fpimm:$imm)],
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"f64.const $res, $imm">;
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2015-08-11 06:36:48 +08:00
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2015-09-17 00:51:30 +08:00
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// Special types of immediates. FIXME: Hard-coded as 32-bit for now.
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def GLOBAL : I<(outs I32:$dst), (ins global:$addr),
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[(set I32:$dst, (WebAssemblywrapper tglobaladdr:$addr))],
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"global $dst, $addr">;
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def JUMP_TABLE : I<(outs I32:$dst), (ins tjumptable_op:$addr),
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[(set I32:$dst, (WebAssemblywrapper tjumptable:$addr))],
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"jump_table $dst, $addr">;
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2015-08-25 06:16:48 +08:00
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2015-06-30 07:51:55 +08:00
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//===----------------------------------------------------------------------===//
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// Additional sets of instructions.
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//===----------------------------------------------------------------------===//
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2015-07-11 02:23:10 +08:00
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include "WebAssemblyInstrMemory.td"
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include "WebAssemblyInstrCall.td"
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2015-08-01 01:53:38 +08:00
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include "WebAssemblyInstrControl.td"
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2015-07-11 02:23:10 +08:00
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include "WebAssemblyInstrInteger.td"
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include "WebAssemblyInstrFloat.td"
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include "WebAssemblyInstrConv.td"
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2015-06-30 07:51:55 +08:00
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include "WebAssemblyInstrAtomics.td"
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include "WebAssemblyInstrSIMD.td"
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