2016-03-30 00:11:29 +08:00
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; NOTE: Assertions have been autogenerated by update_test_checks.py
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2011-01-07 19:35:21 +08:00
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; RUN: llc -mtriple=i386-apple-darwin -mcpu=yonah < %s | FileCheck %s
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2008-08-22 05:00:15 +08:00
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declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind
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2010-04-02 02:19:11 +08:00
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define fastcc void @t1() nounwind {
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2013-07-14 14:24:09 +08:00
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; CHECK-LABEL: t1:
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2016-04-06 01:12:19 +08:00
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; CHECK: ## BB#0: ## %entry
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2016-04-07 08:05:49 +08:00
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; CHECK-NEXT: subl $16, %esp
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2016-04-06 01:12:19 +08:00
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; CHECK-NEXT: pushl $188
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2016-03-31 07:38:01 +08:00
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; CHECK-NEXT: pushl $0
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; CHECK-NEXT: pushl $0
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2016-03-30 00:11:29 +08:00
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; CHECK-NEXT: calll L_memset$stub
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2016-04-06 01:12:19 +08:00
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; CHECK-NEXT: addl $16, %esp
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2016-03-30 00:11:29 +08:00
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;
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entry:
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2015-11-19 13:56:52 +08:00
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call void @llvm.memset.p0i8.i32(i8* null, i8 0, i32 188, i32 1, i1 false)
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2010-04-01 14:04:33 +08:00
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unreachable
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2008-08-22 05:00:15 +08:00
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}
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2010-04-02 02:19:11 +08:00
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define fastcc void @t2(i8 signext %c) nounwind {
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2013-07-14 14:24:09 +08:00
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; CHECK-LABEL: t2:
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2016-04-06 01:12:19 +08:00
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: subl $12, %esp
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2016-03-30 00:11:29 +08:00
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; CHECK-NEXT: movl %ecx, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl $76, {{[0-9]+}}(%esp)
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; CHECK-NEXT: calll L_memset$stub
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;
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entry:
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2015-11-19 13:56:52 +08:00
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call void @llvm.memset.p0i8.i32(i8* undef, i8 %c, i32 76, i32 1, i1 false)
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2010-04-02 02:19:11 +08:00
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unreachable
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}
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Lower the i8 extension in memset to a multiply instead of a potentially long series of shifts and ors.
We could implement a DAGCombine to turn x * 0x0101 back into logic operations
on targets that doesn't support the multiply or it is slow (p4) if someone cares
enough.
Example code:
void test(char *s, int a) {
__builtin_memset(s, a, 4);
}
before:
_test: ## @test
movzbl 8(%esp), %eax
movl %eax, %ecx
shll $8, %ecx
orl %eax, %ecx
movl %ecx, %eax
shll $16, %eax
orl %ecx, %eax
movl 4(%esp), %ecx
movl %eax, 4(%ecx)
movl %eax, (%ecx)
ret
after:
_test: ## @test
movzbl 8(%esp), %eax
imull $16843009, %eax, %eax ## imm = 0x1010101
movl 4(%esp), %ecx
movl %eax, 4(%ecx)
movl %eax, (%ecx)
ret
llvm-svn: 122707
2011-01-03 03:44:58 +08:00
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2015-11-19 13:56:52 +08:00
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declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind
|
Lower the i8 extension in memset to a multiply instead of a potentially long series of shifts and ors.
We could implement a DAGCombine to turn x * 0x0101 back into logic operations
on targets that doesn't support the multiply or it is slow (p4) if someone cares
enough.
Example code:
void test(char *s, int a) {
__builtin_memset(s, a, 4);
}
before:
_test: ## @test
movzbl 8(%esp), %eax
movl %eax, %ecx
shll $8, %ecx
orl %eax, %ecx
movl %ecx, %eax
shll $16, %eax
orl %ecx, %eax
movl 4(%esp), %ecx
movl %eax, 4(%ecx)
movl %eax, (%ecx)
ret
after:
_test: ## @test
movzbl 8(%esp), %eax
imull $16843009, %eax, %eax ## imm = 0x1010101
movl 4(%esp), %ecx
movl %eax, 4(%ecx)
movl %eax, (%ecx)
ret
llvm-svn: 122707
2011-01-03 03:44:58 +08:00
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define void @t3(i8* nocapture %s, i8 %a) nounwind {
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2016-03-30 00:11:29 +08:00
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; CHECK-LABEL: t3:
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2016-04-06 01:12:19 +08:00
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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2016-03-30 00:11:29 +08:00
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; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: imull $16843009, %ecx, %ecx ## imm = 0x1010101
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; CHECK-NEXT: movl %ecx, 4(%eax)
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; CHECK-NEXT: movl %ecx, (%eax)
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; CHECK-NEXT: retl
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;
|
Lower the i8 extension in memset to a multiply instead of a potentially long series of shifts and ors.
We could implement a DAGCombine to turn x * 0x0101 back into logic operations
on targets that doesn't support the multiply or it is slow (p4) if someone cares
enough.
Example code:
void test(char *s, int a) {
__builtin_memset(s, a, 4);
}
before:
_test: ## @test
movzbl 8(%esp), %eax
movl %eax, %ecx
shll $8, %ecx
orl %eax, %ecx
movl %ecx, %eax
shll $16, %eax
orl %ecx, %eax
movl 4(%esp), %ecx
movl %eax, 4(%ecx)
movl %eax, (%ecx)
ret
after:
_test: ## @test
movzbl 8(%esp), %eax
imull $16843009, %eax, %eax ## imm = 0x1010101
movl 4(%esp), %ecx
movl %eax, 4(%ecx)
movl %eax, (%ecx)
ret
llvm-svn: 122707
2011-01-03 03:44:58 +08:00
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entry:
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2015-11-19 13:56:52 +08:00
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tail call void @llvm.memset.p0i8.i32(i8* %s, i8 %a, i32 8, i32 1, i1 false)
|
Lower the i8 extension in memset to a multiply instead of a potentially long series of shifts and ors.
We could implement a DAGCombine to turn x * 0x0101 back into logic operations
on targets that doesn't support the multiply or it is slow (p4) if someone cares
enough.
Example code:
void test(char *s, int a) {
__builtin_memset(s, a, 4);
}
before:
_test: ## @test
movzbl 8(%esp), %eax
movl %eax, %ecx
shll $8, %ecx
orl %eax, %ecx
movl %ecx, %eax
shll $16, %eax
orl %ecx, %eax
movl 4(%esp), %ecx
movl %eax, 4(%ecx)
movl %eax, (%ecx)
ret
after:
_test: ## @test
movzbl 8(%esp), %eax
imull $16843009, %eax, %eax ## imm = 0x1010101
movl 4(%esp), %ecx
movl %eax, 4(%ecx)
movl %eax, (%ecx)
ret
llvm-svn: 122707
2011-01-03 03:44:58 +08:00
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ret void
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}
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|
2011-01-03 03:57:05 +08:00
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define void @t4(i8* nocapture %s, i8 %a) nounwind {
|
2016-03-30 00:11:29 +08:00
|
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|
; CHECK-LABEL: t4:
|
2016-04-06 01:12:19 +08:00
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
|
2016-03-30 00:11:29 +08:00
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; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: imull $16843009, %ecx, %ecx ## imm = 0x1010101
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; CHECK-NEXT: movl %ecx, 8(%eax)
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; CHECK-NEXT: movl %ecx, 4(%eax)
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; CHECK-NEXT: movl %ecx, (%eax)
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; CHECK-NEXT: movw %cx, 12(%eax)
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; CHECK-NEXT: movb %cl, 14(%eax)
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; CHECK-NEXT: retl
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;
|
2011-01-03 03:57:05 +08:00
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entry:
|
2015-11-19 13:56:52 +08:00
|
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|
tail call void @llvm.memset.p0i8.i32(i8* %s, i8 %a, i32 15, i32 1, i1 false)
|
2011-01-03 03:57:05 +08:00
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ret void
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}
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