forked from OSchip/llvm-project
75 lines
3.5 KiB
LLVM
75 lines
3.5 KiB
LLVM
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
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;
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; LD1B, LD1W, LD1H, LD1D: base + 64-bit unscaled offset
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; e.g. ld1h { z0.d }, p0/z, [x0, z0.d]
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;
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define <vscale x 2 x i64> @gld1b_d(<vscale x 2 x i1> %pg, i8* %base, <vscale x 2 x i64> %b) {
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; CHECK-LABEL: gld1b_d:
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; CHECK: ld1b { z0.d }, p0/z, [x0, z0.d]
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; CHECK-NEXT: mov w8, #255
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; CHECK-NEXT: mov z1.d, x8
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; CHECK-NEXT: and z0.d, z0.d, z1.d
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; CHECK-NEXT: ret
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%load = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.gather.nxv2i8(<vscale x 2 x i1> %pg,
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i8* %base,
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<vscale x 2 x i64> %b)
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%res = zext <vscale x 2 x i8> %load to <vscale x 2 x i64>
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ret <vscale x 2 x i64> %res
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}
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define <vscale x 2 x i64> @gld1h_d(<vscale x 2 x i1> %pg, i16* %base, <vscale x 2 x i64> %b) {
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; CHECK-LABEL: gld1h_d:
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; CHECK: ld1h { z0.d }, p0/z, [x0, z0.d]
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; CHECK-NEXT: mov w8, #65535
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; CHECK-NEXT: mov z1.d, x8
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; CHECK-NEXT: and z0.d, z0.d, z1.d
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; CHECK-NEXT: ret
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%load = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.nxv2i16(<vscale x 2 x i1> %pg,
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i16* %base,
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<vscale x 2 x i64> %b)
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%res = zext <vscale x 2 x i16> %load to <vscale x 2 x i64>
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ret <vscale x 2 x i64> %res
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}
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define <vscale x 2 x i64> @gld1w_d(<vscale x 2 x i1> %pg, i32* %base, <vscale x 2 x i64> %offsets) {
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; CHECK-LABEL: gld1w_d:
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; CHECK: ld1w { z0.d }, p0/z, [x0, z0.d]
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; CHECK-NEXT: mov w8, #-1
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; CHECK-NEXT: mov z1.d, x8
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; CHECK-NEXT: and z0.d, z0.d, z1.d
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; CHECK-NEXT: ret
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%load = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.nxv2i32(<vscale x 2 x i1> %pg,
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i32* %base,
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<vscale x 2 x i64> %offsets)
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%res = zext <vscale x 2 x i32> %load to <vscale x 2 x i64>
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ret <vscale x 2 x i64> %res
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}
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define <vscale x 2 x i64> @gld1d_d(<vscale x 2 x i1> %pg, i64* %base, <vscale x 2 x i64> %b) {
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; CHECK-LABEL: gld1d_d:
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; CHECK: ld1d { z0.d }, p0/z, [x0, z0.d]
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; CHECK-NEXT: ret
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%load = call <vscale x 2 x i64> @llvm.aarch64.sve.ld1.gather.nxv2i64(<vscale x 2 x i1> %pg,
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i64* %base,
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<vscale x 2 x i64> %b)
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ret <vscale x 2 x i64> %load
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}
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define <vscale x 2 x double> @gld1d_d_double(<vscale x 2 x i1> %pg, double* %base, <vscale x 2 x i64> %b) {
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; CHECK-LABEL: gld1d_d_double:
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; CHECK: ld1d { z0.d }, p0/z, [x0, z0.d]
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; CHECK-NEXT: ret
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%load = call <vscale x 2 x double> @llvm.aarch64.sve.ld1.gather.nxv2f64(<vscale x 2 x i1> %pg,
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double* %base,
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<vscale x 2 x i64> %b)
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ret <vscale x 2 x double> %load
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}
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declare <vscale x 2 x i8> @llvm.aarch64.sve.ld1.gather.nxv2i8(<vscale x 2 x i1>, i8*, <vscale x 2 x i64>)
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declare <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.nxv2i16(<vscale x 2 x i1>, i16*, <vscale x 2 x i64>)
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declare <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.nxv2i32(<vscale x 2 x i1>, i32*, <vscale x 2 x i64>)
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declare <vscale x 2 x i64> @llvm.aarch64.sve.ld1.gather.nxv2i64(<vscale x 2 x i1>, i64*, <vscale x 2 x i64>)
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declare <vscale x 2 x double> @llvm.aarch64.sve.ld1.gather.nxv2f64(<vscale x 2 x i1>, double*, <vscale x 2 x i64>)
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