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llvm-project/llvm/test/MC/Disassembler/ARM/thumb-MSR-MClass.txt

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Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit. Build on previous patches to successfully distinguish between an M-series and A/R-series MSR and MRS instruction. These take different mask names and have a *slightly* different opcode format. Add decoder and disassembler tests. Improvement on the previous patch - successfully distinguish between valid v6m and v7m masks (one is a subset of the other). The patch had to be edited slightly to apply to ToT. llvm-svn: 140696
2011-09-28 22:21:38 +08:00
# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 -mcpu cortex-m3 | FileCheck %s
# CHECK: msr primask, r0
0x80 0xf3 0x10 0x80
# CHECK: mrs r0, primask
0xef 0xf3 0x10 0x80