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llvm-project/llvm/test/Transforms/ConstantHoisting/ARM/const-addr-no-neg-offset.ll

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This implements a more optimal algorithm for selecting a base constant in constant hoisting. It not only takes into account the number of uses and the cost of expressions in which constants appear, but now also the resulting integer range of the offsets. Thus, the algorithm maximizes the number of uses within an integer range that will enable more efficient code generation. On ARM, for example, this will enable code size optimisations because less negative offsets will be created. Negative offsets/immediates are not supported by Thumb1 thus preventing more compact instruction encoding. Differential Revision: http://reviews.llvm.org/D21183 llvm-svn: 275382
2016-07-14 15:44:20 +08:00
; RUN: opt -mtriple=arm-arm-none-eabi -consthoist -S < %s | FileCheck %s
; There are different candidates here for the base constant: 1073876992 and
; 1073876996. But we don't want to see the latter because it results in
; negative offsets.
define void @foo() #0 {
entry:
; CHECK-LABEL: @foo
; CHECK-NOT: [[CONST1:%const_mat[0-9]*]] = add i32 %const, -4
%0 = load volatile i32, i32* inttoptr (i32 1073876992 to i32*), align 4096
%or = or i32 %0, 1
store volatile i32 %or, i32* inttoptr (i32 1073876992 to i32*), align 4096
%1 = load volatile i32, i32* inttoptr (i32 1073876996 to i32*), align 4
%and = and i32 %1, -117506048
store volatile i32 %and, i32* inttoptr (i32 1073876996 to i32*), align 4
%2 = load volatile i32, i32* inttoptr (i32 1073876992 to i32*), align 4096
%and1 = and i32 %2, -17367041
store volatile i32 %and1, i32* inttoptr (i32 1073876996 to i32*), align 4096
%3 = load volatile i32, i32* inttoptr (i32 1073876992 to i32*), align 4096
%and2 = and i32 %3, -262145
store volatile i32 %and2, i32* inttoptr (i32 1073876992 to i32*), align 4096
%4 = load volatile i32, i32* inttoptr (i32 1073876996 to i32*), align 4
%and3 = and i32 %4, -8323073
store volatile i32 %and3, i32* inttoptr (i32 1073876996 to i32*), align 4
store volatile i32 10420224, i32* inttoptr (i32 1073877000 to i32*), align 8
%5 = load volatile i32, i32* inttoptr (i32 1073876996 to i32*), align 4096
%or4 = or i32 %5, 65536
store volatile i32 %or4, i32* inttoptr (i32 1073876996 to i32*), align 4096
%6 = load volatile i32, i32* inttoptr (i32 1073881088 to i32*), align 8192
%or6.i.i = or i32 %6, 16
store volatile i32 %or6.i.i, i32* inttoptr (i32 1073881088 to i32*), align 8192
%7 = load volatile i32, i32* inttoptr (i32 1073881088 to i32*), align 8192
%and7.i.i = and i32 %7, -4
store volatile i32 %and7.i.i, i32* inttoptr (i32 1073881088 to i32*), align 8192
%8 = load volatile i32, i32* inttoptr (i32 1073881088 to i32*), align 8192
%or8.i.i = or i32 %8, 2
store volatile i32 %or8.i.i, i32* inttoptr (i32 1073881088 to i32*), align 8192
ret void
}
attributes #0 = { minsize norecurse nounwind optsize readnone uwtable }