maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/llvm/test/Analysis/LoopInfo/annotated-parallel-complex.ll

Ignoring revisions in .git-blame-ignore-revs. Click here to bypass and see the normal blame view.

93 lines
2.7 KiB
LLVM
Raw Normal View History

[LoopInfo][NewPM] Fix tests in Analysis/LoopInfo under NPM
2020-09-23 02:30:05 +08:00
; RUN: opt -loops -analyze -enable-new-pm=0 < %s | FileCheck %s
; RUN: opt -passes='print<loops>' -disable-output %s 2>&1 | FileCheck %s
Introduce llvm.loop.parallel_accesses and llvm.access.group metadata. The current llvm.mem.parallel_loop_access metadata has a problem in that it uses LoopIDs. LoopID unfortunately is not loop identifier. It is neither unique (there's even a regression test assigning the some LoopID to multiple loops; can otherwise happen if passes such as LoopVersioning make copies of entire loops) nor persistent (every time a property is removed/added from a LoopID's MDNode, it will also receive a new LoopID; this happens e.g. when calling Loop::setLoopAlreadyUnrolled()). Since most loop transformation passes change the loop attributes (even if it just to mark that a loop should not be processed again as llvm.loop.isvectorized does, for the versioned and unversioned loop), the parallel access information is lost for any subsequent pass. This patch unlinks LoopIDs and parallel accesses. llvm.mem.parallel_loop_access metadata on instruction is replaced by llvm.access.group metadata. llvm.access.group points to a distinct MDNode with no operands (avoiding the problem to ever need to add/remove operands), called "access group". Alternatively, it can point to a list of access groups. The LoopID then has an attribute llvm.loop.parallel_accesses with all the access groups that are parallel (no dependencies carries by this loop). This intentionally avoid any kind of "ID". Loops that are clones/have their attributes modifies retain the llvm.loop.parallel_accesses attribute. Access instructions that a cloned point to the same access group. It is not necessary for each access to have it's own "ID" MDNode, but those memory access instructions with the same behavior can be grouped together. The behavior of llvm.mem.parallel_loop_access is not changed by this patch, but should be considered deprecated. Differential Revision: https://reviews.llvm.org/D52116 llvm-svn: 349725
2018-12-20 12:58:07 +08:00
;
; void func(long n, double A[static const restrict 4*n], double B[static const restrict 4*n]) {
; for (long i = 0; i < n; i += 1)
; for (long j = 0; j < n; j += 1)
; for (long k = 0; k < n; k += 1)
; for (long l = 0; l < n; l += 1) {
; A[i + j + k + l] = 21;
; B[i + j + k + l] = 42;
; }
; }
;
; Check that isAnnotatedParallel is working as expected.
;
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @func(i64 %n, double* noalias nonnull %A, double* noalias nonnull %B) {
entry:
br label %for.cond
for.cond:
%i.0 = phi i64 [ 0, %entry ], [ %add28, %for.inc27 ]
%cmp = icmp slt i64 %i.0, %n
br i1 %cmp, label %for.cond2, label %for.end29
for.cond2:
%j.0 = phi i64 [ %add25, %for.inc24 ], [ 0, %for.cond ]
%cmp3 = icmp slt i64 %j.0, %n
br i1 %cmp3, label %for.cond6, label %for.inc27
for.cond6:
%k.0 = phi i64 [ %add22, %for.inc21 ], [ 0, %for.cond2 ]
%cmp7 = icmp slt i64 %k.0, %n
br i1 %cmp7, label %for.cond10, label %for.inc24
for.cond10:
%l.0 = phi i64 [ %add20, %for.body13 ], [ 0, %for.cond6 ]
%cmp11 = icmp slt i64 %l.0, %n
br i1 %cmp11, label %for.body13, label %for.inc21
for.body13:
%add = add nuw nsw i64 %i.0, %j.0
%add14 = add nuw nsw i64 %add, %k.0
%add15 = add nuw nsw i64 %add14, %l.0
%arrayidx = getelementptr inbounds double, double* %A, i64 %add15
store double 2.100000e+01, double* %arrayidx, align 8, !llvm.access.group !5
%add16 = add nuw nsw i64 %i.0, %j.0
%add17 = add nuw nsw i64 %add16, %k.0
%add18 = add nuw nsw i64 %add17, %l.0
%arrayidx19 = getelementptr inbounds double, double* %B, i64 %add18
store double 4.200000e+01, double* %arrayidx19, align 8, !llvm.access.group !6
%add20 = add nuw nsw i64 %l.0, 1
br label %for.cond10, !llvm.loop !11
for.inc21:
%add22 = add nuw nsw i64 %k.0, 1
br label %for.cond6, !llvm.loop !14
for.inc24:
%add25 = add nuw nsw i64 %j.0, 1
br label %for.cond2, !llvm.loop !16
for.inc27:
%add28 = add nuw nsw i64 %i.0, 1
br label %for.cond, !llvm.loop !18
for.end29:
ret void
}
; access groups
!7 = distinct !{}
!8 = distinct !{}
!10 = distinct !{}
; access group lists
!5 = !{!7, !10}
!6 = !{!7, !8, !10}
; LoopIDs
!11 = distinct !{!11, !{!"llvm.loop.parallel_accesses", !10}}
!14 = distinct !{!14, !{!"llvm.loop.parallel_accesses", !8, !10}}
!16 = distinct !{!16, !{!"llvm.loop.parallel_accesses", !8}}
!18 = distinct !{!18, !{!"llvm.loop.parallel_accesses", !7}}
; CHECK: Parallel Loop at depth 1
; CHECK-NOT: Parallel
; CHECK: Loop at depth 2
; CHECK: Parallel Loop
; CHECK: Parallel Loop