maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/clang/test/CodeGen/attr-target-x86.c

44 lines
2.4 KiB
C
Raw Normal View History

Add support for the the target attribute. Modeled after the gcc attribute of the same name, this feature allows source level annotations to correspond to backend code generation. In llvm particular parlance, this allows the adding of subtarget features and changing the cpu for a particular function based on source level hints. This has been added into the existing support for function level attributes without particular verification for any target outside of whether or not the backend will support the features/cpu given (similar to section, etc). llvm-svn: 239579
2015-06-12 09:35:52 +08:00
// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu x86-64 -emit-llvm %s -o - | FileCheck %s
int baz(int a) { return 4; }
int __attribute__((target("avx,sse4.2,arch=ivybridge"))) foo(int a) { return 4; }
Add support for tune= to the target attribute support by ignoring it. We don't currently support the -mtune option in any useful way so ignoring the annotation is fine. llvm-svn: 239580
2015-06-12 09:35:56 +08:00
int __attribute__((target("tune=sandybridge"))) walrus(int a) { return 4; }
Handle fpmath= in the target attribute. Right now we're ignoring the fpmath attribute since there's no backend support for a feature like this and to do so would require checking the validity of the strings and doing general subtarget feature parsing of valid and invalid features with the target attribute feature. llvm-svn: 239582
2015-06-12 09:36:00 +08:00
int __attribute__((target("fpmath=387"))) koala(int a) { return 4; }
Add support for tune= to the target attribute support by ignoring it. We don't currently support the -mtune option in any useful way so ignoring the annotation is fine. llvm-svn: 239580
2015-06-12 09:35:56 +08:00
Target attribute syntax compatibility fix - gcc uses no- rather than mno-. llvm-svn: 246197
2015-08-28 04:05:48 +08:00
int __attribute__((target("no-sse2"))) echidna(int a) { return 4; }
Handle -mno-<feature> in target attribute strings by replacing the -mno- with a -<feature> to match how we handle this in the rest of the frontend. llvm-svn: 239581
2015-06-12 09:35:58 +08:00
Fix sse4 for target attribute feature additions. This reinstates part of the hack removed in r233223, by special casing sse4 as part of the feature additions. The notable change here is that we consider it only as part of setting the SSE level and not as part of the actual target features set which handles setting the rest of the masks. llvm-svn: 241130
2015-07-01 08:08:32 +08:00
int __attribute__((target("sse4"))) panda(int a) { return 4; }
Add support for the the target attribute. Modeled after the gcc attribute of the same name, this feature allows source level annotations to correspond to backend code generation. In llvm particular parlance, this allows the adding of subtarget features and changing the cpu for a particular function based on source level hints. This has been added into the existing support for function level attributes without particular verification for any target outside of whether or not the backend will support the features/cpu given (similar to section, etc). llvm-svn: 239579
2015-06-12 09:35:52 +08:00
int bar(int a) { return baz(a) + foo(a); }
Handle arbitrary whitespace in the target attribute support. This allows us to deal a bit more gracefully with inclusions done by macros, token pasting, or just code layout/formatting. llvm-svn: 241525
2015-07-07 07:51:59 +08:00
int __attribute__((target("avx, sse4.2, arch= ivybridge"))) qux(int a) { return 4; }
Target attribute syntax compatibility fix - gcc uses no- rather than mno-. llvm-svn: 246197
2015-08-28 04:05:48 +08:00
int __attribute__((target("no-aes, arch=ivybridge"))) qax(int a) { return 4; }
Handle arbitrary whitespace in the target attribute support. This allows us to deal a bit more gracefully with inclusions done by macros, token pasting, or just code layout/formatting. llvm-svn: 241525
2015-07-07 07:51:59 +08:00
Handle sse turning on mmx, but no -mmx not turning off SSE. Rationale : // sse3 __m128d test_mm_addsub_pd(__m128d A, __m128d B) { return _mm_addsub_pd(A, B); } // mmx void shift(__m64 a, __m64 b, int c) { _mm_slli_pi16(a, c); _mm_slli_pi32(a, c); _mm_slli_si64(a, c); _mm_srli_pi16(a, c); _mm_srli_pi32(a, c); _mm_srli_si64(a, c); _mm_srai_pi16(a, c); _mm_srai_pi32(a, c); } clang -msse3 -mno-mmx file.c -c For this code we should be able to explicitly turn off MMX without affecting the compilation of the SSE3 function and then diagnose and error on compiling the MMX function. This is a preparatory patch to the actual diagnosis code which is coming in a future patch. This sets us up to have the correct information where we need it and verifies that it's being emitted for the backend to handle. llvm-svn: 249733
2015-10-09 04:10:18 +08:00
int __attribute__((target("no-mmx"))) qq(int a) { return 40; }
[X86] Introduction of -march=lakemont. Differential Revision: http://reviews.llvm.org/D18651 llvm-svn: 265405
2016-04-05 23:04:26 +08:00
int __attribute__((target("arch=lakemont"))) lake(int a) { return 4; }
Add support for the the target attribute. Modeled after the gcc attribute of the same name, this feature allows source level annotations to correspond to backend code generation. In llvm particular parlance, this allows the adding of subtarget features and changing the cpu for a particular function based on source level hints. This has been added into the existing support for function level attributes without particular verification for any target outside of whether or not the backend will support the features/cpu given (similar to section, etc). llvm-svn: 239579
2015-06-12 09:35:52 +08:00
// Check that we emit the additional subtarget and cpu features for foo and not for baz or bar.
// CHECK: baz{{.*}} #0
// CHECK: foo{{.*}} #1
Add support for tune= to the target attribute support by ignoring it. We don't currently support the -mtune option in any useful way so ignoring the annotation is fine. llvm-svn: 239580
2015-06-12 09:35:56 +08:00
// We ignore the tune attribute so walrus should be identical to baz and bar.
// CHECK: walrus{{.*}} #0
Handle fpmath= in the target attribute. Right now we're ignoring the fpmath attribute since there's no backend support for a feature like this and to do so would require checking the validity of the strings and doing general subtarget feature parsing of valid and invalid features with the target attribute feature. llvm-svn: 239582
2015-06-12 09:36:00 +08:00
// We're currently ignoring the fpmath attribute so koala should be identical to baz and bar.
// CHECK: koala{{.*}} #0
Handle -mno-<feature> in target attribute strings by replacing the -mno- with a -<feature> to match how we handle this in the rest of the frontend. llvm-svn: 239581
2015-06-12 09:35:58 +08:00
// CHECK: echidna{{.*}} #2
Add a check for a function we're not testing. llvm-svn: 246355
2015-08-29 10:59:37 +08:00
// CHECK: panda{{.*}} #3
Add support for the the target attribute. Modeled after the gcc attribute of the same name, this feature allows source level annotations to correspond to backend code generation. In llvm particular parlance, this allows the adding of subtarget features and changing the cpu for a particular function based on source level hints. This has been added into the existing support for function level attributes without particular verification for any target outside of whether or not the backend will support the features/cpu given (similar to section, etc). llvm-svn: 239579
2015-06-12 09:35:52 +08:00
// CHECK: bar{{.*}} #0
Handle arbitrary whitespace in the target attribute support. This allows us to deal a bit more gracefully with inclusions done by macros, token pasting, or just code layout/formatting. llvm-svn: 241525
2015-07-07 07:51:59 +08:00
// CHECK: qux{{.*}} #1
Rewrite the code generation handling for function feature and cpu attributes. A couple of changes here: a) Do less work in the case where we don't have a target attribute on the function. We've already canonicalized the attributes for the function - no need to do more work. b) Use the newer canonicalized feature adding functions from TargetInfo to do the work when we do have a target attribute. This enables us to diagnose some warnings in the case of conflicting written attributes (only ppc does this today) and also make sure to get all of the features for a cpu that's listed rather than just change the cpu. Updated all testcases accordingly and added a new testcase to verify that we'll error out on ppc if we have some incompatible options using the existing diagnosis framework there. llvm-svn: 246195
2015-08-28 03:59:34 +08:00
// CHECK: qax{{.*}} #4
Handle sse turning on mmx, but no -mmx not turning off SSE. Rationale : // sse3 __m128d test_mm_addsub_pd(__m128d A, __m128d B) { return _mm_addsub_pd(A, B); } // mmx void shift(__m64 a, __m64 b, int c) { _mm_slli_pi16(a, c); _mm_slli_pi32(a, c); _mm_slli_si64(a, c); _mm_srli_pi16(a, c); _mm_srli_pi32(a, c); _mm_srli_si64(a, c); _mm_srai_pi16(a, c); _mm_srai_pi32(a, c); } clang -msse3 -mno-mmx file.c -c For this code we should be able to explicitly turn off MMX without affecting the compilation of the SSE3 function and then diagnose and error on compiling the MMX function. This is a preparatory patch to the actual diagnosis code which is coming in a future patch. This sets us up to have the correct information where we need it and verifies that it's being emitted for the backend to handle. llvm-svn: 249733
2015-10-09 04:10:18 +08:00
// CHECK: qq{{.*}} #5
[X86] Introduction of -march=lakemont. Differential Revision: http://reviews.llvm.org/D18651 llvm-svn: 265405
2016-04-05 23:04:26 +08:00
// CHECK: lake{{.*}} #6
[X86] Add "x87" in x86 target feature map. Differential Revision: http://reviews.llvm.org/D13980 llvm-svn: 264149
2016-03-23 19:15:10 +08:00
// CHECK: #0 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87"
// CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+aes,+avx,+cx16,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt"
// CHECK: #2 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+x87,-aes,-avx,-avx2,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vl,-f16c,-fma,-fma4,-pclmul,-sha,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-xop,-xsave,-xsaveopt"
// CHECK: #3 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87"
// CHECK: #4 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cx16,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt,-aes"
// CHECK: #5 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+sse,+sse2,+x87,-3dnow,-3dnowa,-mmx"
[X86] Introduction of -march=lakemont. Differential Revision: http://reviews.llvm.org/D18651 llvm-svn: 265405
2016-04-05 23:04:26 +08:00
// CHECK: #6 = {{.*}}"target-cpu"="lakemont" "target-features"="+mmx,+sse,+sse2"