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llvm-project/clang/test/Preprocessor/predefined-arch-macros.c

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Add a little banner to this test. This lets my scripts more easily automate the process of updating and generating these tests. If anyone is really interested, I can check my scripts for generating this test in, but its a horrible pile of shell... Not sure its really worth it. llvm-svn: 140691
2011-09-28 18:17:41 +08:00
// Begin X86/GCC/Linux tests ----------------
//
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// RUN: %clang -march=i386 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_I386_M32
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_I386_M32: #define __i386 1
// CHECK_I386_M32: #define __i386__ 1
// CHECK_I386_M32: #define __tune_i386__ 1
// CHECK_I386_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=i386 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_I386_M64
// CHECK_I386_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=i486 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_I486_M32
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_I486_M32: #define __i386 1
// CHECK_I486_M32: #define __i386__ 1
// CHECK_I486_M32: #define __i486 1
// CHECK_I486_M32: #define __i486__ 1
// CHECK_I486_M32: #define __tune_i486__ 1
// CHECK_I486_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=i486 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_I486_M64
// CHECK_I486_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=i586 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_I586_M32
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_I586_M32: #define __i386 1
// CHECK_I586_M32: #define __i386__ 1
// CHECK_I586_M32: #define __i586 1
// CHECK_I586_M32: #define __i586__ 1
// CHECK_I586_M32: #define __pentium 1
// CHECK_I586_M32: #define __pentium__ 1
// CHECK_I586_M32: #define __tune_i586__ 1
// CHECK_I586_M32: #define __tune_pentium__ 1
// CHECK_I586_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=i586 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_I586_M64
// CHECK_I586_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=pentium -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM_M32
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_PENTIUM_M32: #define __i386 1
// CHECK_PENTIUM_M32: #define __i386__ 1
// CHECK_PENTIUM_M32: #define __i586 1
// CHECK_PENTIUM_M32: #define __i586__ 1
// CHECK_PENTIUM_M32: #define __pentium 1
// CHECK_PENTIUM_M32: #define __pentium__ 1
// CHECK_PENTIUM_M32: #define __tune_i586__ 1
// CHECK_PENTIUM_M32: #define __tune_pentium__ 1
// CHECK_PENTIUM_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=pentium -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM_M64
// CHECK_PENTIUM_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=pentium-mmx -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM_MMX_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_PENTIUM_MMX_M32: #define __MMX__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_PENTIUM_MMX_M32: #define __i386 1
// CHECK_PENTIUM_MMX_M32: #define __i386__ 1
// CHECK_PENTIUM_MMX_M32: #define __i586 1
// CHECK_PENTIUM_MMX_M32: #define __i586__ 1
// CHECK_PENTIUM_MMX_M32: #define __pentium 1
// CHECK_PENTIUM_MMX_M32: #define __pentium__ 1
// CHECK_PENTIUM_MMX_M32: #define __pentium_mmx__ 1
// CHECK_PENTIUM_MMX_M32: #define __tune_i586__ 1
// CHECK_PENTIUM_MMX_M32: #define __tune_pentium__ 1
// CHECK_PENTIUM_MMX_M32: #define __tune_pentium_mmx__ 1
// CHECK_PENTIUM_MMX_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=pentium-mmx -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM_MMX_M64
// CHECK_PENTIUM_MMX_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=winchip-c6 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_WINCHIP_C6_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_WINCHIP_C6_M32: #define __MMX__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_WINCHIP_C6_M32: #define __i386 1
// CHECK_WINCHIP_C6_M32: #define __i386__ 1
// CHECK_WINCHIP_C6_M32: #define __i486 1
// CHECK_WINCHIP_C6_M32: #define __i486__ 1
// CHECK_WINCHIP_C6_M32: #define __tune_i486__ 1
// CHECK_WINCHIP_C6_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=winchip-c6 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_WINCHIP_C6_M64
// CHECK_WINCHIP_C6_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=winchip2 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_WINCHIP2_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_WINCHIP2_M32: #define __3dNOW__ 1
// CHECK_WINCHIP2_M32: #define __MMX__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_WINCHIP2_M32: #define __i386 1
// CHECK_WINCHIP2_M32: #define __i386__ 1
// CHECK_WINCHIP2_M32: #define __i486 1
// CHECK_WINCHIP2_M32: #define __i486__ 1
// CHECK_WINCHIP2_M32: #define __tune_i486__ 1
// CHECK_WINCHIP2_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=winchip2 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_WINCHIP2_M64
// CHECK_WINCHIP2_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=c3 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_C3_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_C3_M32: #define __3dNOW__ 1
// CHECK_C3_M32: #define __MMX__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_C3_M32: #define __i386 1
// CHECK_C3_M32: #define __i386__ 1
// CHECK_C3_M32: #define __i486 1
// CHECK_C3_M32: #define __i486__ 1
// CHECK_C3_M32: #define __tune_i486__ 1
// CHECK_C3_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=c3 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_C3_M64
// CHECK_C3_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=c3-2 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_C3_2_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_C3_2_M32: #define __MMX__ 1
// CHECK_C3_2_M32: #define __SSE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_C3_2_M32: #define __i386 1
// CHECK_C3_2_M32: #define __i386__ 1
// CHECK_C3_2_M32: #define __i686 1
// CHECK_C3_2_M32: #define __i686__ 1
// CHECK_C3_2_M32: #define __pentiumpro 1
// CHECK_C3_2_M32: #define __pentiumpro__ 1
// CHECK_C3_2_M32: #define __tune_i686__ 1
// CHECK_C3_2_M32: #define __tune_pentium2__ 1
// CHECK_C3_2_M32: #define __tune_pentiumpro__ 1
// CHECK_C3_2_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=c3-2 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_C3_2_M64
// CHECK_C3_2_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=i686 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_I686_M32
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_I686_M32: #define __i386 1
// CHECK_I686_M32: #define __i386__ 1
// CHECK_I686_M32: #define __i686 1
// CHECK_I686_M32: #define __i686__ 1
// CHECK_I686_M32: #define __pentiumpro 1
// CHECK_I686_M32: #define __pentiumpro__ 1
// CHECK_I686_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=i686 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_I686_M64
// CHECK_I686_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=pentiumpro -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUMPRO_M32
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_PENTIUMPRO_M32: #define __i386 1
// CHECK_PENTIUMPRO_M32: #define __i386__ 1
// CHECK_PENTIUMPRO_M32: #define __i686 1
// CHECK_PENTIUMPRO_M32: #define __i686__ 1
// CHECK_PENTIUMPRO_M32: #define __pentiumpro 1
// CHECK_PENTIUMPRO_M32: #define __pentiumpro__ 1
// CHECK_PENTIUMPRO_M32: #define __tune_i686__ 1
// CHECK_PENTIUMPRO_M32: #define __tune_pentiumpro__ 1
// CHECK_PENTIUMPRO_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=pentiumpro -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUMPRO_M64
// CHECK_PENTIUMPRO_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=pentium2 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM2_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_PENTIUM2_M32: #define __MMX__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_PENTIUM2_M32: #define __i386 1
// CHECK_PENTIUM2_M32: #define __i386__ 1
// CHECK_PENTIUM2_M32: #define __i686 1
// CHECK_PENTIUM2_M32: #define __i686__ 1
// CHECK_PENTIUM2_M32: #define __pentiumpro 1
// CHECK_PENTIUM2_M32: #define __pentiumpro__ 1
// CHECK_PENTIUM2_M32: #define __tune_i686__ 1
// CHECK_PENTIUM2_M32: #define __tune_pentium2__ 1
// CHECK_PENTIUM2_M32: #define __tune_pentiumpro__ 1
// CHECK_PENTIUM2_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=pentium2 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM2_M64
// CHECK_PENTIUM2_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=pentium3 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM3_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_PENTIUM3_M32: #define __MMX__ 1
// CHECK_PENTIUM3_M32: #define __SSE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_PENTIUM3_M32: #define __i386 1
// CHECK_PENTIUM3_M32: #define __i386__ 1
// CHECK_PENTIUM3_M32: #define __i686 1
// CHECK_PENTIUM3_M32: #define __i686__ 1
// CHECK_PENTIUM3_M32: #define __pentiumpro 1
// CHECK_PENTIUM3_M32: #define __pentiumpro__ 1
// CHECK_PENTIUM3_M32: #define __tune_i686__ 1
// CHECK_PENTIUM3_M32: #define __tune_pentium2__ 1
// CHECK_PENTIUM3_M32: #define __tune_pentium3__ 1
// CHECK_PENTIUM3_M32: #define __tune_pentiumpro__ 1
// CHECK_PENTIUM3_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=pentium3 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM3_M64
// CHECK_PENTIUM3_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=pentium3m -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM3M_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_PENTIUM3M_M32: #define __MMX__ 1
// CHECK_PENTIUM3M_M32: #define __SSE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_PENTIUM3M_M32: #define __i386 1
// CHECK_PENTIUM3M_M32: #define __i386__ 1
// CHECK_PENTIUM3M_M32: #define __i686 1
// CHECK_PENTIUM3M_M32: #define __i686__ 1
// CHECK_PENTIUM3M_M32: #define __pentiumpro 1
// CHECK_PENTIUM3M_M32: #define __pentiumpro__ 1
// CHECK_PENTIUM3M_M32: #define __tune_i686__ 1
// CHECK_PENTIUM3M_M32: #define __tune_pentiumpro__ 1
// CHECK_PENTIUM3M_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=pentium3m -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM3M_M64
// CHECK_PENTIUM3M_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=pentium-m -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM_M_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_PENTIUM_M_M32: #define __MMX__ 1
// CHECK_PENTIUM_M_M32: #define __SSE2__ 1
// CHECK_PENTIUM_M_M32: #define __SSE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_PENTIUM_M_M32: #define __i386 1
// CHECK_PENTIUM_M_M32: #define __i386__ 1
// CHECK_PENTIUM_M_M32: #define __i686 1
// CHECK_PENTIUM_M_M32: #define __i686__ 1
// CHECK_PENTIUM_M_M32: #define __pentiumpro 1
// CHECK_PENTIUM_M_M32: #define __pentiumpro__ 1
// CHECK_PENTIUM_M_M32: #define __tune_i686__ 1
// CHECK_PENTIUM_M_M32: #define __tune_pentiumpro__ 1
// CHECK_PENTIUM_M_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=pentium-m -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM_M_M64
// CHECK_PENTIUM_M_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=pentium4 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM4_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_PENTIUM4_M32: #define __MMX__ 1
// CHECK_PENTIUM4_M32: #define __SSE2__ 1
// CHECK_PENTIUM4_M32: #define __SSE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_PENTIUM4_M32: #define __i386 1
// CHECK_PENTIUM4_M32: #define __i386__ 1
// CHECK_PENTIUM4_M32: #define __pentium4 1
// CHECK_PENTIUM4_M32: #define __pentium4__ 1
// CHECK_PENTIUM4_M32: #define __tune_pentium4__ 1
// CHECK_PENTIUM4_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=pentium4 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM4_M64
// CHECK_PENTIUM4_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=pentium4m -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM4M_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_PENTIUM4M_M32: #define __MMX__ 1
// CHECK_PENTIUM4M_M32: #define __SSE2__ 1
// CHECK_PENTIUM4M_M32: #define __SSE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_PENTIUM4M_M32: #define __i386 1
// CHECK_PENTIUM4M_M32: #define __i386__ 1
// CHECK_PENTIUM4M_M32: #define __pentium4 1
// CHECK_PENTIUM4M_M32: #define __pentium4__ 1
// CHECK_PENTIUM4M_M32: #define __tune_pentium4__ 1
// CHECK_PENTIUM4M_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=pentium4m -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM4M_M64
// CHECK_PENTIUM4M_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=prescott -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PRESCOTT_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_PRESCOTT_M32: #define __MMX__ 1
// CHECK_PRESCOTT_M32: #define __SSE2__ 1
// CHECK_PRESCOTT_M32: #define __SSE3__ 1
// CHECK_PRESCOTT_M32: #define __SSE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_PRESCOTT_M32: #define __i386 1
// CHECK_PRESCOTT_M32: #define __i386__ 1
// CHECK_PRESCOTT_M32: #define __nocona 1
// CHECK_PRESCOTT_M32: #define __nocona__ 1
// CHECK_PRESCOTT_M32: #define __tune_nocona__ 1
// CHECK_PRESCOTT_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=prescott -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PRESCOTT_M64
// CHECK_PRESCOTT_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=nocona -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_NOCONA_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_NOCONA_M32: #define __MMX__ 1
// CHECK_NOCONA_M32: #define __SSE2__ 1
// CHECK_NOCONA_M32: #define __SSE3__ 1
// CHECK_NOCONA_M32: #define __SSE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_NOCONA_M32: #define __i386 1
// CHECK_NOCONA_M32: #define __i386__ 1
// CHECK_NOCONA_M32: #define __nocona 1
// CHECK_NOCONA_M32: #define __nocona__ 1
// CHECK_NOCONA_M32: #define __tune_nocona__ 1
// CHECK_NOCONA_M32: #define i386 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// RUN: %clang -march=nocona -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_NOCONA_M64
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_NOCONA_M64: #define __MMX__ 1
// CHECK_NOCONA_M64: #define __SSE2_MATH__ 1
// CHECK_NOCONA_M64: #define __SSE2__ 1
// CHECK_NOCONA_M64: #define __SSE3__ 1
// CHECK_NOCONA_M64: #define __SSE_MATH__ 1
// CHECK_NOCONA_M64: #define __SSE__ 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// CHECK_NOCONA_M64: #define __amd64 1
// CHECK_NOCONA_M64: #define __amd64__ 1
// CHECK_NOCONA_M64: #define __nocona 1
// CHECK_NOCONA_M64: #define __nocona__ 1
// CHECK_NOCONA_M64: #define __tune_nocona__ 1
// CHECK_NOCONA_M64: #define __x86_64 1
// CHECK_NOCONA_M64: #define __x86_64__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=core2 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_CORE2_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_CORE2_M32: #define __MMX__ 1
// CHECK_CORE2_M32: #define __SSE2__ 1
// CHECK_CORE2_M32: #define __SSE3__ 1
// CHECK_CORE2_M32: #define __SSE__ 1
// CHECK_CORE2_M32: #define __SSSE3__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_CORE2_M32: #define __core2 1
// CHECK_CORE2_M32: #define __core2__ 1
// CHECK_CORE2_M32: #define __i386 1
// CHECK_CORE2_M32: #define __i386__ 1
// CHECK_CORE2_M32: #define __tune_core2__ 1
// CHECK_CORE2_M32: #define i386 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// RUN: %clang -march=core2 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_CORE2_M64
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_CORE2_M64: #define __MMX__ 1
// CHECK_CORE2_M64: #define __SSE2_MATH__ 1
// CHECK_CORE2_M64: #define __SSE2__ 1
// CHECK_CORE2_M64: #define __SSE3__ 1
// CHECK_CORE2_M64: #define __SSE_MATH__ 1
// CHECK_CORE2_M64: #define __SSE__ 1
// CHECK_CORE2_M64: #define __SSSE3__ 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// CHECK_CORE2_M64: #define __amd64 1
// CHECK_CORE2_M64: #define __amd64__ 1
// CHECK_CORE2_M64: #define __core2 1
// CHECK_CORE2_M64: #define __core2__ 1
// CHECK_CORE2_M64: #define __tune_core2__ 1
// CHECK_CORE2_M64: #define __x86_64 1
// CHECK_CORE2_M64: #define __x86_64__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=corei7 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_COREI7_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_COREI7_M32: #define __MMX__ 1
Add __POPCNT__ to test cases for corei7 and corei7-avx llvm-svn: 157905
2012-06-04 05:49:41 +08:00
// CHECK_COREI7_M32: #define __POPCNT__ 1
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_COREI7_M32: #define __SSE2__ 1
// CHECK_COREI7_M32: #define __SSE3__ 1
// CHECK_COREI7_M32: #define __SSE4_1__ 1
// CHECK_COREI7_M32: #define __SSE4_2__ 1
// CHECK_COREI7_M32: #define __SSE__ 1
// CHECK_COREI7_M32: #define __SSSE3__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_COREI7_M32: #define __corei7 1
// CHECK_COREI7_M32: #define __corei7__ 1
// CHECK_COREI7_M32: #define __i386 1
// CHECK_COREI7_M32: #define __i386__ 1
// CHECK_COREI7_M32: #define __tune_corei7__ 1
// CHECK_COREI7_M32: #define i386 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// RUN: %clang -march=corei7 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_COREI7_M64
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_COREI7_M64: #define __MMX__ 1
Add __POPCNT__ to test cases for corei7 and corei7-avx llvm-svn: 157905
2012-06-04 05:49:41 +08:00
// CHECK_COREI7_M64: #define __POPCNT__ 1
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_COREI7_M64: #define __SSE2_MATH__ 1
// CHECK_COREI7_M64: #define __SSE2__ 1
// CHECK_COREI7_M64: #define __SSE3__ 1
// CHECK_COREI7_M64: #define __SSE4_1__ 1
// CHECK_COREI7_M64: #define __SSE4_2__ 1
// CHECK_COREI7_M64: #define __SSE_MATH__ 1
// CHECK_COREI7_M64: #define __SSE__ 1
// CHECK_COREI7_M64: #define __SSSE3__ 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// CHECK_COREI7_M64: #define __amd64 1
// CHECK_COREI7_M64: #define __amd64__ 1
// CHECK_COREI7_M64: #define __corei7 1
// CHECK_COREI7_M64: #define __corei7__ 1
// CHECK_COREI7_M64: #define __tune_corei7__ 1
// CHECK_COREI7_M64: #define __x86_64 1
// CHECK_COREI7_M64: #define __x86_64__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=corei7-avx -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_COREI7_AVX_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_COREI7_AVX_M32: #define __AES__ 1
Enable AVX/AVX2 for Sandy Bridge, Ivy Bridge, and Haswell CPUs. llvm-svn: 155624
2012-04-26 15:31:30 +08:00
// CHECK_COREI7_AVX_M32: #define __AVX__ 1
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_COREI7_AVX_M32: #define __MMX__ 1
Add fma feature flag for Intel FMA instructions. llvm-svn: 157904
2012-06-04 05:46:30 +08:00
// CHECK_COREI7_AVX_M32: #define __PCLMUL__ 1
Wire up -mrdrnd for X86. For some reason GCC decided to call the feature rdrnd instead of rdrand, which requires translating it for LLVM. llvm-svn: 159897
2012-07-07 17:39:18 +08:00
// CHECK_COREI7_AVX_M32-NOT: __RDRND__
Add __POPCNT__ to test cases for corei7 and corei7-avx llvm-svn: 157905
2012-06-04 05:49:41 +08:00
// CHECK_COREI7_AVX_M32: #define __POPCNT__ 1
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_COREI7_AVX_M32: #define __SSE2__ 1
// CHECK_COREI7_AVX_M32: #define __SSE3__ 1
// CHECK_COREI7_AVX_M32: #define __SSE4_1__ 1
// CHECK_COREI7_AVX_M32: #define __SSE4_2__ 1
// CHECK_COREI7_AVX_M32: #define __SSE__ 1
// CHECK_COREI7_AVX_M32: #define __SSSE3__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_COREI7_AVX_M32: #define __XSAVEOPT__ 1
// CHECK_COREI7_AVX_M32: #define __XSAVE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_COREI7_AVX_M32: #define __corei7 1
// CHECK_COREI7_AVX_M32: #define __corei7__ 1
// CHECK_COREI7_AVX_M32: #define __i386 1
// CHECK_COREI7_AVX_M32: #define __i386__ 1
// CHECK_COREI7_AVX_M32: #define __tune_corei7__ 1
// CHECK_COREI7_AVX_M32: #define i386 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// RUN: %clang -march=corei7-avx -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_COREI7_AVX_M64
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_COREI7_AVX_M64: #define __AES__ 1
Enable AVX/AVX2 for Sandy Bridge, Ivy Bridge, and Haswell CPUs. llvm-svn: 155624
2012-04-26 15:31:30 +08:00
// CHECK_COREI7_AVX_M64: #define __AVX__ 1
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_COREI7_AVX_M64: #define __MMX__ 1
Add fma feature flag for Intel FMA instructions. llvm-svn: 157904
2012-06-04 05:46:30 +08:00
// CHECK_COREI7_AVX_M64: #define __PCLMUL__ 1
Wire up -mrdrnd for X86. For some reason GCC decided to call the feature rdrnd instead of rdrand, which requires translating it for LLVM. llvm-svn: 159897
2012-07-07 17:39:18 +08:00
// CHECK_COREI7_AVX_M64-NOT: __RDRND__
Add __POPCNT__ to test cases for corei7 and corei7-avx llvm-svn: 157905
2012-06-04 05:49:41 +08:00
// CHECK_COREI7_AVX_M64: #define __POPCNT__ 1
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_COREI7_AVX_M64: #define __SSE2_MATH__ 1
// CHECK_COREI7_AVX_M64: #define __SSE2__ 1
// CHECK_COREI7_AVX_M64: #define __SSE3__ 1
// CHECK_COREI7_AVX_M64: #define __SSE4_1__ 1
// CHECK_COREI7_AVX_M64: #define __SSE4_2__ 1
// CHECK_COREI7_AVX_M64: #define __SSE_MATH__ 1
// CHECK_COREI7_AVX_M64: #define __SSE__ 1
// CHECK_COREI7_AVX_M64: #define __SSSE3__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_COREI7_AVX_M64: #define __XSAVEOPT__ 1
// CHECK_COREI7_AVX_M64: #define __XSAVE__ 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// CHECK_COREI7_AVX_M64: #define __amd64 1
// CHECK_COREI7_AVX_M64: #define __amd64__ 1
// CHECK_COREI7_AVX_M64: #define __corei7 1
// CHECK_COREI7_AVX_M64: #define __corei7__ 1
// CHECK_COREI7_AVX_M64: #define __tune_corei7__ 1
// CHECK_COREI7_AVX_M64: #define __x86_64 1
// CHECK_COREI7_AVX_M64: #define __x86_64__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=core-avx-i -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_CORE_AVX_I_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_CORE_AVX_I_M32: #define __AES__ 1
Enable AVX/AVX2 for Sandy Bridge, Ivy Bridge, and Haswell CPUs. llvm-svn: 155624
2012-04-26 15:31:30 +08:00
// CHECK_CORE_AVX_I_M32: #define __AVX__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_CORE_AVX_I_M32: #define __F16C__ 1
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_CORE_AVX_I_M32: #define __MMX__ 1
Add fma feature flag for Intel FMA instructions. llvm-svn: 157904
2012-06-04 05:46:30 +08:00
// CHECK_CORE_AVX_I_M32: #define __PCLMUL__ 1
Wire up -mrdrnd for X86. For some reason GCC decided to call the feature rdrnd instead of rdrand, which requires translating it for LLVM. llvm-svn: 159897
2012-07-07 17:39:18 +08:00
// CHECK_CORE_AVX_I_M32: #define __RDRND__ 1
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_CORE_AVX_I_M32: #define __SSE2__ 1
// CHECK_CORE_AVX_I_M32: #define __SSE3__ 1
// CHECK_CORE_AVX_I_M32: #define __SSE4_1__ 1
// CHECK_CORE_AVX_I_M32: #define __SSE4_2__ 1
// CHECK_CORE_AVX_I_M32: #define __SSE__ 1
// CHECK_CORE_AVX_I_M32: #define __SSSE3__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_CORE_AVX_I_M32: #define __XSAVEOPT__ 1
// CHECK_CORE_AVX_I_M32: #define __XSAVE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_CORE_AVX_I_M32: #define __corei7 1
// CHECK_CORE_AVX_I_M32: #define __corei7__ 1
// CHECK_CORE_AVX_I_M32: #define __i386 1
// CHECK_CORE_AVX_I_M32: #define __i386__ 1
// CHECK_CORE_AVX_I_M32: #define __tune_corei7__ 1
// CHECK_CORE_AVX_I_M32: #define i386 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// RUN: %clang -march=core-avx-i -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_CORE_AVX_I_M64
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_CORE_AVX_I_M64: #define __AES__ 1
Enable AVX/AVX2 for Sandy Bridge, Ivy Bridge, and Haswell CPUs. llvm-svn: 155624
2012-04-26 15:31:30 +08:00
// CHECK_CORE_AVX_I_M64: #define __AVX__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_CORE_AVX_I_M64: #define __F16C__ 1
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_CORE_AVX_I_M64: #define __MMX__ 1
Add fma feature flag for Intel FMA instructions. llvm-svn: 157904
2012-06-04 05:46:30 +08:00
// CHECK_CORE_AVX_I_M64: #define __PCLMUL__ 1
Wire up -mrdrnd for X86. For some reason GCC decided to call the feature rdrnd instead of rdrand, which requires translating it for LLVM. llvm-svn: 159897
2012-07-07 17:39:18 +08:00
// CHECK_CORE_AVX_I_M64: #define __RDRND__ 1
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_CORE_AVX_I_M64: #define __SSE2_MATH__ 1
// CHECK_CORE_AVX_I_M64: #define __SSE2__ 1
// CHECK_CORE_AVX_I_M64: #define __SSE3__ 1
// CHECK_CORE_AVX_I_M64: #define __SSE4_1__ 1
// CHECK_CORE_AVX_I_M64: #define __SSE4_2__ 1
// CHECK_CORE_AVX_I_M64: #define __SSE_MATH__ 1
// CHECK_CORE_AVX_I_M64: #define __SSE__ 1
// CHECK_CORE_AVX_I_M64: #define __SSSE3__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_CORE_AVX_I_M64: #define __XSAVEOPT__ 1
// CHECK_CORE_AVX_I_M64: #define __XSAVE__ 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// CHECK_CORE_AVX_I_M64: #define __amd64 1
// CHECK_CORE_AVX_I_M64: #define __amd64__ 1
// CHECK_CORE_AVX_I_M64: #define __corei7 1
// CHECK_CORE_AVX_I_M64: #define __corei7__ 1
// CHECK_CORE_AVX_I_M64: #define __tune_corei7__ 1
// CHECK_CORE_AVX_I_M64: #define __x86_64 1
// CHECK_CORE_AVX_I_M64: #define __x86_64__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
Add fma feature flag for Intel FMA instructions. llvm-svn: 157904
2012-06-04 05:46:30 +08:00
// RUN: %clang -march=core-avx2 -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_CORE_AVX2_M32
Add fma feature flag for Intel FMA instructions. llvm-svn: 157904
2012-06-04 05:46:30 +08:00
// CHECK_CORE_AVX2_M32: #define __AES__ 1
Add AVX-512 feature flag and knl cpu to clang. llvm-svn: 188758
2013-08-20 15:09:39 +08:00
// CHECK_CORE_AVX2_M32: #define __AVX2__ 1
Add fma feature flag for Intel FMA instructions. llvm-svn: 157904
2012-06-04 05:46:30 +08:00
// CHECK_CORE_AVX2_M32: #define __AVX__ 1
// CHECK_CORE_AVX2_M32: #define __BMI2__ 1
// CHECK_CORE_AVX2_M32: #define __BMI__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_CORE_AVX2_M32: #define __F16C__ 1
Add fma feature flag for Intel FMA instructions. llvm-svn: 157904
2012-06-04 05:46:30 +08:00
// CHECK_CORE_AVX2_M32: #define __FMA__ 1
// CHECK_CORE_AVX2_M32: #define __LZCNT__ 1
// CHECK_CORE_AVX2_M32: #define __MMX__ 1
// CHECK_CORE_AVX2_M32: #define __PCLMUL__ 1
// CHECK_CORE_AVX2_M32: #define __POPCNT__ 1
Wire up -mrdrnd for X86. For some reason GCC decided to call the feature rdrnd instead of rdrand, which requires translating it for LLVM. llvm-svn: 159897
2012-07-07 17:39:18 +08:00
// CHECK_CORE_AVX2_M32: #define __RDRND__ 1
Add clang support of RTM from TSX - New options '-mrtm'/'-mno-rtm' are added to enable/disable RTM feature - Builtin macro '__RTM__' is defined if RTM feature is enabled - RTM intrinsic header is added and introduces 3 new intrinsics, namely '_xbegin', '_xend', and '_xabort'. - 3 new builtins are added to keep compatible with gcc, namely '__builtin_ia32_xbegin', '__builtin_ia32_xend', and '__builtin_ia32_xabort'. - Test cases for pre-defined macro and new intrinsic codegen are added. llvm-svn: 167665
2012-11-10 13:17:46 +08:00
// CHECK_CORE_AVX2_M32: #define __RTM__ 1
Add fma feature flag for Intel FMA instructions. llvm-svn: 157904
2012-06-04 05:46:30 +08:00
// CHECK_CORE_AVX2_M32: #define __SSE2__ 1
// CHECK_CORE_AVX2_M32: #define __SSE3__ 1
// CHECK_CORE_AVX2_M32: #define __SSE4_1__ 1
// CHECK_CORE_AVX2_M32: #define __SSE4_2__ 1
// CHECK_CORE_AVX2_M32: #define __SSE__ 1
// CHECK_CORE_AVX2_M32: #define __SSSE3__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_CORE_AVX2_M32: #define __XSAVEOPT__ 1
// CHECK_CORE_AVX2_M32: #define __XSAVE__ 1
Add fma feature flag for Intel FMA instructions. llvm-svn: 157904
2012-06-04 05:46:30 +08:00
// CHECK_CORE_AVX2_M32: #define __corei7 1
// CHECK_CORE_AVX2_M32: #define __corei7__ 1
// CHECK_CORE_AVX2_M32: #define __i386 1
// CHECK_CORE_AVX2_M32: #define __i386__ 1
// CHECK_CORE_AVX2_M32: #define __tune_corei7__ 1
// CHECK_CORE_AVX2_M32: #define i386 1
// RUN: %clang -march=core-avx2 -m64 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_CORE_AVX2_M64
Add fma feature flag for Intel FMA instructions. llvm-svn: 157904
2012-06-04 05:46:30 +08:00
// CHECK_CORE_AVX2_M64: #define __AES__ 1
Add AVX-512 feature flag and knl cpu to clang. llvm-svn: 188758
2013-08-20 15:09:39 +08:00
// CHECK_CORE_AVX2_M64: #define __AVX2__ 1
Add fma feature flag for Intel FMA instructions. llvm-svn: 157904
2012-06-04 05:46:30 +08:00
// CHECK_CORE_AVX2_M64: #define __AVX__ 1
// CHECK_CORE_AVX2_M64: #define __BMI2__ 1
// CHECK_CORE_AVX2_M64: #define __BMI__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_CORE_AVX2_M64: #define __F16C__ 1
Add fma feature flag for Intel FMA instructions. llvm-svn: 157904
2012-06-04 05:46:30 +08:00
// CHECK_CORE_AVX2_M64: #define __FMA__ 1
// CHECK_CORE_AVX2_M64: #define __LZCNT__ 1
// CHECK_CORE_AVX2_M64: #define __MMX__ 1
// CHECK_CORE_AVX2_M64: #define __PCLMUL__ 1
// CHECK_CORE_AVX2_M64: #define __POPCNT__ 1
Wire up -mrdrnd for X86. For some reason GCC decided to call the feature rdrnd instead of rdrand, which requires translating it for LLVM. llvm-svn: 159897
2012-07-07 17:39:18 +08:00
// CHECK_CORE_AVX2_M64: #define __RDRND__ 1
Add clang support of RTM from TSX - New options '-mrtm'/'-mno-rtm' are added to enable/disable RTM feature - Builtin macro '__RTM__' is defined if RTM feature is enabled - RTM intrinsic header is added and introduces 3 new intrinsics, namely '_xbegin', '_xend', and '_xabort'. - 3 new builtins are added to keep compatible with gcc, namely '__builtin_ia32_xbegin', '__builtin_ia32_xend', and '__builtin_ia32_xabort'. - Test cases for pre-defined macro and new intrinsic codegen are added. llvm-svn: 167665
2012-11-10 13:17:46 +08:00
// CHECK_CORE_AVX2_M64: #define __RTM__ 1
Add fma feature flag for Intel FMA instructions. llvm-svn: 157904
2012-06-04 05:46:30 +08:00
// CHECK_CORE_AVX2_M64: #define __SSE2_MATH__ 1
// CHECK_CORE_AVX2_M64: #define __SSE2__ 1
// CHECK_CORE_AVX2_M64: #define __SSE3__ 1
// CHECK_CORE_AVX2_M64: #define __SSE4_1__ 1
// CHECK_CORE_AVX2_M64: #define __SSE4_2__ 1
// CHECK_CORE_AVX2_M64: #define __SSE_MATH__ 1
// CHECK_CORE_AVX2_M64: #define __SSE__ 1
// CHECK_CORE_AVX2_M64: #define __SSSE3__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_CORE_AVX2_M64: #define __XSAVEOPT__ 1
// CHECK_CORE_AVX2_M64: #define __XSAVE__ 1
Add fma feature flag for Intel FMA instructions. llvm-svn: 157904
2012-06-04 05:46:30 +08:00
// CHECK_CORE_AVX2_M64: #define __amd64 1
// CHECK_CORE_AVX2_M64: #define __amd64__ 1
// CHECK_CORE_AVX2_M64: #define __corei7 1
// CHECK_CORE_AVX2_M64: #define __corei7__ 1
// CHECK_CORE_AVX2_M64: #define __tune_corei7__ 1
// CHECK_CORE_AVX2_M64: #define __x86_64 1
// CHECK_CORE_AVX2_M64: #define __x86_64__ 1
Add AVX-512 feature flag and knl cpu to clang. llvm-svn: 188758
2013-08-20 15:09:39 +08:00
//
[x86] Enable broadwell target in clang. Added -madx option llvm-svn: 218116
2014-09-19 17:53:48 +08:00
// RUN: %clang -march=broadwell -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_BROADWELL_M32
[x86] Enable broadwell target in clang. Added -madx option llvm-svn: 218116
2014-09-19 17:53:48 +08:00
// CHECK_BROADWELL_M32: #define __ADX__ 1
// CHECK_BROADWELL_M32: #define __AES__ 1
// CHECK_BROADWELL_M32: #define __AVX2__ 1
// CHECK_BROADWELL_M32: #define __AVX__ 1
// CHECK_BROADWELL_M32: #define __BMI2__ 1
// CHECK_BROADWELL_M32: #define __BMI__ 1
// CHECK_BROADWELL_M32: #define __F16C__ 1
// CHECK_BROADWELL_M32: #define __FMA__ 1
// CHECK_BROADWELL_M32: #define __LZCNT__ 1
// CHECK_BROADWELL_M32: #define __MMX__ 1
// CHECK_BROADWELL_M32: #define __PCLMUL__ 1
// CHECK_BROADWELL_M32: #define __POPCNT__ 1
// CHECK_BROADWELL_M32: #define __RDRND__ 1
// CHECK_BROADWELL_M32: #define __RDSEED__ 1
// CHECK_BROADWELL_M32: #define __RTM__ 1
// CHECK_BROADWELL_M32: #define __SSE2__ 1
// CHECK_BROADWELL_M32: #define __SSE3__ 1
// CHECK_BROADWELL_M32: #define __SSE4_1__ 1
// CHECK_BROADWELL_M32: #define __SSE4_2__ 1
// CHECK_BROADWELL_M32: #define __SSE__ 1
// CHECK_BROADWELL_M32: #define __SSSE3__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_BROADWELL_M32: #define __XSAVEOPT__ 1
// CHECK_BROADWELL_M32: #define __XSAVE__ 1
[x86] Enable broadwell target in clang. Added -madx option llvm-svn: 218116
2014-09-19 17:53:48 +08:00
// CHECK_BROADWELL_M32: #define __corei7 1
// CHECK_BROADWELL_M32: #define __corei7__ 1
// CHECK_BROADWELL_M32: #define __i386 1
// CHECK_BROADWELL_M32: #define __i386__ 1
// CHECK_BROADWELL_M32: #define __tune_corei7__ 1
// CHECK_BROADWELL_M32: #define i386 1
// RUN: %clang -march=broadwell -m64 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_BROADWELL_M64
[x86] Enable broadwell target in clang. Added -madx option llvm-svn: 218116
2014-09-19 17:53:48 +08:00
// CHECK_BROADWELL_M64: #define __ADX__ 1
// CHECK_BROADWELL_M64: #define __AES__ 1
// CHECK_BROADWELL_M64: #define __AVX2__ 1
// CHECK_BROADWELL_M64: #define __AVX__ 1
// CHECK_BROADWELL_M64: #define __BMI2__ 1
// CHECK_BROADWELL_M64: #define __BMI__ 1
// CHECK_BROADWELL_M64: #define __F16C__ 1
// CHECK_BROADWELL_M64: #define __FMA__ 1
// CHECK_BROADWELL_M64: #define __LZCNT__ 1
// CHECK_BROADWELL_M64: #define __MMX__ 1
// CHECK_BROADWELL_M64: #define __PCLMUL__ 1
// CHECK_BROADWELL_M64: #define __POPCNT__ 1
// CHECK_BROADWELL_M64: #define __RDRND__ 1
// CHECK_BROADWELL_M64: #define __RDSEED__ 1
// CHECK_BROADWELL_M64: #define __RTM__ 1
// CHECK_BROADWELL_M64: #define __SSE2_MATH__ 1
// CHECK_BROADWELL_M64: #define __SSE2__ 1
// CHECK_BROADWELL_M64: #define __SSE3__ 1
// CHECK_BROADWELL_M64: #define __SSE4_1__ 1
// CHECK_BROADWELL_M64: #define __SSE4_2__ 1
// CHECK_BROADWELL_M64: #define __SSE_MATH__ 1
// CHECK_BROADWELL_M64: #define __SSE__ 1
// CHECK_BROADWELL_M64: #define __SSSE3__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_BROADWELL_M64: #define __XSAVEOPT__ 1
// CHECK_BROADWELL_M64: #define __XSAVE__ 1
[x86] Enable broadwell target in clang. Added -madx option llvm-svn: 218116
2014-09-19 17:53:48 +08:00
// CHECK_BROADWELL_M64: #define __amd64 1
// CHECK_BROADWELL_M64: #define __amd64__ 1
// CHECK_BROADWELL_M64: #define __corei7 1
// CHECK_BROADWELL_M64: #define __corei7__ 1
// CHECK_BROADWELL_M64: #define __tune_corei7__ 1
// CHECK_BROADWELL_M64: #define __x86_64 1
// CHECK_BROADWELL_M64: #define __x86_64__ 1
//
Added SKL and CNL processors and features to Clang Differential Revision: http://reviews.llvm.org/D16756 llvm-svn: 261467
2016-02-21 15:41:23 +08:00
// RUN: %clang -march=skylake -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_SKL_M32
Added SKL and CNL processors and features to Clang Differential Revision: http://reviews.llvm.org/D16756 llvm-svn: 261467
2016-02-21 15:41:23 +08:00
// CHECK_SKL_M32: #define __ADX__ 1
// CHECK_SKL_M32: #define __AES__ 1
// CHECK_SKL_M32: #define __AVX2__ 1
// CHECK_SKL_M32: #define __AVX__ 1
// CHECK_SKL_M32: #define __BMI2__ 1
// CHECK_SKL_M32: #define __BMI__ 1
// CHECK_SKL_M32: #define __F16C__ 1
// CHECK_SKL_M32: #define __FMA__ 1
// CHECK_SKL_M32: #define __LZCNT__ 1
// CHECK_SKL_M32: #define __MMX__ 1
// CHECK_SKL_M32: #define __PCLMUL__ 1
// CHECK_SKL_M32: #define __POPCNT__ 1
// CHECK_SKL_M32: #define __RDRND__ 1
// CHECK_SKL_M32: #define __RDSEED__ 1
// CHECK_SKL_M32: #define __RTM__ 1
// CHECK_SKL_M32: #define __SSE2__ 1
// CHECK_SKL_M32: #define __SSE3__ 1
// CHECK_SKL_M32: #define __SSE4_1__ 1
// CHECK_SKL_M32: #define __SSE4_2__ 1
// CHECK_SKL_M32: #define __SSE__ 1
// CHECK_SKL_M32: #define __SSSE3__ 1
// CHECK_SKL_M32: #define __XSAVEC__ 1
// CHECK_SKL_M32: #define __XSAVEOPT__ 1
// CHECK_SKL_M32: #define __XSAVES__ 1
// CHECK_SKL_M32: #define __XSAVE__ 1
// CHECK_SKL_M32: #define i386 1
// RUN: %clang -march=skylake -m64 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_SKL_M64
Added SKL and CNL processors and features to Clang Differential Revision: http://reviews.llvm.org/D16756 llvm-svn: 261467
2016-02-21 15:41:23 +08:00
// CHECK_SKL_M64: #define __ADX__ 1
// CHECK_SKL_M64: #define __AES__ 1
// CHECK_SKL_M64: #define __AVX2__ 1
// CHECK_SKL_M64: #define __AVX__ 1
// CHECK_SKL_M64: #define __BMI2__ 1
// CHECK_SKL_M64: #define __BMI__ 1
// CHECK_SKL_M64: #define __F16C__ 1
// CHECK_SKL_M64: #define __FMA__ 1
// CHECK_SKL_M64: #define __LZCNT__ 1
// CHECK_SKL_M64: #define __MMX__ 1
// CHECK_SKL_M64: #define __PCLMUL__ 1
// CHECK_SKL_M64: #define __POPCNT__ 1
// CHECK_SKL_M64: #define __RDRND__ 1
// CHECK_SKL_M64: #define __RDSEED__ 1
// CHECK_SKL_M64: #define __RTM__ 1
// CHECK_SKL_M64: #define __SSE2_MATH__ 1
// CHECK_SKL_M64: #define __SSE2__ 1
// CHECK_SKL_M64: #define __SSE3__ 1
// CHECK_SKL_M64: #define __SSE4_1__ 1
// CHECK_SKL_M64: #define __SSE4_2__ 1
// CHECK_SKL_M64: #define __SSE_MATH__ 1
// CHECK_SKL_M64: #define __SSE__ 1
// CHECK_SKL_M64: #define __SSSE3__ 1
// CHECK_SKL_M64: #define __XSAVEC__ 1
// CHECK_SKL_M64: #define __XSAVEOPT__ 1
// CHECK_SKL_M64: #define __XSAVES__ 1
// CHECK_SKL_M64: #define __XSAVE__ 1
// CHECK_SKL_M64: #define __amd64 1
// CHECK_SKL_M64: #define __amd64__ 1
// CHECK_SKL_M64: #define __x86_64 1
// CHECK_SKL_M64: #define __x86_64__ 1
Add AVX-512 feature flag and knl cpu to clang. llvm-svn: 188758
2013-08-20 15:09:39 +08:00
// RUN: %clang -march=knl -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_KNL_M32
Add AVX-512 feature flag and knl cpu to clang. llvm-svn: 188758
2013-08-20 15:09:39 +08:00
// CHECK_KNL_M32: #define __AES__ 1
// CHECK_KNL_M32: #define __AVX2__ 1
Add avx512cd, avx512er, avx512pf feature flags and enable them on KNL CPU. llvm-svn: 188867
2013-08-21 13:29:10 +08:00
// CHECK_KNL_M32: #define __AVX512CD__ 1
// CHECK_KNL_M32: #define __AVX512ER__ 1
Rename __AVX512__ to __AVX512F__ llvm-svn: 188764
2013-08-20 15:52:37 +08:00
// CHECK_KNL_M32: #define __AVX512F__ 1
Add avx512cd, avx512er, avx512pf feature flags and enable them on KNL CPU. llvm-svn: 188867
2013-08-21 13:29:10 +08:00
// CHECK_KNL_M32: #define __AVX512PF__ 1
Add AVX-512 feature flag and knl cpu to clang. llvm-svn: 188758
2013-08-20 15:09:39 +08:00
// CHECK_KNL_M32: #define __AVX__ 1
// CHECK_KNL_M32: #define __BMI2__ 1
// CHECK_KNL_M32: #define __BMI__ 1
// CHECK_KNL_M32: #define __F16C__ 1
// CHECK_KNL_M32: #define __FMA__ 1
// CHECK_KNL_M32: #define __LZCNT__ 1
// CHECK_KNL_M32: #define __MMX__ 1
// CHECK_KNL_M32: #define __PCLMUL__ 1
// CHECK_KNL_M32: #define __POPCNT__ 1
// CHECK_KNL_M32: #define __RDRND__ 1
// CHECK_KNL_M32: #define __RTM__ 1
// CHECK_KNL_M32: #define __SSE2__ 1
// CHECK_KNL_M32: #define __SSE3__ 1
// CHECK_KNL_M32: #define __SSE4_1__ 1
// CHECK_KNL_M32: #define __SSE4_2__ 1
// CHECK_KNL_M32: #define __SSE__ 1
// CHECK_KNL_M32: #define __SSSE3__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_KNL_M32: #define __XSAVEOPT__ 1
// CHECK_KNL_M32: #define __XSAVE__ 1
Add AVX-512 feature flag and knl cpu to clang. llvm-svn: 188758
2013-08-20 15:09:39 +08:00
// CHECK_KNL_M32: #define __i386 1
// CHECK_KNL_M32: #define __i386__ 1
// CHECK_KNL_M32: #define __knl 1
// CHECK_KNL_M32: #define __knl__ 1
// CHECK_KNL_M32: #define __tune_knl__ 1
// CHECK_KNL_M32: #define i386 1
[SKX] Enabling SKX target (Skylake server chip) a) add SKX support to Clang driver; b) add tests for SKX target and AVX512BW, AVX512DQ, AVX512VL features into clang driver tests Patch by Zinovy Nis <zinovy.y.nis@intel.com> llvm-svn: 214306
2014-07-30 21:53:40 +08:00
Add AVX-512 feature flag and knl cpu to clang. llvm-svn: 188758
2013-08-20 15:09:39 +08:00
// RUN: %clang -march=knl -m64 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_KNL_M64
Add AVX-512 feature flag and knl cpu to clang. llvm-svn: 188758
2013-08-20 15:09:39 +08:00
// CHECK_KNL_M64: #define __AES__ 1
// CHECK_KNL_M64: #define __AVX2__ 1
Add avx512cd, avx512er, avx512pf feature flags and enable them on KNL CPU. llvm-svn: 188867
2013-08-21 13:29:10 +08:00
// CHECK_KNL_M64: #define __AVX512CD__ 1
// CHECK_KNL_M64: #define __AVX512ER__ 1
Rename __AVX512__ to __AVX512F__ llvm-svn: 188764
2013-08-20 15:52:37 +08:00
// CHECK_KNL_M64: #define __AVX512F__ 1
Add avx512cd, avx512er, avx512pf feature flags and enable them on KNL CPU. llvm-svn: 188867
2013-08-21 13:29:10 +08:00
// CHECK_KNL_M64: #define __AVX512PF__ 1
Add AVX-512 feature flag and knl cpu to clang. llvm-svn: 188758
2013-08-20 15:09:39 +08:00
// CHECK_KNL_M64: #define __AVX__ 1
// CHECK_KNL_M64: #define __BMI2__ 1
// CHECK_KNL_M64: #define __BMI__ 1
// CHECK_KNL_M64: #define __F16C__ 1
// CHECK_KNL_M64: #define __FMA__ 1
// CHECK_KNL_M64: #define __LZCNT__ 1
// CHECK_KNL_M64: #define __MMX__ 1
// CHECK_KNL_M64: #define __PCLMUL__ 1
// CHECK_KNL_M64: #define __POPCNT__ 1
// CHECK_KNL_M64: #define __RDRND__ 1
// CHECK_KNL_M64: #define __RTM__ 1
// CHECK_KNL_M64: #define __SSE2_MATH__ 1
// CHECK_KNL_M64: #define __SSE2__ 1
// CHECK_KNL_M64: #define __SSE3__ 1
// CHECK_KNL_M64: #define __SSE4_1__ 1
// CHECK_KNL_M64: #define __SSE4_2__ 1
// CHECK_KNL_M64: #define __SSE_MATH__ 1
// CHECK_KNL_M64: #define __SSE__ 1
// CHECK_KNL_M64: #define __SSSE3__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_KNL_M64: #define __XSAVEOPT__ 1
// CHECK_KNL_M64: #define __XSAVE__ 1
Add AVX-512 feature flag and knl cpu to clang. llvm-svn: 188758
2013-08-20 15:09:39 +08:00
// CHECK_KNL_M64: #define __amd64 1
// CHECK_KNL_M64: #define __amd64__ 1
// CHECK_KNL_M64: #define __knl 1
// CHECK_KNL_M64: #define __knl__ 1
// CHECK_KNL_M64: #define __tune_knl__ 1
// CHECK_KNL_M64: #define __x86_64 1
// CHECK_KNL_M64: #define __x86_64__ 1
Add fma feature flag for Intel FMA instructions. llvm-svn: 157904
2012-06-04 05:46:30 +08:00
//
Added SKL and CNL processors and features to Clang Differential Revision: http://reviews.llvm.org/D16756 llvm-svn: 261467
2016-02-21 15:41:23 +08:00
// RUN: %clang -march=skylake-avx512 -m32 -E -dM %s -o - 2>&1 \
[SKX] Enabling SKX target (Skylake server chip) a) add SKX support to Clang driver; b) add tests for SKX target and AVX512BW, AVX512DQ, AVX512VL features into clang driver tests Patch by Zinovy Nis <zinovy.y.nis@intel.com> llvm-svn: 214306
2014-07-30 21:53:40 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_SKX_M32
[SKX] Enabling SKX target (Skylake server chip) a) add SKX support to Clang driver; b) add tests for SKX target and AVX512BW, AVX512DQ, AVX512VL features into clang driver tests Patch by Zinovy Nis <zinovy.y.nis@intel.com> llvm-svn: 214306
2014-07-30 21:53:40 +08:00
// CHECK_SKX_M32: #define __AES__ 1
// CHECK_SKX_M32: #define __AVX2__ 1
// CHECK_SKX_M32: #define __AVX512BW__ 1
// CHECK_SKX_M32: #define __AVX512CD__ 1
// CHECK_SKX_M32: #define __AVX512DQ__ 1
// CHECK_SKX_M32: #define __AVX512F__ 1
// CHECK_SKX_M32: #define __AVX512VL__ 1
// CHECK_SKX_M32: #define __AVX__ 1
// CHECK_SKX_M32: #define __BMI2__ 1
// CHECK_SKX_M32: #define __BMI__ 1
// CHECK_SKX_M32: #define __F16C__ 1
// CHECK_SKX_M32: #define __FMA__ 1
// CHECK_SKX_M32: #define __LZCNT__ 1
// CHECK_SKX_M32: #define __MMX__ 1
// CHECK_SKX_M32: #define __PCLMUL__ 1
// CHECK_SKX_M32: #define __POPCNT__ 1
// CHECK_SKX_M32: #define __RDRND__ 1
// CHECK_SKX_M32: #define __RTM__ 1
// CHECK_SKX_M32: #define __SSE2__ 1
// CHECK_SKX_M32: #define __SSE3__ 1
// CHECK_SKX_M32: #define __SSE4_1__ 1
// CHECK_SKX_M32: #define __SSE4_2__ 1
// CHECK_SKX_M32: #define __SSE__ 1
// CHECK_SKX_M32: #define __SSSE3__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_SKX_M32: #define __XSAVEC__ 1
// CHECK_SKX_M32: #define __XSAVEOPT__ 1
// CHECK_SKX_M32: #define __XSAVES__ 1
// CHECK_SKX_M32: #define __XSAVE__ 1
[SKX] Enabling SKX target (Skylake server chip) a) add SKX support to Clang driver; b) add tests for SKX target and AVX512BW, AVX512DQ, AVX512VL features into clang driver tests Patch by Zinovy Nis <zinovy.y.nis@intel.com> llvm-svn: 214306
2014-07-30 21:53:40 +08:00
// CHECK_SKX_M32: #define __i386 1
// CHECK_SKX_M32: #define __i386__ 1
// CHECK_SKX_M32: #define __skx 1
// CHECK_SKX_M32: #define __skx__ 1
// CHECK_SKX_M32: #define __tune_skx__ 1
// CHECK_SKX_M32: #define i386 1
Added SKL and CNL processors and features to Clang Differential Revision: http://reviews.llvm.org/D16756 llvm-svn: 261467
2016-02-21 15:41:23 +08:00
// RUN: %clang -march=skylake-avx512 -m64 -E -dM %s -o - 2>&1 \
[SKX] Enabling SKX target (Skylake server chip) a) add SKX support to Clang driver; b) add tests for SKX target and AVX512BW, AVX512DQ, AVX512VL features into clang driver tests Patch by Zinovy Nis <zinovy.y.nis@intel.com> llvm-svn: 214306
2014-07-30 21:53:40 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_SKX_M64
[SKX] Enabling SKX target (Skylake server chip) a) add SKX support to Clang driver; b) add tests for SKX target and AVX512BW, AVX512DQ, AVX512VL features into clang driver tests Patch by Zinovy Nis <zinovy.y.nis@intel.com> llvm-svn: 214306
2014-07-30 21:53:40 +08:00
// CHECK_SKX_M64: #define __AES__ 1
// CHECK_SKX_M64: #define __AVX2__ 1
// CHECK_SKX_M64: #define __AVX512BW__ 1
// CHECK_SKX_M64: #define __AVX512CD__ 1
// CHECK_SKX_M64: #define __AVX512DQ__ 1
// CHECK_SKX_M64: #define __AVX512F__ 1
// CHECK_SKX_M64: #define __AVX512VL__ 1
// CHECK_SKX_M64: #define __AVX__ 1
// CHECK_SKX_M64: #define __BMI2__ 1
// CHECK_SKX_M64: #define __BMI__ 1
// CHECK_SKX_M64: #define __F16C__ 1
// CHECK_SKX_M64: #define __FMA__ 1
// CHECK_SKX_M64: #define __LZCNT__ 1
// CHECK_SKX_M64: #define __MMX__ 1
// CHECK_SKX_M64: #define __PCLMUL__ 1
// CHECK_SKX_M64: #define __POPCNT__ 1
// CHECK_SKX_M64: #define __RDRND__ 1
// CHECK_SKX_M64: #define __RTM__ 1
// CHECK_SKX_M64: #define __SSE2_MATH__ 1
// CHECK_SKX_M64: #define __SSE2__ 1
// CHECK_SKX_M64: #define __SSE3__ 1
// CHECK_SKX_M64: #define __SSE4_1__ 1
// CHECK_SKX_M64: #define __SSE4_2__ 1
// CHECK_SKX_M64: #define __SSE_MATH__ 1
// CHECK_SKX_M64: #define __SSE__ 1
// CHECK_SKX_M64: #define __SSSE3__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_SKX_M64: #define __XSAVEC__ 1
// CHECK_SKX_M64: #define __XSAVEOPT__ 1
// CHECK_SKX_M64: #define __XSAVES__ 1
// CHECK_SKX_M64: #define __XSAVE__ 1
[SKX] Enabling SKX target (Skylake server chip) a) add SKX support to Clang driver; b) add tests for SKX target and AVX512BW, AVX512DQ, AVX512VL features into clang driver tests Patch by Zinovy Nis <zinovy.y.nis@intel.com> llvm-svn: 214306
2014-07-30 21:53:40 +08:00
// CHECK_SKX_M64: #define __amd64 1
// CHECK_SKX_M64: #define __amd64__ 1
// CHECK_SKX_M64: #define __skx 1
// CHECK_SKX_M64: #define __skx__ 1
// CHECK_SKX_M64: #define __tune_skx__ 1
// CHECK_SKX_M64: #define __x86_64 1
// CHECK_SKX_M64: #define __x86_64__ 1
//
Added SKL and CNL processors and features to Clang Differential Revision: http://reviews.llvm.org/D16756 llvm-svn: 261467
2016-02-21 15:41:23 +08:00
// RUN: %clang -march=cannonlake -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_CNL_M32
Added SKL and CNL processors and features to Clang Differential Revision: http://reviews.llvm.org/D16756 llvm-svn: 261467
2016-02-21 15:41:23 +08:00
// CHECK_CNL_M32: #define __AES__ 1
// CHECK_CNL_M32: #define __AVX2__ 1
// CHECK_CNL_M32: #define __AVX512BW__ 1
// CHECK_CNL_M32: #define __AVX512CD__ 1
// CHECK_CNL_M32: #define __AVX512DQ__ 1
// CHECK_CNL_M32: #define __AVX512F__ 1
[X86] Disabling avx512f should also disable avx512vbmi and avx512ifma. Enabling avx512vbmi or avx512ifma should enable avx512f. Add command line switches and header defines for avx512ifma and avx512vbmi. llvm-svn: 262201
2016-02-29 14:51:38 +08:00
// CHECK_CNL_M32: #define __AVX512IFMA__ 1
// CHECK_CNL_M32: #define __AVX512VBMI__ 1
Added SKL and CNL processors and features to Clang Differential Revision: http://reviews.llvm.org/D16756 llvm-svn: 261467
2016-02-21 15:41:23 +08:00
// CHECK_CNL_M32: #define __AVX512VL__ 1
// CHECK_CNL_M32: #define __AVX__ 1
// CHECK_CNL_M32: #define __BMI2__ 1
// CHECK_CNL_M32: #define __BMI__ 1
// CHECK_CNL_M32: #define __F16C__ 1
// CHECK_CNL_M32: #define __FMA__ 1
// CHECK_CNL_M32: #define __LZCNT__ 1
// CHECK_CNL_M32: #define __MMX__ 1
// CHECK_CNL_M32: #define __PCLMUL__ 1
// CHECK_CNL_M32: #define __POPCNT__ 1
// CHECK_CNL_M32: #define __RDRND__ 1
// CHECK_CNL_M32: #define __RTM__ 1
// CHECK_CNL_M32: #define __SHA__ 1
// CHECK_CNL_M32: #define __SSE2__ 1
// CHECK_CNL_M32: #define __SSE3__ 1
// CHECK_CNL_M32: #define __SSE4_1__ 1
// CHECK_CNL_M32: #define __SSE4_2__ 1
// CHECK_CNL_M32: #define __SSE__ 1
// CHECK_CNL_M32: #define __SSSE3__ 1
// CHECK_CNL_M32: #define __XSAVEC__ 1
// CHECK_CNL_M32: #define __XSAVEOPT__ 1
// CHECK_CNL_M32: #define __XSAVES__ 1
// CHECK_CNL_M32: #define __XSAVE__ 1
// CHECK_CNL_M32: #define __i386 1
// CHECK_CNL_M32: #define __i386__ 1
// CHECK_CNL_M32: #define i386 1
//
// RUN: %clang -march=cannonlake -m64 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_CNL_M64
Added SKL and CNL processors and features to Clang Differential Revision: http://reviews.llvm.org/D16756 llvm-svn: 261467
2016-02-21 15:41:23 +08:00
// CHECK_CNL_M64: #define __AES__ 1
// CHECK_CNL_M64: #define __AVX2__ 1
// CHECK_CNL_M64: #define __AVX512BW__ 1
// CHECK_CNL_M64: #define __AVX512CD__ 1
// CHECK_CNL_M64: #define __AVX512DQ__ 1
// CHECK_CNL_M64: #define __AVX512F__ 1
[X86] Disabling avx512f should also disable avx512vbmi and avx512ifma. Enabling avx512vbmi or avx512ifma should enable avx512f. Add command line switches and header defines for avx512ifma and avx512vbmi. llvm-svn: 262201
2016-02-29 14:51:38 +08:00
// CHECK_CNL_M64: #define __AVX512IFMA__ 1
// CHECK_CNL_M64: #define __AVX512VBMI__ 1
Added SKL and CNL processors and features to Clang Differential Revision: http://reviews.llvm.org/D16756 llvm-svn: 261467
2016-02-21 15:41:23 +08:00
// CHECK_CNL_M64: #define __AVX512VL__ 1
// CHECK_CNL_M64: #define __AVX__ 1
// CHECK_CNL_M64: #define __BMI2__ 1
// CHECK_CNL_M64: #define __BMI__ 1
// CHECK_CNL_M64: #define __F16C__ 1
// CHECK_CNL_M64: #define __FMA__ 1
// CHECK_CNL_M64: #define __LZCNT__ 1
// CHECK_CNL_M64: #define __MMX__ 1
// CHECK_CNL_M64: #define __PCLMUL__ 1
// CHECK_CNL_M64: #define __POPCNT__ 1
// CHECK_CNL_M64: #define __RDRND__ 1
// CHECK_CNL_M64: #define __RTM__ 1
// CHECK_CNL_M64: #define __SHA__ 1
// CHECK_CNL_M64: #define __SSE2__ 1
// CHECK_CNL_M64: #define __SSE3__ 1
// CHECK_CNL_M64: #define __SSE4_1__ 1
// CHECK_CNL_M64: #define __SSE4_2__ 1
// CHECK_CNL_M64: #define __SSE__ 1
// CHECK_CNL_M64: #define __SSSE3__ 1
// CHECK_CNL_M64: #define __XSAVEC__ 1
// CHECK_CNL_M64: #define __XSAVEOPT__ 1
// CHECK_CNL_M64: #define __XSAVES__ 1
// CHECK_CNL_M64: #define __XSAVE__ 1
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// CHECK_CNL_M64: #define __amd64 1
Added SKL and CNL processors and features to Clang Differential Revision: http://reviews.llvm.org/D16756 llvm-svn: 261467
2016-02-21 15:41:23 +08:00
// CHECK_CNL_M64: #define __amd64__ 1
// CHECK_CNL_M64: #define __x86_64 1
// CHECK_CNL_M64: #define __x86_64__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// RUN: %clang -march=atom -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ATOM_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_ATOM_M32: #define __MMX__ 1
// CHECK_ATOM_M32: #define __SSE2__ 1
// CHECK_ATOM_M32: #define __SSE3__ 1
// CHECK_ATOM_M32: #define __SSE__ 1
// CHECK_ATOM_M32: #define __SSSE3__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_ATOM_M32: #define __atom 1
// CHECK_ATOM_M32: #define __atom__ 1
// CHECK_ATOM_M32: #define __i386 1
// CHECK_ATOM_M32: #define __i386__ 1
// CHECK_ATOM_M32: #define __tune_atom__ 1
// CHECK_ATOM_M32: #define i386 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// RUN: %clang -march=atom -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ATOM_M64
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_ATOM_M64: #define __MMX__ 1
// CHECK_ATOM_M64: #define __SSE2_MATH__ 1
// CHECK_ATOM_M64: #define __SSE2__ 1
// CHECK_ATOM_M64: #define __SSE3__ 1
// CHECK_ATOM_M64: #define __SSE_MATH__ 1
// CHECK_ATOM_M64: #define __SSE__ 1
// CHECK_ATOM_M64: #define __SSSE3__ 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// CHECK_ATOM_M64: #define __amd64 1
// CHECK_ATOM_M64: #define __amd64__ 1
// CHECK_ATOM_M64: #define __atom 1
// CHECK_ATOM_M64: #define __atom__ 1
// CHECK_ATOM_M64: #define __tune_atom__ 1
// CHECK_ATOM_M64: #define __x86_64 1
// CHECK_ATOM_M64: #define __x86_64__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
Add support for -march=slm, aka Intel Atom Silvermont. llvm-svn: 189670
2013-08-30 22:05:34 +08:00
// RUN: %clang -march=slm -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_SLM_M32
Add support for -march=slm, aka Intel Atom Silvermont. llvm-svn: 189670
2013-08-30 22:05:34 +08:00
// CHECK_SLM_M32: #define __MMX__ 1
// CHECK_SLM_M32: #define __SSE2__ 1
// CHECK_SLM_M32: #define __SSE3__ 1
// CHECK_SLM_M32: #define __SSE4_1__ 1
// CHECK_SLM_M32: #define __SSE4_2__ 1
// CHECK_SLM_M32: #define __SSE__ 1
// CHECK_SLM_M32: #define __SSSE3__ 1
// CHECK_SLM_M32: #define __i386 1
// CHECK_SLM_M32: #define __i386__ 1
// CHECK_SLM_M32: #define __slm 1
// CHECK_SLM_M32: #define __slm__ 1
// CHECK_SLM_M32: #define __tune_slm__ 1
// CHECK_SLM_M32: #define i386 1
// RUN: %clang -march=slm -m64 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_SLM_M64
Add support for -march=slm, aka Intel Atom Silvermont. llvm-svn: 189670
2013-08-30 22:05:34 +08:00
// CHECK_SLM_M64: #define __MMX__ 1
// CHECK_SLM_M64: #define __SSE2_MATH__ 1
// CHECK_SLM_M64: #define __SSE2__ 1
// CHECK_SLM_M64: #define __SSE3__ 1
// CHECK_SLM_M64: #define __SSE4_1__ 1
// CHECK_SLM_M64: #define __SSE4_2__ 1
// CHECK_SLM_M64: #define __SSE_MATH__ 1
// CHECK_SLM_M64: #define __SSE__ 1
// CHECK_SLM_M64: #define __SSSE3__ 1
// CHECK_SLM_M64: #define __amd64 1
// CHECK_SLM_M64: #define __amd64__ 1
// CHECK_SLM_M64: #define __slm 1
// CHECK_SLM_M64: #define __slm__ 1
// CHECK_SLM_M64: #define __tune_slm__ 1
// CHECK_SLM_M64: #define __x86_64 1
// CHECK_SLM_M64: #define __x86_64__ 1
//
[X86] Introduction of -march=lakemont. Differential Revision: http://reviews.llvm.org/D18651 llvm-svn: 265405
2016-04-05 23:04:26 +08:00
// RUN: %clang -march=lakemont -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck %s -check-prefix=CHECK_LMT_M32
// CHECK_LMT_M32: #define __i386 1
// CHECK_LMT_M32: #define __i386__ 1
// CHECK_LMT_M32: #define __tune_lakemont__ 1
// CHECK_LMT_M32: #define i386 1
// RUN: not %clang -march=lakemont -m64 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck %s -check-prefix=CHECK_LMT_M64
// CHECK_LMT_M64: error:
//
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// RUN: %clang -march=geode -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_GEODE_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_GEODE_M32: #define __3dNOW_A__ 1
// CHECK_GEODE_M32: #define __3dNOW__ 1
// CHECK_GEODE_M32: #define __MMX__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_GEODE_M32: #define __geode 1
// CHECK_GEODE_M32: #define __geode__ 1
// CHECK_GEODE_M32: #define __i386 1
// CHECK_GEODE_M32: #define __i386__ 1
// CHECK_GEODE_M32: #define __tune_geode__ 1
// CHECK_GEODE_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=geode -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_GEODE_M64
// CHECK_GEODE_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=k6 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_K6_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_K6_M32: #define __MMX__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_K6_M32: #define __i386 1
// CHECK_K6_M32: #define __i386__ 1
// CHECK_K6_M32: #define __k6 1
// CHECK_K6_M32: #define __k6__ 1
// CHECK_K6_M32: #define __tune_k6__ 1
// CHECK_K6_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=k6 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_K6_M64
// CHECK_K6_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=k6-2 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_K6_2_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_K6_2_M32: #define __3dNOW__ 1
// CHECK_K6_2_M32: #define __MMX__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_K6_2_M32: #define __i386 1
// CHECK_K6_2_M32: #define __i386__ 1
// CHECK_K6_2_M32: #define __k6 1
// CHECK_K6_2_M32: #define __k6_2__ 1
// CHECK_K6_2_M32: #define __k6__ 1
// CHECK_K6_2_M32: #define __tune_k6_2__ 1
// CHECK_K6_2_M32: #define __tune_k6__ 1
// CHECK_K6_2_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=k6-2 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_K6_2_M64
// CHECK_K6_2_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=k6-3 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_K6_3_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_K6_3_M32: #define __3dNOW__ 1
// CHECK_K6_3_M32: #define __MMX__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_K6_3_M32: #define __i386 1
// CHECK_K6_3_M32: #define __i386__ 1
// CHECK_K6_3_M32: #define __k6 1
// CHECK_K6_3_M32: #define __k6_3__ 1
// CHECK_K6_3_M32: #define __k6__ 1
// CHECK_K6_3_M32: #define __tune_k6_3__ 1
// CHECK_K6_3_M32: #define __tune_k6__ 1
// CHECK_K6_3_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=k6-3 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_K6_3_M64
// CHECK_K6_3_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=athlon -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ATHLON_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_ATHLON_M32: #define __3dNOW_A__ 1
// CHECK_ATHLON_M32: #define __3dNOW__ 1
// CHECK_ATHLON_M32: #define __MMX__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_ATHLON_M32: #define __athlon 1
// CHECK_ATHLON_M32: #define __athlon__ 1
// CHECK_ATHLON_M32: #define __i386 1
// CHECK_ATHLON_M32: #define __i386__ 1
// CHECK_ATHLON_M32: #define __tune_athlon__ 1
// CHECK_ATHLON_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=athlon -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ATHLON_M64
// CHECK_ATHLON_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=athlon-tbird -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ATHLON_TBIRD_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_ATHLON_TBIRD_M32: #define __3dNOW_A__ 1
// CHECK_ATHLON_TBIRD_M32: #define __3dNOW__ 1
// CHECK_ATHLON_TBIRD_M32: #define __MMX__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_ATHLON_TBIRD_M32: #define __athlon 1
// CHECK_ATHLON_TBIRD_M32: #define __athlon__ 1
// CHECK_ATHLON_TBIRD_M32: #define __i386 1
// CHECK_ATHLON_TBIRD_M32: #define __i386__ 1
// CHECK_ATHLON_TBIRD_M32: #define __tune_athlon__ 1
// CHECK_ATHLON_TBIRD_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=athlon-tbird -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ATHLON_TBIRD_M64
// CHECK_ATHLON_TBIRD_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=athlon-4 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ATHLON_4_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_ATHLON_4_M32: #define __3dNOW_A__ 1
// CHECK_ATHLON_4_M32: #define __3dNOW__ 1
// CHECK_ATHLON_4_M32: #define __MMX__ 1
// CHECK_ATHLON_4_M32: #define __SSE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_ATHLON_4_M32: #define __athlon 1
// CHECK_ATHLON_4_M32: #define __athlon__ 1
// CHECK_ATHLON_4_M32: #define __athlon_sse__ 1
// CHECK_ATHLON_4_M32: #define __i386 1
// CHECK_ATHLON_4_M32: #define __i386__ 1
// CHECK_ATHLON_4_M32: #define __tune_athlon__ 1
Fix a think-o on my part that got enshrined in a FIXME by setting up the __tune_...__ define as well. llvm-svn: 140690
2011-09-28 17:54:11 +08:00
// CHECK_ATHLON_4_M32: #define __tune_athlon_sse__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_ATHLON_4_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=athlon-4 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ATHLON_4_M64
// CHECK_ATHLON_4_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=athlon-xp -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ATHLON_XP_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_ATHLON_XP_M32: #define __3dNOW_A__ 1
// CHECK_ATHLON_XP_M32: #define __3dNOW__ 1
// CHECK_ATHLON_XP_M32: #define __MMX__ 1
// CHECK_ATHLON_XP_M32: #define __SSE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_ATHLON_XP_M32: #define __athlon 1
// CHECK_ATHLON_XP_M32: #define __athlon__ 1
// CHECK_ATHLON_XP_M32: #define __athlon_sse__ 1
// CHECK_ATHLON_XP_M32: #define __i386 1
// CHECK_ATHLON_XP_M32: #define __i386__ 1
// CHECK_ATHLON_XP_M32: #define __tune_athlon__ 1
Fix a think-o on my part that got enshrined in a FIXME by setting up the __tune_...__ define as well. llvm-svn: 140690
2011-09-28 17:54:11 +08:00
// CHECK_ATHLON_XP_M32: #define __tune_athlon_sse__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_ATHLON_XP_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=athlon-xp -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ATHLON_XP_M64
// CHECK_ATHLON_XP_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=athlon-mp -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ATHLON_MP_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_ATHLON_MP_M32: #define __3dNOW_A__ 1
// CHECK_ATHLON_MP_M32: #define __3dNOW__ 1
// CHECK_ATHLON_MP_M32: #define __MMX__ 1
// CHECK_ATHLON_MP_M32: #define __SSE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_ATHLON_MP_M32: #define __athlon 1
// CHECK_ATHLON_MP_M32: #define __athlon__ 1
// CHECK_ATHLON_MP_M32: #define __athlon_sse__ 1
// CHECK_ATHLON_MP_M32: #define __i386 1
// CHECK_ATHLON_MP_M32: #define __i386__ 1
// CHECK_ATHLON_MP_M32: #define __tune_athlon__ 1
Fix a think-o on my part that got enshrined in a FIXME by setting up the __tune_...__ define as well. llvm-svn: 140690
2011-09-28 17:54:11 +08:00
// CHECK_ATHLON_MP_M32: #define __tune_athlon_sse__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_ATHLON_MP_M32: #define i386 1
Add 'not' to commands that are expected to fail. This is at least good documentation, but also opens the possibility of using pipefail. llvm-svn: 185652
2013-07-05 00:16:58 +08:00
// RUN: not %clang -march=athlon-mp -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ATHLON_MP_M64
// CHECK_ATHLON_MP_M64: error: {{.*}}
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=x86-64 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_X86_64_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_X86_64_M32: #define __MMX__ 1
// CHECK_X86_64_M32: #define __SSE2__ 1
// CHECK_X86_64_M32: #define __SSE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_X86_64_M32: #define __i386 1
// CHECK_X86_64_M32: #define __i386__ 1
// CHECK_X86_64_M32: #define __k8 1
// CHECK_X86_64_M32: #define __k8__ 1
// CHECK_X86_64_M32: #define i386 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// RUN: %clang -march=x86-64 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_X86_64_M64
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_X86_64_M64: #define __MMX__ 1
// CHECK_X86_64_M64: #define __SSE2_MATH__ 1
// CHECK_X86_64_M64: #define __SSE2__ 1
// CHECK_X86_64_M64: #define __SSE_MATH__ 1
// CHECK_X86_64_M64: #define __SSE__ 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// CHECK_X86_64_M64: #define __amd64 1
// CHECK_X86_64_M64: #define __amd64__ 1
// CHECK_X86_64_M64: #define __k8 1
// CHECK_X86_64_M64: #define __k8__ 1
// CHECK_X86_64_M64: #define __x86_64 1
// CHECK_X86_64_M64: #define __x86_64__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=k8 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_K8_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_K8_M32: #define __3dNOW_A__ 1
// CHECK_K8_M32: #define __3dNOW__ 1
// CHECK_K8_M32: #define __MMX__ 1
// CHECK_K8_M32: #define __SSE2__ 1
// CHECK_K8_M32: #define __SSE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_K8_M32: #define __i386 1
// CHECK_K8_M32: #define __i386__ 1
// CHECK_K8_M32: #define __k8 1
// CHECK_K8_M32: #define __k8__ 1
// CHECK_K8_M32: #define __tune_k8__ 1
// CHECK_K8_M32: #define i386 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// RUN: %clang -march=k8 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_K8_M64
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_K8_M64: #define __3dNOW_A__ 1
// CHECK_K8_M64: #define __3dNOW__ 1
// CHECK_K8_M64: #define __MMX__ 1
// CHECK_K8_M64: #define __SSE2_MATH__ 1
// CHECK_K8_M64: #define __SSE2__ 1
// CHECK_K8_M64: #define __SSE_MATH__ 1
// CHECK_K8_M64: #define __SSE__ 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// CHECK_K8_M64: #define __amd64 1
// CHECK_K8_M64: #define __amd64__ 1
// CHECK_K8_M64: #define __k8 1
// CHECK_K8_M64: #define __k8__ 1
// CHECK_K8_M64: #define __tune_k8__ 1
// CHECK_K8_M64: #define __x86_64 1
// CHECK_K8_M64: #define __x86_64__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=k8-sse3 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_K8_SSE3_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_K8_SSE3_M32: #define __3dNOW_A__ 1
// CHECK_K8_SSE3_M32: #define __3dNOW__ 1
// CHECK_K8_SSE3_M32: #define __MMX__ 1
// CHECK_K8_SSE3_M32: #define __SSE2__ 1
// CHECK_K8_SSE3_M32: #define __SSE3__ 1
// CHECK_K8_SSE3_M32: #define __SSE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_K8_SSE3_M32: #define __i386 1
// CHECK_K8_SSE3_M32: #define __i386__ 1
// CHECK_K8_SSE3_M32: #define __k8 1
// CHECK_K8_SSE3_M32: #define __k8__ 1
// CHECK_K8_SSE3_M32: #define __tune_k8__ 1
// CHECK_K8_SSE3_M32: #define i386 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// RUN: %clang -march=k8-sse3 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_K8_SSE3_M64
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_K8_SSE3_M64: #define __3dNOW_A__ 1
// CHECK_K8_SSE3_M64: #define __3dNOW__ 1
// CHECK_K8_SSE3_M64: #define __MMX__ 1
// CHECK_K8_SSE3_M64: #define __SSE2_MATH__ 1
// CHECK_K8_SSE3_M64: #define __SSE2__ 1
// CHECK_K8_SSE3_M64: #define __SSE3__ 1
// CHECK_K8_SSE3_M64: #define __SSE_MATH__ 1
// CHECK_K8_SSE3_M64: #define __SSE__ 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// CHECK_K8_SSE3_M64: #define __amd64 1
// CHECK_K8_SSE3_M64: #define __amd64__ 1
// CHECK_K8_SSE3_M64: #define __k8 1
// CHECK_K8_SSE3_M64: #define __k8__ 1
// CHECK_K8_SSE3_M64: #define __tune_k8__ 1
// CHECK_K8_SSE3_M64: #define __x86_64 1
// CHECK_K8_SSE3_M64: #define __x86_64__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=opteron -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_OPTERON_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_OPTERON_M32: #define __3dNOW_A__ 1
// CHECK_OPTERON_M32: #define __3dNOW__ 1
// CHECK_OPTERON_M32: #define __MMX__ 1
// CHECK_OPTERON_M32: #define __SSE2__ 1
// CHECK_OPTERON_M32: #define __SSE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_OPTERON_M32: #define __i386 1
// CHECK_OPTERON_M32: #define __i386__ 1
// CHECK_OPTERON_M32: #define __k8 1
// CHECK_OPTERON_M32: #define __k8__ 1
// CHECK_OPTERON_M32: #define __tune_k8__ 1
// CHECK_OPTERON_M32: #define i386 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// RUN: %clang -march=opteron -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_OPTERON_M64
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_OPTERON_M64: #define __3dNOW_A__ 1
// CHECK_OPTERON_M64: #define __3dNOW__ 1
// CHECK_OPTERON_M64: #define __MMX__ 1
// CHECK_OPTERON_M64: #define __SSE2_MATH__ 1
// CHECK_OPTERON_M64: #define __SSE2__ 1
// CHECK_OPTERON_M64: #define __SSE_MATH__ 1
// CHECK_OPTERON_M64: #define __SSE__ 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// CHECK_OPTERON_M64: #define __amd64 1
// CHECK_OPTERON_M64: #define __amd64__ 1
// CHECK_OPTERON_M64: #define __k8 1
// CHECK_OPTERON_M64: #define __k8__ 1
// CHECK_OPTERON_M64: #define __tune_k8__ 1
// CHECK_OPTERON_M64: #define __x86_64 1
// CHECK_OPTERON_M64: #define __x86_64__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=opteron-sse3 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_OPTERON_SSE3_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_OPTERON_SSE3_M32: #define __3dNOW_A__ 1
// CHECK_OPTERON_SSE3_M32: #define __3dNOW__ 1
// CHECK_OPTERON_SSE3_M32: #define __MMX__ 1
// CHECK_OPTERON_SSE3_M32: #define __SSE2__ 1
// CHECK_OPTERON_SSE3_M32: #define __SSE3__ 1
// CHECK_OPTERON_SSE3_M32: #define __SSE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_OPTERON_SSE3_M32: #define __i386 1
// CHECK_OPTERON_SSE3_M32: #define __i386__ 1
// CHECK_OPTERON_SSE3_M32: #define __k8 1
// CHECK_OPTERON_SSE3_M32: #define __k8__ 1
// CHECK_OPTERON_SSE3_M32: #define __tune_k8__ 1
// CHECK_OPTERON_SSE3_M32: #define i386 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// RUN: %clang -march=opteron-sse3 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_OPTERON_SSE3_M64
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_OPTERON_SSE3_M64: #define __3dNOW_A__ 1
// CHECK_OPTERON_SSE3_M64: #define __3dNOW__ 1
// CHECK_OPTERON_SSE3_M64: #define __MMX__ 1
// CHECK_OPTERON_SSE3_M64: #define __SSE2_MATH__ 1
// CHECK_OPTERON_SSE3_M64: #define __SSE2__ 1
// CHECK_OPTERON_SSE3_M64: #define __SSE3__ 1
// CHECK_OPTERON_SSE3_M64: #define __SSE_MATH__ 1
// CHECK_OPTERON_SSE3_M64: #define __SSE__ 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// CHECK_OPTERON_SSE3_M64: #define __amd64 1
// CHECK_OPTERON_SSE3_M64: #define __amd64__ 1
// CHECK_OPTERON_SSE3_M64: #define __k8 1
// CHECK_OPTERON_SSE3_M64: #define __k8__ 1
// CHECK_OPTERON_SSE3_M64: #define __tune_k8__ 1
// CHECK_OPTERON_SSE3_M64: #define __x86_64 1
// CHECK_OPTERON_SSE3_M64: #define __x86_64__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=athlon64 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ATHLON64_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_ATHLON64_M32: #define __3dNOW_A__ 1
// CHECK_ATHLON64_M32: #define __3dNOW__ 1
// CHECK_ATHLON64_M32: #define __MMX__ 1
// CHECK_ATHLON64_M32: #define __SSE2__ 1
// CHECK_ATHLON64_M32: #define __SSE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_ATHLON64_M32: #define __i386 1
// CHECK_ATHLON64_M32: #define __i386__ 1
// CHECK_ATHLON64_M32: #define __k8 1
// CHECK_ATHLON64_M32: #define __k8__ 1
// CHECK_ATHLON64_M32: #define __tune_k8__ 1
// CHECK_ATHLON64_M32: #define i386 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// RUN: %clang -march=athlon64 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ATHLON64_M64
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_ATHLON64_M64: #define __3dNOW_A__ 1
// CHECK_ATHLON64_M64: #define __3dNOW__ 1
// CHECK_ATHLON64_M64: #define __MMX__ 1
// CHECK_ATHLON64_M64: #define __SSE2_MATH__ 1
// CHECK_ATHLON64_M64: #define __SSE2__ 1
// CHECK_ATHLON64_M64: #define __SSE_MATH__ 1
// CHECK_ATHLON64_M64: #define __SSE__ 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// CHECK_ATHLON64_M64: #define __amd64 1
// CHECK_ATHLON64_M64: #define __amd64__ 1
// CHECK_ATHLON64_M64: #define __k8 1
// CHECK_ATHLON64_M64: #define __k8__ 1
// CHECK_ATHLON64_M64: #define __tune_k8__ 1
// CHECK_ATHLON64_M64: #define __x86_64 1
// CHECK_ATHLON64_M64: #define __x86_64__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=athlon64-sse3 -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ATHLON64_SSE3_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_ATHLON64_SSE3_M32: #define __3dNOW_A__ 1
// CHECK_ATHLON64_SSE3_M32: #define __3dNOW__ 1
// CHECK_ATHLON64_SSE3_M32: #define __MMX__ 1
// CHECK_ATHLON64_SSE3_M32: #define __SSE2__ 1
// CHECK_ATHLON64_SSE3_M32: #define __SSE3__ 1
// CHECK_ATHLON64_SSE3_M32: #define __SSE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_ATHLON64_SSE3_M32: #define __i386 1
// CHECK_ATHLON64_SSE3_M32: #define __i386__ 1
// CHECK_ATHLON64_SSE3_M32: #define __k8 1
// CHECK_ATHLON64_SSE3_M32: #define __k8__ 1
// CHECK_ATHLON64_SSE3_M32: #define __tune_k8__ 1
// CHECK_ATHLON64_SSE3_M32: #define i386 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// RUN: %clang -march=athlon64-sse3 -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ATHLON64_SSE3_M64
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_ATHLON64_SSE3_M64: #define __3dNOW_A__ 1
// CHECK_ATHLON64_SSE3_M64: #define __3dNOW__ 1
// CHECK_ATHLON64_SSE3_M64: #define __MMX__ 1
// CHECK_ATHLON64_SSE3_M64: #define __SSE2_MATH__ 1
// CHECK_ATHLON64_SSE3_M64: #define __SSE2__ 1
// CHECK_ATHLON64_SSE3_M64: #define __SSE3__ 1
// CHECK_ATHLON64_SSE3_M64: #define __SSE_MATH__ 1
// CHECK_ATHLON64_SSE3_M64: #define __SSE__ 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// CHECK_ATHLON64_SSE3_M64: #define __amd64 1
// CHECK_ATHLON64_SSE3_M64: #define __amd64__ 1
// CHECK_ATHLON64_SSE3_M64: #define __k8 1
// CHECK_ATHLON64_SSE3_M64: #define __k8__ 1
// CHECK_ATHLON64_SSE3_M64: #define __tune_k8__ 1
// CHECK_ATHLON64_SSE3_M64: #define __x86_64 1
// CHECK_ATHLON64_SSE3_M64: #define __x86_64__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
//
// RUN: %clang -march=athlon-fx -m32 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ATHLON_FX_M32
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_ATHLON_FX_M32: #define __3dNOW_A__ 1
// CHECK_ATHLON_FX_M32: #define __3dNOW__ 1
// CHECK_ATHLON_FX_M32: #define __MMX__ 1
// CHECK_ATHLON_FX_M32: #define __SSE2__ 1
// CHECK_ATHLON_FX_M32: #define __SSE__ 1
Begin fixing Clang's predefined macros for various architectures. This is *very* much a WIP that I'll be refining over the next several commits, but I need to get this checkpoint in place for sanity. This also adds a much more comprehensive test for architecture macros, which is roughly generated by inspecting the behavior of a trunk build of GCC. It still requires some massaging, but eventually I'll even check in the script that generates these so that others can use it to append more tests for more architectures, etc. Next up is a bunch of simplification of the Targets.cpp code, followed by a lot more test cases once we can reject invalid architectures. llvm-svn: 140673
2011-09-28 10:59:25 +08:00
// CHECK_ATHLON_FX_M32: #define __i386 1
// CHECK_ATHLON_FX_M32: #define __i386__ 1
// CHECK_ATHLON_FX_M32: #define __k8 1
// CHECK_ATHLON_FX_M32: #define __k8__ 1
// CHECK_ATHLON_FX_M32: #define __tune_k8__ 1
// CHECK_ATHLON_FX_M32: #define i386 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// RUN: %clang -march=athlon-fx -m64 -E -dM %s -o - 2>&1 \
Pass a target triple explicitly to check platform specific macros definitions. That allows to run the tests on all platforms successfully. llvm-svn: 156500
2012-05-10 02:49:52 +08:00
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ATHLON_FX_M64
Generate tests for all of the x86 SIMD instruction feature set predefines based on the output of GCC as well as the CPU predefines. Invert tests for __AVX__, Clang's AVX feature is hard coded off still. Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's documentation, and ICC's documentation (such as I could dig up). Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and nothing (resp.). llvm-svn: 140692
2011-09-28 18:36:46 +08:00
// CHECK_ATHLON_FX_M64: #define __3dNOW_A__ 1
// CHECK_ATHLON_FX_M64: #define __3dNOW__ 1
// CHECK_ATHLON_FX_M64: #define __MMX__ 1
// CHECK_ATHLON_FX_M64: #define __SSE2_MATH__ 1
// CHECK_ATHLON_FX_M64: #define __SSE2__ 1
// CHECK_ATHLON_FX_M64: #define __SSE_MATH__ 1
// CHECK_ATHLON_FX_M64: #define __SSE__ 1
Teach Clang to reject 32-bit only CPUs when compiling in 64-bit mode. Add 64-bit preprocessor macro tests. llvm-svn: 140688
2011-09-28 17:45:08 +08:00
// CHECK_ATHLON_FX_M64: #define __amd64 1
// CHECK_ATHLON_FX_M64: #define __amd64__ 1
// CHECK_ATHLON_FX_M64: #define __k8 1
// CHECK_ATHLON_FX_M64: #define __k8__ 1
// CHECK_ATHLON_FX_M64: #define __tune_k8__ 1
// CHECK_ATHLON_FX_M64: #define __x86_64 1
// CHECK_ATHLON_FX_M64: #define __x86_64__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// RUN: %clang -march=amdfam10 -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_AMDFAM10_M32
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_AMDFAM10_M32: #define __3dNOW_A__ 1
// CHECK_AMDFAM10_M32: #define __3dNOW__ 1
// CHECK_AMDFAM10_M32: #define __LZCNT__ 1
// CHECK_AMDFAM10_M32: #define __MMX__ 1
// CHECK_AMDFAM10_M32: #define __POPCNT__ 1
// CHECK_AMDFAM10_M32: #define __SSE2_MATH__ 1
// CHECK_AMDFAM10_M32: #define __SSE2__ 1
// CHECK_AMDFAM10_M32: #define __SSE3__ 1
// CHECK_AMDFAM10_M32: #define __SSE4A__ 1
// CHECK_AMDFAM10_M32: #define __SSE_MATH__ 1
// CHECK_AMDFAM10_M32: #define __SSE__ 1
// CHECK_AMDFAM10_M32: #define __amdfam10 1
// CHECK_AMDFAM10_M32: #define __amdfam10__ 1
// CHECK_AMDFAM10_M32: #define __i386 1
// CHECK_AMDFAM10_M32: #define __i386__ 1
// CHECK_AMDFAM10_M32: #define __tune_amdfam10__ 1
Define __SSE4A__ when targeting new AMD CPUs. This doesn't really fit the existing SSELevel so it gets an extra flag. llvm-svn: 157630
2012-05-30 01:48:39 +08:00
// RUN: %clang -march=amdfam10 -m64 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_AMDFAM10_M64
Define __SSE4A__ when targeting new AMD CPUs. This doesn't really fit the existing SSELevel so it gets an extra flag. llvm-svn: 157630
2012-05-30 01:48:39 +08:00
// CHECK_AMDFAM10_M64: #define __3dNOW_A__ 1
// CHECK_AMDFAM10_M64: #define __3dNOW__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_AMDFAM10_M64: #define __LZCNT__ 1
Define __SSE4A__ when targeting new AMD CPUs. This doesn't really fit the existing SSELevel so it gets an extra flag. llvm-svn: 157630
2012-05-30 01:48:39 +08:00
// CHECK_AMDFAM10_M64: #define __MMX__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_AMDFAM10_M64: #define __POPCNT__ 1
Define __SSE4A__ when targeting new AMD CPUs. This doesn't really fit the existing SSELevel so it gets an extra flag. llvm-svn: 157630
2012-05-30 01:48:39 +08:00
// CHECK_AMDFAM10_M64: #define __SSE2_MATH__ 1
// CHECK_AMDFAM10_M64: #define __SSE2__ 1
// CHECK_AMDFAM10_M64: #define __SSE3__ 1
// CHECK_AMDFAM10_M64: #define __SSE4A__ 1
// CHECK_AMDFAM10_M64: #define __SSE_MATH__ 1
// CHECK_AMDFAM10_M64: #define __SSE__ 1
// CHECK_AMDFAM10_M64: #define __amd64 1
// CHECK_AMDFAM10_M64: #define __amd64__ 1
// CHECK_AMDFAM10_M64: #define __amdfam10 1
// CHECK_AMDFAM10_M64: #define __amdfam10__ 1
// CHECK_AMDFAM10_M64: #define __tune_amdfam10__ 1
// CHECK_AMDFAM10_M64: #define __x86_64 1
// CHECK_AMDFAM10_M64: #define __x86_64__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// RUN: %clang -march=btver1 -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_BTVER1_M32
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_BTVER1_M32-NOT: #define __3dNOW_A__ 1
// CHECK_BTVER1_M32-NOT: #define __3dNOW__ 1
// CHECK_BTVER1_M32: #define __LZCNT__ 1
// CHECK_BTVER1_M32: #define __MMX__ 1
// CHECK_BTVER1_M32: #define __POPCNT__ 1
Enabling 3DNow! prefetch instruction support for a few AMD processors in the clang front end. This change will allow the __PRFCHW__ macro to be set on these processors and hence include prfchwintrin.h in x86intrin.h header. Support for the intrinsic itself seems to have already been added in r178041. Differential Revision: http://llvm-reviews.chandlerc.com/D1934 llvm-svn: 192829
2013-10-17 03:07:02 +08:00
// CHECK_BTVER1_M32: #define __PRFCHW__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_BTVER1_M32: #define __SSE2_MATH__ 1
// CHECK_BTVER1_M32: #define __SSE2__ 1
// CHECK_BTVER1_M32: #define __SSE3__ 1
// CHECK_BTVER1_M32: #define __SSE4A__ 1
// CHECK_BTVER1_M32: #define __SSE_MATH__ 1
// CHECK_BTVER1_M32: #define __SSE__ 1
// CHECK_BTVER1_M32: #define __SSSE3__ 1
// CHECK_BTVER1_M32: #define __btver1 1
// CHECK_BTVER1_M32: #define __btver1__ 1
// CHECK_BTVER1_M32: #define __i386 1
// CHECK_BTVER1_M32: #define __i386__ 1
// CHECK_BTVER1_M32: #define __tune_btver1__ 1
// RUN: %clang -march=btver1 -m64 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_BTVER1_M64
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_BTVER1_M64-NOT: #define __3dNOW_A__ 1
// CHECK_BTVER1_M64-NOT: #define __3dNOW__ 1
// CHECK_BTVER1_M64: #define __LZCNT__ 1
// CHECK_BTVER1_M64: #define __MMX__ 1
// CHECK_BTVER1_M64: #define __POPCNT__ 1
Enabling 3DNow! prefetch instruction support for a few AMD processors in the clang front end. This change will allow the __PRFCHW__ macro to be set on these processors and hence include prfchwintrin.h in x86intrin.h header. Support for the intrinsic itself seems to have already been added in r178041. Differential Revision: http://llvm-reviews.chandlerc.com/D1934 llvm-svn: 192829
2013-10-17 03:07:02 +08:00
// CHECK_BTVER1_M64: #define __PRFCHW__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_BTVER1_M64: #define __SSE2_MATH__ 1
// CHECK_BTVER1_M64: #define __SSE2__ 1
// CHECK_BTVER1_M64: #define __SSE3__ 1
// CHECK_BTVER1_M64: #define __SSE4A__ 1
// CHECK_BTVER1_M64: #define __SSE_MATH__ 1
// CHECK_BTVER1_M64: #define __SSE__ 1
// CHECK_BTVER1_M64: #define __SSSE3__ 1
// CHECK_BTVER1_M64: #define __amd64 1
// CHECK_BTVER1_M64: #define __amd64__ 1
// CHECK_BTVER1_M64: #define __btver1 1
// CHECK_BTVER1_M64: #define __btver1__ 1
// CHECK_BTVER1_M64: #define __tune_btver1__ 1
// CHECK_BTVER1_M64: #define __x86_64 1
// CHECK_BTVER1_M64: #define __x86_64__ 1
Add support for -march=btver2. llvm-svn: 181006
2013-05-03 18:47:15 +08:00
// RUN: %clang -march=btver2 -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_BTVER2_M32
Add support for -march=btver2. llvm-svn: 181006
2013-05-03 18:47:15 +08:00
// CHECK_BTVER2_M32-NOT: #define __3dNOW_A__ 1
// CHECK_BTVER2_M32-NOT: #define __3dNOW__ 1
// CHECK_BTVER2_M32: #define __AES__ 1
// CHECK_BTVER2_M32: #define __AVX__ 1
[X86] Slightly refactor default features for AMD bdver cpus (NFC). Also add missing checks to test for target features. This patch simplifies how default target features are set for AMD bdver2 and bdver1. In particular, method 'getDefaultFeatures' now implements a fallthrough from case 'CK_BDVER2' to case 'CK_BDVER1'. That is because 'bdver2' has the same features available in bdver1 plus BMI, FMA, F16C and TBM. This patch also adds missing checks for predefined macros in test predefined-arch-macros.c. In the case of BTVER2, the test now also checks for F16C, BMI and PCLMUL. In the case of BDVER3 and BDVER4, the test now also checks for the presence of FSGSBASE. Differential Revision: http://reviews.llvm.org/D6134 llvm-svn: 221449
2014-11-06 20:08:57 +08:00
// CHECK_BTVER2_M32: #define __BMI__ 1
// CHECK_BTVER2_M32: #define __F16C__ 1
Add support for -march=btver2. llvm-svn: 181006
2013-05-03 18:47:15 +08:00
// CHECK_BTVER2_M32: #define __LZCNT__ 1
// CHECK_BTVER2_M32: #define __MMX__ 1
[X86] Slightly refactor default features for AMD bdver cpus (NFC). Also add missing checks to test for target features. This patch simplifies how default target features are set for AMD bdver2 and bdver1. In particular, method 'getDefaultFeatures' now implements a fallthrough from case 'CK_BDVER2' to case 'CK_BDVER1'. That is because 'bdver2' has the same features available in bdver1 plus BMI, FMA, F16C and TBM. This patch also adds missing checks for predefined macros in test predefined-arch-macros.c. In the case of BTVER2, the test now also checks for F16C, BMI and PCLMUL. In the case of BDVER3 and BDVER4, the test now also checks for the presence of FSGSBASE. Differential Revision: http://reviews.llvm.org/D6134 llvm-svn: 221449
2014-11-06 20:08:57 +08:00
// CHECK_BTVER2_M32: #define __PCLMUL__ 1
Add support for -march=btver2. llvm-svn: 181006
2013-05-03 18:47:15 +08:00
// CHECK_BTVER2_M32: #define __POPCNT__ 1
Enabling 3DNow! prefetch instruction support for a few AMD processors in the clang front end. This change will allow the __PRFCHW__ macro to be set on these processors and hence include prfchwintrin.h in x86intrin.h header. Support for the intrinsic itself seems to have already been added in r178041. Differential Revision: http://llvm-reviews.chandlerc.com/D1934 llvm-svn: 192829
2013-10-17 03:07:02 +08:00
// CHECK_BTVER2_M32: #define __PRFCHW__ 1
Add support for -march=btver2. llvm-svn: 181006
2013-05-03 18:47:15 +08:00
// CHECK_BTVER2_M32: #define __SSE2_MATH__ 1
// CHECK_BTVER2_M32: #define __SSE2__ 1
// CHECK_BTVER2_M32: #define __SSE3__ 1
// CHECK_BTVER2_M32: #define __SSE4A__ 1
// CHECK_BTVER2_M32: #define __SSE_MATH__ 1
// CHECK_BTVER2_M32: #define __SSE__ 1
// CHECK_BTVER2_M32: #define __SSSE3__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_BTVER2_M32: #define __XSAVEOPT__ 1
// CHECK_BTVER2_M32: #define __XSAVE__ 1
Add support for -march=btver2. llvm-svn: 181006
2013-05-03 18:47:15 +08:00
// CHECK_BTVER2_M32: #define __btver2 1
// CHECK_BTVER2_M32: #define __btver2__ 1
// CHECK_BTVER2_M32: #define __i386 1
// CHECK_BTVER2_M32: #define __i386__ 1
// CHECK_BTVER2_M32: #define __tune_btver2__ 1
// RUN: %clang -march=btver2 -m64 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_BTVER2_M64
Add support for -march=btver2. llvm-svn: 181006
2013-05-03 18:47:15 +08:00
// CHECK_BTVER2_M64-NOT: #define __3dNOW_A__ 1
// CHECK_BTVER2_M64-NOT: #define __3dNOW__ 1
// CHECK_BTVER2_M64: #define __AES__ 1
// CHECK_BTVER2_M64: #define __AVX__ 1
[X86] Slightly refactor default features for AMD bdver cpus (NFC). Also add missing checks to test for target features. This patch simplifies how default target features are set for AMD bdver2 and bdver1. In particular, method 'getDefaultFeatures' now implements a fallthrough from case 'CK_BDVER2' to case 'CK_BDVER1'. That is because 'bdver2' has the same features available in bdver1 plus BMI, FMA, F16C and TBM. This patch also adds missing checks for predefined macros in test predefined-arch-macros.c. In the case of BTVER2, the test now also checks for F16C, BMI and PCLMUL. In the case of BDVER3 and BDVER4, the test now also checks for the presence of FSGSBASE. Differential Revision: http://reviews.llvm.org/D6134 llvm-svn: 221449
2014-11-06 20:08:57 +08:00
// CHECK_BTVER2_M64: #define __BMI__ 1
// CHECK_BTVER2_M64: #define __F16C__ 1
Add support for -march=btver2. llvm-svn: 181006
2013-05-03 18:47:15 +08:00
// CHECK_BTVER2_M64: #define __LZCNT__ 1
// CHECK_BTVER2_M64: #define __MMX__ 1
[X86] Slightly refactor default features for AMD bdver cpus (NFC). Also add missing checks to test for target features. This patch simplifies how default target features are set for AMD bdver2 and bdver1. In particular, method 'getDefaultFeatures' now implements a fallthrough from case 'CK_BDVER2' to case 'CK_BDVER1'. That is because 'bdver2' has the same features available in bdver1 plus BMI, FMA, F16C and TBM. This patch also adds missing checks for predefined macros in test predefined-arch-macros.c. In the case of BTVER2, the test now also checks for F16C, BMI and PCLMUL. In the case of BDVER3 and BDVER4, the test now also checks for the presence of FSGSBASE. Differential Revision: http://reviews.llvm.org/D6134 llvm-svn: 221449
2014-11-06 20:08:57 +08:00
// CHECK_BTVER2_M64: #define __PCLMUL__ 1
Add support for -march=btver2. llvm-svn: 181006
2013-05-03 18:47:15 +08:00
// CHECK_BTVER2_M64: #define __POPCNT__ 1
Enabling 3DNow! prefetch instruction support for a few AMD processors in the clang front end. This change will allow the __PRFCHW__ macro to be set on these processors and hence include prfchwintrin.h in x86intrin.h header. Support for the intrinsic itself seems to have already been added in r178041. Differential Revision: http://llvm-reviews.chandlerc.com/D1934 llvm-svn: 192829
2013-10-17 03:07:02 +08:00
// CHECK_BTVER2_M64: #define __PRFCHW__ 1
Add support for -march=btver2. llvm-svn: 181006
2013-05-03 18:47:15 +08:00
// CHECK_BTVER2_M64: #define __SSE2_MATH__ 1
// CHECK_BTVER2_M64: #define __SSE2__ 1
// CHECK_BTVER2_M64: #define __SSE3__ 1
// CHECK_BTVER2_M64: #define __SSE4A__ 1
// CHECK_BTVER2_M64: #define __SSE_MATH__ 1
// CHECK_BTVER2_M64: #define __SSE__ 1
// CHECK_BTVER2_M64: #define __SSSE3__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_BTVER2_M64: #define __XSAVEOPT__ 1
// CHECK_BTVER2_M64: #define __XSAVE__ 1
Add support for -march=btver2. llvm-svn: 181006
2013-05-03 18:47:15 +08:00
// CHECK_BTVER2_M64: #define __amd64 1
// CHECK_BTVER2_M64: #define __amd64__ 1
// CHECK_BTVER2_M64: #define __btver2 1
// CHECK_BTVER2_M64: #define __btver2__ 1
// CHECK_BTVER2_M64: #define __tune_btver2__ 1
// CHECK_BTVER2_M64: #define __x86_64 1
// CHECK_BTVER2_M64: #define __x86_64__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// RUN: %clang -march=bdver1 -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_BDVER1_M32
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_BDVER1_M32-NOT: #define __3dNOW_A__ 1
// CHECK_BDVER1_M32-NOT: #define __3dNOW__ 1
// CHECK_BDVER1_M32: #define __AES__ 1
// CHECK_BDVER1_M32: #define __AVX__ 1
// CHECK_BDVER1_M32: #define __FMA4__ 1
// CHECK_BDVER1_M32: #define __LZCNT__ 1
// CHECK_BDVER1_M32: #define __MMX__ 1
// CHECK_BDVER1_M32: #define __PCLMUL__ 1
// CHECK_BDVER1_M32: #define __POPCNT__ 1
Enabling 3DNow! prefetch instruction support for a few AMD processors in the clang front end. This change will allow the __PRFCHW__ macro to be set on these processors and hence include prfchwintrin.h in x86intrin.h header. Support for the intrinsic itself seems to have already been added in r178041. Differential Revision: http://llvm-reviews.chandlerc.com/D1934 llvm-svn: 192829
2013-10-17 03:07:02 +08:00
// CHECK_BDVER1_M32: #define __PRFCHW__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_BDVER1_M32: #define __SSE2_MATH__ 1
// CHECK_BDVER1_M32: #define __SSE2__ 1
// CHECK_BDVER1_M32: #define __SSE3__ 1
// CHECK_BDVER1_M32: #define __SSE4A__ 1
// CHECK_BDVER1_M32: #define __SSE4_1__ 1
// CHECK_BDVER1_M32: #define __SSE4_2__ 1
// CHECK_BDVER1_M32: #define __SSE_MATH__ 1
// CHECK_BDVER1_M32: #define __SSE__ 1
// CHECK_BDVER1_M32: #define __SSSE3__ 1
// CHECK_BDVER1_M32: #define __XOP__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_BDVER1_M32: #define __XSAVE__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_BDVER1_M32: #define __bdver1 1
// CHECK_BDVER1_M32: #define __bdver1__ 1
// CHECK_BDVER1_M32: #define __i386 1
// CHECK_BDVER1_M32: #define __i386__ 1
// CHECK_BDVER1_M32: #define __tune_bdver1__ 1
Define __SSE4A__ when targeting new AMD CPUs. This doesn't really fit the existing SSELevel so it gets an extra flag. llvm-svn: 157630
2012-05-30 01:48:39 +08:00
// RUN: %clang -march=bdver1 -m64 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_BDVER1_M64
Define __SSE4A__ when targeting new AMD CPUs. This doesn't really fit the existing SSELevel so it gets an extra flag. llvm-svn: 157630
2012-05-30 01:48:39 +08:00
// CHECK_BDVER1_M64-NOT: #define __3dNOW_A__ 1
// CHECK_BDVER1_M64-NOT: #define __3dNOW__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_BDVER1_M64: #define __AES__ 1
// CHECK_BDVER1_M64: #define __AVX__ 1
Add XOP feature flag. llvm-svn: 158284
2012-06-10 06:24:14 +08:00
// CHECK_BDVER1_M64: #define __FMA4__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_BDVER1_M64: #define __LZCNT__ 1
Define __SSE4A__ when targeting new AMD CPUs. This doesn't really fit the existing SSELevel so it gets an extra flag. llvm-svn: 157630
2012-05-30 01:48:39 +08:00
// CHECK_BDVER1_M64: #define __MMX__ 1
Add XOP feature flag. llvm-svn: 158284
2012-06-10 06:24:14 +08:00
// CHECK_BDVER1_M64: #define __PCLMUL__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_BDVER1_M64: #define __POPCNT__ 1
Enabling 3DNow! prefetch instruction support for a few AMD processors in the clang front end. This change will allow the __PRFCHW__ macro to be set on these processors and hence include prfchwintrin.h in x86intrin.h header. Support for the intrinsic itself seems to have already been added in r178041. Differential Revision: http://llvm-reviews.chandlerc.com/D1934 llvm-svn: 192829
2013-10-17 03:07:02 +08:00
// CHECK_BDVER1_M64: #define __PRFCHW__ 1
Define __SSE4A__ when targeting new AMD CPUs. This doesn't really fit the existing SSELevel so it gets an extra flag. llvm-svn: 157630
2012-05-30 01:48:39 +08:00
// CHECK_BDVER1_M64: #define __SSE2_MATH__ 1
// CHECK_BDVER1_M64: #define __SSE2__ 1
// CHECK_BDVER1_M64: #define __SSE3__ 1
// CHECK_BDVER1_M64: #define __SSE4A__ 1
// CHECK_BDVER1_M64: #define __SSE4_1__ 1
// CHECK_BDVER1_M64: #define __SSE4_2__ 1
// CHECK_BDVER1_M64: #define __SSE_MATH__ 1
// CHECK_BDVER1_M64: #define __SSE__ 1
// CHECK_BDVER1_M64: #define __SSSE3__ 1
Add XOP feature flag. llvm-svn: 158284
2012-06-10 06:24:14 +08:00
// CHECK_BDVER1_M64: #define __XOP__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_BDVER1_M64: #define __XSAVE__ 1
Define __SSE4A__ when targeting new AMD CPUs. This doesn't really fit the existing SSELevel so it gets an extra flag. llvm-svn: 157630
2012-05-30 01:48:39 +08:00
// CHECK_BDVER1_M64: #define __amd64 1
// CHECK_BDVER1_M64: #define __amd64__ 1
// CHECK_BDVER1_M64: #define __bdver1 1
// CHECK_BDVER1_M64: #define __bdver1__ 1
// CHECK_BDVER1_M64: #define __tune_bdver1__ 1
// CHECK_BDVER1_M64: #define __x86_64 1
// CHECK_BDVER1_M64: #define __x86_64__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// RUN: %clang -march=bdver2 -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_BDVER2_M32
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_BDVER2_M32-NOT: #define __3dNOW_A__ 1
// CHECK_BDVER2_M32-NOT: #define __3dNOW__ 1
// CHECK_BDVER2_M32: #define __AES__ 1
// CHECK_BDVER2_M32: #define __AVX__ 1
// CHECK_BDVER2_M32: #define __BMI__ 1
// CHECK_BDVER2_M32: #define __F16C__ 1
// CHECK_BDVER2_M32: #define __FMA4__ 1
// CHECK_BDVER2_M32: #define __FMA__ 1
// CHECK_BDVER2_M32: #define __LZCNT__ 1
// CHECK_BDVER2_M32: #define __MMX__ 1
// CHECK_BDVER2_M32: #define __PCLMUL__ 1
// CHECK_BDVER2_M32: #define __POPCNT__ 1
Enabling 3DNow! prefetch instruction support for a few AMD processors in the clang front end. This change will allow the __PRFCHW__ macro to be set on these processors and hence include prfchwintrin.h in x86intrin.h header. Support for the intrinsic itself seems to have already been added in r178041. Differential Revision: http://llvm-reviews.chandlerc.com/D1934 llvm-svn: 192829
2013-10-17 03:07:02 +08:00
// CHECK_BDVER2_M32: #define __PRFCHW__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_BDVER2_M32: #define __SSE2_MATH__ 1
// CHECK_BDVER2_M32: #define __SSE2__ 1
// CHECK_BDVER2_M32: #define __SSE3__ 1
// CHECK_BDVER2_M32: #define __SSE4A__ 1
// CHECK_BDVER2_M32: #define __SSE4_1__ 1
// CHECK_BDVER2_M32: #define __SSE4_2__ 1
// CHECK_BDVER2_M32: #define __SSE_MATH__ 1
// CHECK_BDVER2_M32: #define __SSE__ 1
// CHECK_BDVER2_M32: #define __SSSE3__ 1
Adding -mtbm and -mno-tbm command line options to the clang front end for the x86 TBM instruction set. Also adding a __TBM__ macro if the TBM feature is enabled. Otherwise there should be no functionality change to existing features. Phabricator code review is located here: http://llvm-reviews.chandlerc.com/D1693 llvm-svn: 191326
2013-09-25 03:00:58 +08:00
// CHECK_BDVER2_M32: #define __TBM__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_BDVER2_M32: #define __XOP__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_BDVER2_M32: #define __XSAVE__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_BDVER2_M32: #define __bdver2 1
// CHECK_BDVER2_M32: #define __bdver2__ 1
// CHECK_BDVER2_M32: #define __i386 1
// CHECK_BDVER2_M32: #define __i386__ 1
// CHECK_BDVER2_M32: #define __tune_bdver2__ 1
// RUN: %clang -march=bdver2 -m64 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_BDVER2_M64
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_BDVER2_M64-NOT: #define __3dNOW_A__ 1
// CHECK_BDVER2_M64-NOT: #define __3dNOW__ 1
// CHECK_BDVER2_M64: #define __AES__ 1
// CHECK_BDVER2_M64: #define __AVX__ 1
// CHECK_BDVER2_M64: #define __BMI__ 1
// CHECK_BDVER2_M64: #define __F16C__ 1
// CHECK_BDVER2_M64: #define __FMA4__ 1
// CHECK_BDVER2_M64: #define __FMA__ 1
// CHECK_BDVER2_M64: #define __LZCNT__ 1
// CHECK_BDVER2_M64: #define __MMX__ 1
// CHECK_BDVER2_M64: #define __PCLMUL__ 1
// CHECK_BDVER2_M64: #define __POPCNT__ 1
Enabling 3DNow! prefetch instruction support for a few AMD processors in the clang front end. This change will allow the __PRFCHW__ macro to be set on these processors and hence include prfchwintrin.h in x86intrin.h header. Support for the intrinsic itself seems to have already been added in r178041. Differential Revision: http://llvm-reviews.chandlerc.com/D1934 llvm-svn: 192829
2013-10-17 03:07:02 +08:00
// CHECK_BDVER2_M64: #define __PRFCHW__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_BDVER2_M64: #define __SSE2_MATH__ 1
// CHECK_BDVER2_M64: #define __SSE2__ 1
// CHECK_BDVER2_M64: #define __SSE3__ 1
// CHECK_BDVER2_M64: #define __SSE4A__ 1
// CHECK_BDVER2_M64: #define __SSE4_1__ 1
// CHECK_BDVER2_M64: #define __SSE4_2__ 1
// CHECK_BDVER2_M64: #define __SSE_MATH__ 1
// CHECK_BDVER2_M64: #define __SSE__ 1
// CHECK_BDVER2_M64: #define __SSSE3__ 1
Adding -mtbm and -mno-tbm command line options to the clang front end for the x86 TBM instruction set. Also adding a __TBM__ macro if the TBM feature is enabled. Otherwise there should be no functionality change to existing features. Phabricator code review is located here: http://llvm-reviews.chandlerc.com/D1693 llvm-svn: 191326
2013-09-25 03:00:58 +08:00
// CHECK_BDVER2_M64: #define __TBM__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_BDVER2_M64: #define __XOP__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_BDVER2_M64: #define __XSAVE__ 1
Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. llvm-svn: 168239
2012-11-17 09:43:10 +08:00
// CHECK_BDVER2_M64: #define __amd64 1
// CHECK_BDVER2_M64: #define __amd64__ 1
// CHECK_BDVER2_M64: #define __bdver2 1
// CHECK_BDVER2_M64: #define __bdver2__ 1
// CHECK_BDVER2_M64: #define __tune_bdver2__ 1
// CHECK_BDVER2_M64: #define __x86_64 1
// CHECK_BDVER2_M64: #define __x86_64__ 1
Driver: Add support for -march=bdver3 on x86. llvm-svn: 193985
2013-11-04 18:29:51 +08:00
// RUN: %clang -march=bdver3 -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_BDVER3_M32
Driver: Add support for -march=bdver3 on x86. llvm-svn: 193985
2013-11-04 18:29:51 +08:00
// CHECK_BDVER3_M32-NOT: #define __3dNOW_A__ 1
// CHECK_BDVER3_M32-NOT: #define __3dNOW__ 1
// CHECK_BDVER3_M32: #define __AES__ 1
// CHECK_BDVER3_M32: #define __AVX__ 1
// CHECK_BDVER3_M32: #define __BMI__ 1
// CHECK_BDVER3_M32: #define __F16C__ 1
// CHECK_BDVER3_M32: #define __FMA4__ 1
// CHECK_BDVER3_M32: #define __FMA__ 1
[X86] Slightly refactor default features for AMD bdver cpus (NFC). Also add missing checks to test for target features. This patch simplifies how default target features are set for AMD bdver2 and bdver1. In particular, method 'getDefaultFeatures' now implements a fallthrough from case 'CK_BDVER2' to case 'CK_BDVER1'. That is because 'bdver2' has the same features available in bdver1 plus BMI, FMA, F16C and TBM. This patch also adds missing checks for predefined macros in test predefined-arch-macros.c. In the case of BTVER2, the test now also checks for F16C, BMI and PCLMUL. In the case of BDVER3 and BDVER4, the test now also checks for the presence of FSGSBASE. Differential Revision: http://reviews.llvm.org/D6134 llvm-svn: 221449
2014-11-06 20:08:57 +08:00
// CHECK_BDVER3_M32: #define __FSGSBASE__ 1
Driver: Add support for -march=bdver3 on x86. llvm-svn: 193985
2013-11-04 18:29:51 +08:00
// CHECK_BDVER3_M32: #define __LZCNT__ 1
// CHECK_BDVER3_M32: #define __MMX__ 1
// CHECK_BDVER3_M32: #define __PCLMUL__ 1
// CHECK_BDVER3_M32: #define __POPCNT__ 1
// CHECK_BDVER3_M32: #define __PRFCHW__ 1
// CHECK_BDVER3_M32: #define __SSE2_MATH__ 1
// CHECK_BDVER3_M32: #define __SSE2__ 1
// CHECK_BDVER3_M32: #define __SSE3__ 1
// CHECK_BDVER3_M32: #define __SSE4A__ 1
// CHECK_BDVER3_M32: #define __SSE4_1__ 1
// CHECK_BDVER3_M32: #define __SSE4_2__ 1
// CHECK_BDVER3_M32: #define __SSE_MATH__ 1
// CHECK_BDVER3_M32: #define __SSE__ 1
// CHECK_BDVER3_M32: #define __SSSE3__ 1
// CHECK_BDVER3_M32: #define __TBM__ 1
// CHECK_BDVER3_M32: #define __XOP__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_BDVER3_M32: #define __XSAVEOPT__ 1
// CHECK_BDVER3_M32: #define __XSAVE__ 1
Driver: Add support for -march=bdver3 on x86. llvm-svn: 193985
2013-11-04 18:29:51 +08:00
// CHECK_BDVER3_M32: #define __bdver3 1
// CHECK_BDVER3_M32: #define __bdver3__ 1
// CHECK_BDVER3_M32: #define __i386 1
// CHECK_BDVER3_M32: #define __i386__ 1
// CHECK_BDVER3_M32: #define __tune_bdver3__ 1
// RUN: %clang -march=bdver3 -m64 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_BDVER3_M64
Driver: Add support for -march=bdver3 on x86. llvm-svn: 193985
2013-11-04 18:29:51 +08:00
// CHECK_BDVER3_M64-NOT: #define __3dNOW_A__ 1
// CHECK_BDVER3_M64-NOT: #define __3dNOW__ 1
// CHECK_BDVER3_M64: #define __AES__ 1
// CHECK_BDVER3_M64: #define __AVX__ 1
// CHECK_BDVER3_M64: #define __BMI__ 1
// CHECK_BDVER3_M64: #define __F16C__ 1
// CHECK_BDVER3_M64: #define __FMA4__ 1
// CHECK_BDVER3_M64: #define __FMA__ 1
[X86] Slightly refactor default features for AMD bdver cpus (NFC). Also add missing checks to test for target features. This patch simplifies how default target features are set for AMD bdver2 and bdver1. In particular, method 'getDefaultFeatures' now implements a fallthrough from case 'CK_BDVER2' to case 'CK_BDVER1'. That is because 'bdver2' has the same features available in bdver1 plus BMI, FMA, F16C and TBM. This patch also adds missing checks for predefined macros in test predefined-arch-macros.c. In the case of BTVER2, the test now also checks for F16C, BMI and PCLMUL. In the case of BDVER3 and BDVER4, the test now also checks for the presence of FSGSBASE. Differential Revision: http://reviews.llvm.org/D6134 llvm-svn: 221449
2014-11-06 20:08:57 +08:00
// CHECK_BDVER3_M64: #define __FSGSBASE__ 1
Driver: Add support for -march=bdver3 on x86. llvm-svn: 193985
2013-11-04 18:29:51 +08:00
// CHECK_BDVER3_M64: #define __LZCNT__ 1
// CHECK_BDVER3_M64: #define __MMX__ 1
// CHECK_BDVER3_M64: #define __PCLMUL__ 1
// CHECK_BDVER3_M64: #define __POPCNT__ 1
// CHECK_BDVER3_M64: #define __PRFCHW__ 1
// CHECK_BDVER3_M64: #define __SSE2_MATH__ 1
// CHECK_BDVER3_M64: #define __SSE2__ 1
// CHECK_BDVER3_M64: #define __SSE3__ 1
// CHECK_BDVER3_M64: #define __SSE4A__ 1
// CHECK_BDVER3_M64: #define __SSE4_1__ 1
// CHECK_BDVER3_M64: #define __SSE4_2__ 1
// CHECK_BDVER3_M64: #define __SSE_MATH__ 1
// CHECK_BDVER3_M64: #define __SSE__ 1
// CHECK_BDVER3_M64: #define __SSSE3__ 1
// CHECK_BDVER3_M64: #define __TBM__ 1
// CHECK_BDVER3_M64: #define __XOP__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_BDVER3_M64: #define __XSAVEOPT__ 1
// CHECK_BDVER3_M64: #define __XSAVE__ 1
Driver: Add support for -march=bdver3 on x86. llvm-svn: 193985
2013-11-04 18:29:51 +08:00
// CHECK_BDVER3_M64: #define __amd64 1
// CHECK_BDVER3_M64: #define __amd64__ 1
// CHECK_BDVER3_M64: #define __bdver3 1
// CHECK_BDVER3_M64: #define __bdver3__ 1
// CHECK_BDVER3_M64: #define __tune_bdver3__ 1
// CHECK_BDVER3_M64: #define __x86_64 1
// CHECK_BDVER3_M64: #define __x86_64__ 1
Add support for -march=bdver4. llvm-svn: 207848
2014-05-02 23:47:51 +08:00
// RUN: %clang -march=bdver4 -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_BDVER4_M32
Add support for -march=bdver4. llvm-svn: 207848
2014-05-02 23:47:51 +08:00
// CHECK_BDVER4_M32-NOT: #define __3dNOW_A__ 1
// CHECK_BDVER4_M32-NOT: #define __3dNOW__ 1
// CHECK_BDVER4_M32: #define __AES__ 1
// CHECK_BDVER4_M32: #define __AVX2__ 1
// CHECK_BDVER4_M32: #define __AVX__ 1
// CHECK_BDVER4_M32: #define __BMI2__ 1
// CHECK_BDVER4_M32: #define __BMI__ 1
// CHECK_BDVER4_M32: #define __F16C__ 1
// CHECK_BDVER4_M32: #define __FMA4__ 1
// CHECK_BDVER4_M32: #define __FMA__ 1
[X86] Slightly refactor default features for AMD bdver cpus (NFC). Also add missing checks to test for target features. This patch simplifies how default target features are set for AMD bdver2 and bdver1. In particular, method 'getDefaultFeatures' now implements a fallthrough from case 'CK_BDVER2' to case 'CK_BDVER1'. That is because 'bdver2' has the same features available in bdver1 plus BMI, FMA, F16C and TBM. This patch also adds missing checks for predefined macros in test predefined-arch-macros.c. In the case of BTVER2, the test now also checks for F16C, BMI and PCLMUL. In the case of BDVER3 and BDVER4, the test now also checks for the presence of FSGSBASE. Differential Revision: http://reviews.llvm.org/D6134 llvm-svn: 221449
2014-11-06 20:08:57 +08:00
// CHECK_BDVER4_M32: #define __FSGSBASE__ 1
Add support for -march=bdver4. llvm-svn: 207848
2014-05-02 23:47:51 +08:00
// CHECK_BDVER4_M32: #define __LZCNT__ 1
// CHECK_BDVER4_M32: #define __MMX__ 1
// CHECK_BDVER4_M32: #define __PCLMUL__ 1
// CHECK_BDVER4_M32: #define __POPCNT__ 1
// CHECK_BDVER4_M32: #define __PRFCHW__ 1
// CHECK_BDVER4_M32: #define __SSE2_MATH__ 1
// CHECK_BDVER4_M32: #define __SSE2__ 1
// CHECK_BDVER4_M32: #define __SSE3__ 1
// CHECK_BDVER4_M32: #define __SSE4A__ 1
// CHECK_BDVER4_M32: #define __SSE4_1__ 1
// CHECK_BDVER4_M32: #define __SSE4_2__ 1
// CHECK_BDVER4_M32: #define __SSE_MATH__ 1
// CHECK_BDVER4_M32: #define __SSE__ 1
// CHECK_BDVER4_M32: #define __SSSE3__ 1
// CHECK_BDVER4_M32: #define __TBM__ 1
// CHECK_BDVER4_M32: #define __XOP__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_BDVER4_M32: #define __XSAVE__ 1
Add support for -march=bdver4. llvm-svn: 207848
2014-05-02 23:47:51 +08:00
// CHECK_BDVER4_M32: #define __bdver4 1
// CHECK_BDVER4_M32: #define __bdver4__ 1
// CHECK_BDVER4_M32: #define __i386 1
// CHECK_BDVER4_M32: #define __i386__ 1
// CHECK_BDVER4_M32: #define __tune_bdver4__ 1
// RUN: %clang -march=bdver4 -m64 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_BDVER4_M64
Add support for -march=bdver4. llvm-svn: 207848
2014-05-02 23:47:51 +08:00
// CHECK_BDVER4_M64-NOT: #define __3dNOW_A__ 1
// CHECK_BDVER4_M64-NOT: #define __3dNOW__ 1
// CHECK_BDVER4_M64: #define __AES__ 1
// CHECK_BDVER4_M64: #define __AVX2__ 1
// CHECK_BDVER4_M64: #define __AVX__ 1
// CHECK_BDVER4_M64: #define __BMI2__ 1
// CHECK_BDVER4_M64: #define __BMI__ 1
// CHECK_BDVER4_M64: #define __F16C__ 1
// CHECK_BDVER4_M64: #define __FMA4__ 1
// CHECK_BDVER4_M64: #define __FMA__ 1
[X86] Slightly refactor default features for AMD bdver cpus (NFC). Also add missing checks to test for target features. This patch simplifies how default target features are set for AMD bdver2 and bdver1. In particular, method 'getDefaultFeatures' now implements a fallthrough from case 'CK_BDVER2' to case 'CK_BDVER1'. That is because 'bdver2' has the same features available in bdver1 plus BMI, FMA, F16C and TBM. This patch also adds missing checks for predefined macros in test predefined-arch-macros.c. In the case of BTVER2, the test now also checks for F16C, BMI and PCLMUL. In the case of BDVER3 and BDVER4, the test now also checks for the presence of FSGSBASE. Differential Revision: http://reviews.llvm.org/D6134 llvm-svn: 221449
2014-11-06 20:08:57 +08:00
// CHECK_BDVER4_M64: #define __FSGSBASE__ 1
Add support for -march=bdver4. llvm-svn: 207848
2014-05-02 23:47:51 +08:00
// CHECK_BDVER4_M64: #define __LZCNT__ 1
// CHECK_BDVER4_M64: #define __MMX__ 1
// CHECK_BDVER4_M64: #define __PCLMUL__ 1
// CHECK_BDVER4_M64: #define __POPCNT__ 1
// CHECK_BDVER4_M64: #define __PRFCHW__ 1
// CHECK_BDVER4_M64: #define __SSE2_MATH__ 1
// CHECK_BDVER4_M64: #define __SSE2__ 1
// CHECK_BDVER4_M64: #define __SSE3__ 1
// CHECK_BDVER4_M64: #define __SSE4A__ 1
// CHECK_BDVER4_M64: #define __SSE4_1__ 1
// CHECK_BDVER4_M64: #define __SSE4_2__ 1
// CHECK_BDVER4_M64: #define __SSE_MATH__ 1
// CHECK_BDVER4_M64: #define __SSE__ 1
// CHECK_BDVER4_M64: #define __SSSE3__ 1
// CHECK_BDVER4_M64: #define __TBM__ 1
// CHECK_BDVER4_M64: #define __XOP__ 1
[X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
2015-10-15 13:23:38 +08:00
// CHECK_BDVER4_M64: #define __XSAVE__ 1
Add support for -march=bdver4. llvm-svn: 207848
2014-05-02 23:47:51 +08:00
// CHECK_BDVER4_M64: #define __amd64 1
// CHECK_BDVER4_M64: #define __amd64__ 1
// CHECK_BDVER4_M64: #define __bdver4 1
// CHECK_BDVER4_M64: #define __bdver4__ 1
// CHECK_BDVER4_M64: #define __tune_bdver4__ 1
// CHECK_BDVER4_M64: #define __x86_64 1
// CHECK_BDVER4_M64: #define __x86_64__ 1
AMD family 17h (znver1) enablement Summary: This patch enables the following 1. AMD family 17h architecture using "znver1" tune flag (-march, -mcpu). 2. ISAs that are enabled for "znver1" architecture. 3. Checks ADX isa from cpuid to identify "znver1" flag when -march=native is used. 4. ISAs FMA4, XOP are disabled as they are dropped from amdfam17. 5. For the time being, it uses the btver2 scheduler model. 6. Test file is updated to check this flag. This is linked to llvm review item https://reviews.llvm.org/D28017 Patch by Ganesh Gopalasubramanian. Additional test cases added by Craig Topper. Reviewers: RKSimon, craig.topper Subscribers: cfe-commits, RKSimon, ashutosh.nema, llvm-commits Differential Revision: https://reviews.llvm.org/D28018 llvm-svn: 291544
2017-01-10 14:02:12 +08:00
// RUN: %clang -march=znver1 -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ZNVER1_M32
// CHECK_ZNVER1_M32-NOT: #define __3dNOW_A__ 1
// CHECK_ZNVER1_M32-NOT: #define __3dNOW__ 1
// CHECK_ZNVER1_M32: #define __ADX__ 1
// CHECK_ZNVER1_M32: #define __AES__ 1
// CHECK_ZNVER1_M32: #define __AVX2__ 1
// CHECK_ZNVER1_M32: #define __AVX__ 1
// CHECK_ZNVER1_M32: #define __BMI2__ 1
// CHECK_ZNVER1_M32: #define __BMI__ 1
// CHECK_ZNVER1_M32: #define __F16C__ 1
// CHECK_ZNVER1_M32: #define __FMA__ 1
// CHECK_ZNVER1_M32: #define __FSGSBASE__ 1
// CHECK_ZNVER1_M32: #define __LZCNT__ 1
// CHECK_ZNVER1_M32: #define __MMX__ 1
// CHECK_ZNVER1_M32: #define __PCLMUL__ 1
// CHECK_ZNVER1_M32: #define __POPCNT__ 1
// CHECK_ZNVER1_M32: #define __PRFCHW__ 1
// CHECK_ZNVER1_M32: #define __RDRND__ 1
// CHECK_ZNVER1_M32: #define __RDSEED__ 1
// CHECK_ZNVER1_M32: #define __SHA__ 1
// CHECK_ZNVER1_M32: #define __SSE2_MATH__ 1
// CHECK_ZNVER1_M32: #define __SSE2__ 1
// CHECK_ZNVER1_M32: #define __SSE3__ 1
// CHECK_ZNVER1_M32: #define __SSE4A__ 1
// CHECK_ZNVER1_M32: #define __SSE4_1__ 1
// CHECK_ZNVER1_M32: #define __SSE4_2__ 1
// CHECK_ZNVER1_M32: #define __SSE_MATH__ 1
// CHECK_ZNVER1_M32: #define __SSE__ 1
// CHECK_ZNVER1_M32: #define __SSSE3__ 1
// CHECK_ZNVER1_M32: #define __XSAVEC__ 1
// CHECK_ZNVER1_M32: #define __XSAVEOPT__ 1
// CHECK_ZNVER1_M32: #define __XSAVES__ 1
// CHECK_ZNVER1_M32: #define __XSAVE__ 1
// CHECK_ZNVER1_M32: #define __i386 1
// CHECK_ZNVER1_M32: #define __i386__ 1
// CHECK_ZNVER1_M32: #define __tune_znver1__ 1
// CHECK_ZNVER1_M32: #define __znver1 1
// CHECK_ZNVER1_M32: #define __znver1__ 1
// RUN: %clang -march=znver1 -m64 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ZNVER1_M64
// CHECK_ZNVER1_M64-NOT: #define __3dNOW_A__ 1
// CHECK_ZNVER1_M64-NOT: #define __3dNOW__ 1
// CHECK_ZNVER1_M64: #define __ADX__ 1
// CHECK_ZNVER1_M64: #define __AES__ 1
// CHECK_ZNVER1_M64: #define __AVX2__ 1
// CHECK_ZNVER1_M64: #define __AVX__ 1
// CHECK_ZNVER1_M64: #define __BMI2__ 1
// CHECK_ZNVER1_M64: #define __BMI__ 1
// CHECK_ZNVER1_M64: #define __F16C__ 1
// CHECK_ZNVER1_M64: #define __FMA__ 1
// CHECK_ZNVER1_M64: #define __FSGSBASE__ 1
// CHECK_ZNVER1_M64: #define __LZCNT__ 1
// CHECK_ZNVER1_M64: #define __MMX__ 1
// CHECK_ZNVER1_M64: #define __PCLMUL__ 1
// CHECK_ZNVER1_M64: #define __POPCNT__ 1
// CHECK_ZNVER1_M64: #define __PRFCHW__ 1
// CHECK_ZNVER1_M64: #define __RDRND__ 1
// CHECK_ZNVER1_M64: #define __RDSEED__ 1
// CHECK_ZNVER1_M64: #define __SHA__ 1
// CHECK_ZNVER1_M64: #define __SSE2_MATH__ 1
// CHECK_ZNVER1_M64: #define __SSE2__ 1
// CHECK_ZNVER1_M64: #define __SSE3__ 1
// CHECK_ZNVER1_M64: #define __SSE4A__ 1
// CHECK_ZNVER1_M64: #define __SSE4_1__ 1
// CHECK_ZNVER1_M64: #define __SSE4_2__ 1
// CHECK_ZNVER1_M64: #define __SSE_MATH__ 1
// CHECK_ZNVER1_M64: #define __SSE__ 1
// CHECK_ZNVER1_M64: #define __SSSE3__ 1
// CHECK_ZNVER1_M64: #define __XSAVEC__ 1
// CHECK_ZNVER1_M64: #define __XSAVEOPT__ 1
// CHECK_ZNVER1_M64: #define __XSAVES__ 1
// CHECK_ZNVER1_M64: #define __XSAVE__ 1
// CHECK_ZNVER1_M64: #define __amd64 1
// CHECK_ZNVER1_M64: #define __amd64__ 1
// CHECK_ZNVER1_M64: #define __tune_znver1__ 1
// CHECK_ZNVER1_M64: #define __x86_64 1
// CHECK_ZNVER1_M64: #define __x86_64__ 1
// CHECK_ZNVER1_M64: #define __znver1 1
// CHECK_ZNVER1_M64: #define __znver1__ 1
Add a little banner to this test. This lets my scripts more easily automate the process of updating and generating these tests. If anyone is really interested, I can check my scripts for generating this test in, but its a horrible pile of shell... Not sure its really worth it. llvm-svn: 140691
2011-09-28 18:17:41 +08:00
//
// End X86/GCC/Linux tests ------------------
Add preprocessor support for powerpc vsx. The test should be expanded upon for more powerpc checking. llvm-svn: 192849
2013-10-17 05:19:26 +08:00
// Begin PPC/GCC/Linux tests ----------------
// RUN: %clang -mvsx -E -dM %s -o - 2>&1 \
// RUN: -target powerpc64-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PPC_VSX_M64
Add preprocessor support for powerpc vsx. The test should be expanded upon for more powerpc checking. llvm-svn: 192849
2013-10-17 05:19:26 +08:00
//
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// CHECK_PPC_VSX_M64: #define __VSX__ 1
[PowerPC] Add feature for Power8 vector extensions The current VSX feature for PowerPC specifies availability of the VSX instructions added with the 2.06 architecture version. With 2.07, the architecture adds new instructions to both the Category:Vector and Category:VSX instruction sets. Additionally, unaligned vector storage operations have improved performance. This patch adds a feature to provide access to the new instructions and performance capabilities of Power8. For compatibility with GCC, the feature is controlled via a new -mpower8-vector switch, and the feature causes the __POWER8_VECTOR__ builtin define to be generated by the preprocessor. There is a companion patch for llvm being committed at the same time. llvm-svn: 219502
2014-10-10 23:09:43 +08:00
//
// RUN: %clang -mpower8-vector -E -dM %s -o - 2>&1 \
// RUN: -target powerpc64-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PPC_POWER8_VECTOR_M64
[PowerPC] Add feature for Power8 vector extensions The current VSX feature for PowerPC specifies availability of the VSX instructions added with the 2.06 architecture version. With 2.07, the architecture adds new instructions to both the Category:Vector and Category:VSX instruction sets. Additionally, unaligned vector storage operations have improved performance. This patch adds a feature to provide access to the new instructions and performance capabilities of Power8. For compatibility with GCC, the feature is controlled via a new -mpower8-vector switch, and the feature causes the __POWER8_VECTOR__ builtin define to be generated by the preprocessor. There is a companion patch for llvm being committed at the same time. llvm-svn: 219502
2014-10-10 23:09:43 +08:00
//
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// CHECK_PPC_POWER8_VECTOR_M64: #define __POWER8_VECTOR__ 1
[PowerPC] Add feature for Power8 vector extensions The current VSX feature for PowerPC specifies availability of the VSX instructions added with the 2.06 architecture version. With 2.07, the architecture adds new instructions to both the Category:Vector and Category:VSX instruction sets. Additionally, unaligned vector storage operations have improved performance. This patch adds a feature to provide access to the new instructions and performance capabilities of Power8. For compatibility with GCC, the feature is controlled via a new -mpower8-vector switch, and the feature causes the __POWER8_VECTOR__ builtin define to be generated by the preprocessor. There is a companion patch for llvm being committed at the same time. llvm-svn: 219502
2014-10-10 23:09:43 +08:00
//
[Power9] Builtins for ELF v.2 ABI conformance - front end portion This patch corresponds to review: https://reviews.llvm.org/D24397 It adds the __POWER9_VECTOR__ macro and the -mpower9-vector option along with a number of altivec.h functions (refer to the code review for a list). llvm-svn: 282481
2016-09-27 18:45:22 +08:00
// RUN: %clang -mpower9-vector -E -dM %s -o - 2>&1 \
// RUN: -target powerpc64-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PPC_POWER9_VECTOR_M64
//
// CHECK_PPC_POWER9_VECTOR_M64: #define __POWER9_VECTOR__ 1
//
Add Clang support for PPC cryptography builtins Review: http://reviews.llvm.org/D7951 llvm-svn: 231291
2015-03-05 05:48:22 +08:00
// RUN: %clang -mcrypto -E -dM %s -o - 2>&1 \
// RUN: -target powerpc64-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PPC_CRYPTO_M64
Add Clang support for PPC cryptography builtins Review: http://reviews.llvm.org/D7951 llvm-svn: 231291
2015-03-05 05:48:22 +08:00
//
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// CHECK_PPC_CRYPTO_M64: #define __CRYPTO__ 1
Add Clang support for PPC cryptography builtins Review: http://reviews.llvm.org/D7951 llvm-svn: 231291
2015-03-05 05:48:22 +08:00
//
[PowerPC] Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_* macros on all PPC cores We support all __sync_val_compare_and_swap_* builtins (only 64-bit on 64-bit targets) on all cores, and should define the corresponding __GCC_HAVE_SYNC_COMPARE_AND_SWAP_* macros, just as GCC does. As it turns out, this is really important because they're needed to prevent a bad ODR violation with libstdc++'s std::shared_ptr (this is well explained in PR12730). We were doing this only for P8, but this is necessary on all PPC systems. llvm-svn: 249009
2015-10-01 21:39:49 +08:00
// RUN: %clang -mcpu=ppc64 -E -dM %s -o - 2>&1 \
// RUN: -target powerpc64-unknown-unknown \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PPC_GCC_ATOMICS
Testing for the fix for bug 23429. Follow-up to commit for revision 236848. Just a test case for the macro definition under the right CPU/Arch. One combination was actually missed in the initial fix: - powerpc64-unknown-unknown -mcpu=pwr8 (rather than -mcpu=power8). llvm-svn: 237386
2015-05-15 04:02:24 +08:00
// RUN: %clang -mcpu=pwr8 -E -dM %s -o - 2>&1 \
// RUN: -target powerpc64-unknown-unknown \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PPC_GCC_ATOMICS
Testing for the fix for bug 23429. Follow-up to commit for revision 236848. Just a test case for the macro definition under the right CPU/Arch. One combination was actually missed in the initial fix: - powerpc64-unknown-unknown -mcpu=pwr8 (rather than -mcpu=power8). llvm-svn: 237386
2015-05-15 04:02:24 +08:00
// RUN: %clang -E -dM %s -o - 2>&1 \
// RUN: -target powerpc64le-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PPC_GCC_ATOMICS
Testing for the fix for bug 23429. Follow-up to commit for revision 236848. Just a test case for the macro definition under the right CPU/Arch. One combination was actually missed in the initial fix: - powerpc64-unknown-unknown -mcpu=pwr8 (rather than -mcpu=power8). llvm-svn: 237386
2015-05-15 04:02:24 +08:00
//
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// CHECK_PPC_GCC_ATOMICS: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1
// CHECK_PPC_GCC_ATOMICS: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 1
// CHECK_PPC_GCC_ATOMICS: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1
// CHECK_PPC_GCC_ATOMICS: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8 1
Testing for the fix for bug 23429. Follow-up to commit for revision 236848. Just a test case for the macro definition under the right CPU/Arch. One combination was actually missed in the initial fix: - powerpc64-unknown-unknown -mcpu=pwr8 (rather than -mcpu=power8). llvm-svn: 237386
2015-05-15 04:02:24 +08:00
//
// End PPC/GCC/Linux tests ------------------
[SystemZ] Support transactional execution on zEC12 The zEC12 provides the transactional-execution facility. This is exposed to users via a set of builtin routines on other compilers. This patch adds clang support to enable those builtins. In partciular, the patch: - enables the transactional-execution feature by default on zEC12 - allows to override presence of that feature via the -mhtm/-mno-htm options - adds a predefined macro __HTM__ if the feature is enabled - adds support for the transactional-execution GCC builtins - adds Sema checking to verify the __builtin_tabort abort code - adds the s390intrin.h header file (for GCC compatibility) - adds s390 sections to the htmintrin.h and htmxlintrin.h header files Since this is first use of target-specific intrinsics on the platform, the patch creates the include/clang/Basic/BuiltinsSystemZ.def file and hooks it up in TargetBuiltins.h and lib/Basic/Targets.cpp. An associated LLVM patch adds the required LLVM IR intrinsics. For reference, the transactional-execution instructions are documented in the z/Architecture Principles of Operation for the zEC12: http://publibfp.boulder.ibm.com/cgi-bin/bookmgr/download/DZ9ZR009.pdf The associated builtins are documented in the GCC manual: http://gcc.gnu.org/onlinedocs/gcc/S_002f390-System-z-Built-in-Functions.html The htmxlintrin.h intrinsics provided for compatibility with the IBM XL compiler are documented in the "z/OS XL C/C++ Programming Guide". llvm-svn: 233804
2015-04-01 20:54:25 +08:00
[Sparc] Add support for 'sparcel' to clang. Differential Revision: http://reviews.llvm.org/D8784 llvm-svn: 237001
2015-05-11 23:21:44 +08:00
// Begin Sparc/GCC/Linux tests ----------------
//
// RUN: %clang -E -dM %s -o - 2>&1 \
// RUN: -target sparc-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_SPARC
Reorganise CPU handling for Sparc. When using -mcpu=v9 and co, __sparcv8 is not defined for 32bit mode, but __sparcv9 is. Pass down the correct -target-cpu flags to the backend, so that instruction restrictions are applied correctly. Pass down the correct -A flag when not using IAS. The latter is limited to NetBSD targets in this commit. llvm-svn: 252545
2015-11-10 07:39:45 +08:00
// RUN: %clang -mcpu=v9 -E -dM %s -o - 2>&1 \
// RUN: -target sparc-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_SPARC-V9
[Sparc] Add support for 'sparcel' to clang. Differential Revision: http://reviews.llvm.org/D8784 llvm-svn: 237001
2015-05-11 23:21:44 +08:00
//
// CHECK_SPARC: #define __BIG_ENDIAN__ 1
// CHECK_SPARC: #define __sparc 1
// CHECK_SPARC: #define __sparc__ 1
Reorganise CPU handling for Sparc. When using -mcpu=v9 and co, __sparcv8 is not defined for 32bit mode, but __sparcv9 is. Pass down the correct -target-cpu flags to the backend, so that instruction restrictions are applied correctly. Pass down the correct -A flag when not using IAS. The latter is limited to NetBSD targets in this commit. llvm-svn: 252545
2015-11-10 07:39:45 +08:00
// CHECK_SPARC-NOT: #define __sparcv9 1
Add the variant of __sparc_v9__ with five underscores, not just four. llvm-svn: 252640
2015-11-11 03:28:17 +08:00
// CHECK_SPARC-NOT: #define __sparcv9__ 1
[Sparc] Add support for 'sparcel' to clang. Differential Revision: http://reviews.llvm.org/D8784 llvm-svn: 237001
2015-05-11 23:21:44 +08:00
// CHECK_SPARC: #define __sparcv8 1
Reorganise CPU handling for Sparc. When using -mcpu=v9 and co, __sparcv8 is not defined for 32bit mode, but __sparcv9 is. Pass down the correct -target-cpu flags to the backend, so that instruction restrictions are applied correctly. Pass down the correct -A flag when not using IAS. The latter is limited to NetBSD targets in this commit. llvm-svn: 252545
2015-11-10 07:39:45 +08:00
// CHECK_SPARC-NOT: #define __sparcv9 1
Add the variant of __sparc_v9__ with five underscores, not just four. llvm-svn: 252640
2015-11-11 03:28:17 +08:00
// CHECK_SPARC-NOT: #define __sparcv9__ 1
Reorganise CPU handling for Sparc. When using -mcpu=v9 and co, __sparcv8 is not defined for 32bit mode, but __sparcv9 is. Pass down the correct -target-cpu flags to the backend, so that instruction restrictions are applied correctly. Pass down the correct -A flag when not using IAS. The latter is limited to NetBSD targets in this commit. llvm-svn: 252545
2015-11-10 07:39:45 +08:00
// CHECK_SPARC-V9-NOT: #define __sparcv8 1
Add the variant of __sparc_v9__ with five underscores, not just four. llvm-svn: 252640
2015-11-11 03:28:17 +08:00
// CHECK_SPARC-V9: #define __sparc_v9__ 1
Reorganise CPU handling for Sparc. When using -mcpu=v9 and co, __sparcv8 is not defined for 32bit mode, but __sparcv9 is. Pass down the correct -target-cpu flags to the backend, so that instruction restrictions are applied correctly. Pass down the correct -A flag when not using IAS. The latter is limited to NetBSD targets in this commit. llvm-svn: 252545
2015-11-10 07:39:45 +08:00
// CHECK_SPARC-V9: #define __sparcv9 1
// CHECK_SPARC-V9-NOT: #define __sparcv8 1
[Sparc] Add support for 'sparcel' to clang. Differential Revision: http://reviews.llvm.org/D8784 llvm-svn: 237001
2015-05-11 23:21:44 +08:00
//
// RUN: %clang -E -dM %s -o - 2>&1 \
// RUN: -target sparcel-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_SPARCEL
Myriad: define __myriad2 macro automatically llvm-svn: 263596
2016-03-16 06:34:02 +08:00
// RUN: %clang -E -dM %s -o - -target sparcel-myriad -mcpu=myriad2 2>&1 \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_MYRIAD2-1 -check-prefix=CHECK_SPARCEL
Myriad: define __myriad2 macro automatically llvm-svn: 263596
2016-03-16 06:34:02 +08:00
// RUN: %clang -E -dM %s -o - -target sparcel-myriad -mcpu=myriad2.1 2>&1 \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_MYRIAD2-1 -check-prefix=CHECK_SPARCEL
Myriad: define __myriad2 macro automatically llvm-svn: 263596
2016-03-16 06:34:02 +08:00
// RUN: %clang -E -dM %s -o - -target sparcel-myriad -mcpu=myriad2.2 2>&1 \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_MYRIAD2-2 -check-prefix=CHECK_SPARCEL
[Myriad]: better compatibility with vendor source - Accept ma{2100,2150,2150} for -mcpu - Define more preprocessor macros - Don't append "le/" to little-endian lib dirs llvm-svn: 276646
2016-07-26 00:36:02 +08:00
// RUN: %clang -E -dM %s -o - -target sparcel-myriad -mcpu=ma2450 2>&1 \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_MYRIAD2-2 -check-prefix=CHECK_SPARCEL
[Sparc] Add support for 'sparcel' to clang. Differential Revision: http://reviews.llvm.org/D8784 llvm-svn: 237001
2015-05-11 23:21:44 +08:00
// CHECK_SPARCEL: #define __LITTLE_ENDIAN__ 1
Myriad: define __myriad2 macro automatically llvm-svn: 263596
2016-03-16 06:34:02 +08:00
// CHECK_MYRIAD2-1: #define __myriad2 1
// CHECK_MYRIAD2-1: #define __myriad2__ 1
// CHECK_MYRIAD2-2: #define __myriad2 2
// CHECK_MYRIAD2-2: #define __myriad2__ 2
[Sparc] Add support for 'sparcel' to clang. Differential Revision: http://reviews.llvm.org/D8784 llvm-svn: 237001
2015-05-11 23:21:44 +08:00
// CHECK_SPARCEL: #define __sparc 1
// CHECK_SPARCEL: #define __sparc__ 1
[Myriad]: better compatibility with vendor source - Accept ma{2100,2150,2150} for -mcpu - Define more preprocessor macros - Don't append "le/" to little-endian lib dirs llvm-svn: 276646
2016-07-26 00:36:02 +08:00
// CHECK_MYRIAD2-1: #define __sparc_v8__ 1
[Sparc] Add support for 'sparcel' to clang. Differential Revision: http://reviews.llvm.org/D8784 llvm-svn: 237001
2015-05-11 23:21:44 +08:00
// CHECK_SPARCEL: #define __sparcv8 1
//
// RUN: %clang -E -dM %s -o - 2>&1 \
// RUN: -target sparcv9-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_SPARCV9
[Sparc] Add support for 'sparcel' to clang. Differential Revision: http://reviews.llvm.org/D8784 llvm-svn: 237001
2015-05-11 23:21:44 +08:00
//
// CHECK_SPARCV9: #define __BIG_ENDIAN__ 1
// CHECK_SPARCV9: #define __sparc 1
// CHECK_SPARCV9: #define __sparc64__ 1
// CHECK_SPARCV9: #define __sparc__ 1
// CHECK_SPARCV9: #define __sparc_v9__ 1
// CHECK_SPARCV9: #define __sparcv9 1
// CHECK_SPARCV9: #define __sparcv9__ 1
[SystemZ] Support transactional execution on zEC12 The zEC12 provides the transactional-execution facility. This is exposed to users via a set of builtin routines on other compilers. This patch adds clang support to enable those builtins. In partciular, the patch: - enables the transactional-execution feature by default on zEC12 - allows to override presence of that feature via the -mhtm/-mno-htm options - adds a predefined macro __HTM__ if the feature is enabled - adds support for the transactional-execution GCC builtins - adds Sema checking to verify the __builtin_tabort abort code - adds the s390intrin.h header file (for GCC compatibility) - adds s390 sections to the htmintrin.h and htmxlintrin.h header files Since this is first use of target-specific intrinsics on the platform, the patch creates the include/clang/Basic/BuiltinsSystemZ.def file and hooks it up in TargetBuiltins.h and lib/Basic/Targets.cpp. An associated LLVM patch adds the required LLVM IR intrinsics. For reference, the transactional-execution instructions are documented in the z/Architecture Principles of Operation for the zEC12: http://publibfp.boulder.ibm.com/cgi-bin/bookmgr/download/DZ9ZR009.pdf The associated builtins are documented in the GCC manual: http://gcc.gnu.org/onlinedocs/gcc/S_002f390-System-z-Built-in-Functions.html The htmxlintrin.h intrinsics provided for compatibility with the IBM XL compiler are documented in the "z/OS XL C/C++ Programming Guide". llvm-svn: 233804
2015-04-01 20:54:25 +08:00
// Begin SystemZ/GCC/Linux tests ----------------
//
// RUN: %clang -march=z10 -E -dM %s -o - 2>&1 \
// RUN: -target s390x-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_SYSTEMZ_Z10
[SystemZ] Support transactional execution on zEC12 The zEC12 provides the transactional-execution facility. This is exposed to users via a set of builtin routines on other compilers. This patch adds clang support to enable those builtins. In partciular, the patch: - enables the transactional-execution feature by default on zEC12 - allows to override presence of that feature via the -mhtm/-mno-htm options - adds a predefined macro __HTM__ if the feature is enabled - adds support for the transactional-execution GCC builtins - adds Sema checking to verify the __builtin_tabort abort code - adds the s390intrin.h header file (for GCC compatibility) - adds s390 sections to the htmintrin.h and htmxlintrin.h header files Since this is first use of target-specific intrinsics on the platform, the patch creates the include/clang/Basic/BuiltinsSystemZ.def file and hooks it up in TargetBuiltins.h and lib/Basic/Targets.cpp. An associated LLVM patch adds the required LLVM IR intrinsics. For reference, the transactional-execution instructions are documented in the z/Architecture Principles of Operation for the zEC12: http://publibfp.boulder.ibm.com/cgi-bin/bookmgr/download/DZ9ZR009.pdf The associated builtins are documented in the GCC manual: http://gcc.gnu.org/onlinedocs/gcc/S_002f390-System-z-Built-in-Functions.html The htmxlintrin.h intrinsics provided for compatibility with the IBM XL compiler are documented in the "z/OS XL C/C++ Programming Guide". llvm-svn: 233804
2015-04-01 20:54:25 +08:00
//
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// CHECK_SYSTEMZ_Z10: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1
// CHECK_SYSTEMZ_Z10: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 1
// CHECK_SYSTEMZ_Z10: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1
// CHECK_SYSTEMZ_Z10: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8 1
[SystemZ] Support transactional execution on zEC12 The zEC12 provides the transactional-execution facility. This is exposed to users via a set of builtin routines on other compilers. This patch adds clang support to enable those builtins. In partciular, the patch: - enables the transactional-execution feature by default on zEC12 - allows to override presence of that feature via the -mhtm/-mno-htm options - adds a predefined macro __HTM__ if the feature is enabled - adds support for the transactional-execution GCC builtins - adds Sema checking to verify the __builtin_tabort abort code - adds the s390intrin.h header file (for GCC compatibility) - adds s390 sections to the htmintrin.h and htmxlintrin.h header files Since this is first use of target-specific intrinsics on the platform, the patch creates the include/clang/Basic/BuiltinsSystemZ.def file and hooks it up in TargetBuiltins.h and lib/Basic/Targets.cpp. An associated LLVM patch adds the required LLVM IR intrinsics. For reference, the transactional-execution instructions are documented in the z/Architecture Principles of Operation for the zEC12: http://publibfp.boulder.ibm.com/cgi-bin/bookmgr/download/DZ9ZR009.pdf The associated builtins are documented in the GCC manual: http://gcc.gnu.org/onlinedocs/gcc/S_002f390-System-z-Built-in-Functions.html The htmxlintrin.h intrinsics provided for compatibility with the IBM XL compiler are documented in the "z/OS XL C/C++ Programming Guide". llvm-svn: 233804
2015-04-01 20:54:25 +08:00
// CHECK_SYSTEMZ_Z10: #define __LONG_DOUBLE_128__ 1
// CHECK_SYSTEMZ_Z10: #define __s390__ 1
// CHECK_SYSTEMZ_Z10: #define __s390x__ 1
// CHECK_SYSTEMZ_Z10: #define __zarch__ 1
//
// RUN: %clang -march=zEC12 -E -dM %s -o - 2>&1 \
// RUN: -target s390x-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_SYSTEMZ_ZEC12
[SystemZ] Add -march=archX aliases For compatibility with other compilers on the platform, allow specifying levels of the z/Architecture instead of model names with -march. In particular, the following aliases are now supported: -march=arch8 equals -march=z10 -march=arch9 equals -march=z196 -march=arch10 equals -march=zEC12 -march=arch11 equals -march=z13 This parallels the equivalent (and prerequisite) LLVM change in r285577. llvm-svn: 285578
2016-10-31 22:38:05 +08:00
// RUN: %clang -march=arch10 -E -dM %s -o - 2>&1 \
// RUN: -target s390x-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_SYSTEMZ_ZEC12
[SystemZ] Support transactional execution on zEC12 The zEC12 provides the transactional-execution facility. This is exposed to users via a set of builtin routines on other compilers. This patch adds clang support to enable those builtins. In partciular, the patch: - enables the transactional-execution feature by default on zEC12 - allows to override presence of that feature via the -mhtm/-mno-htm options - adds a predefined macro __HTM__ if the feature is enabled - adds support for the transactional-execution GCC builtins - adds Sema checking to verify the __builtin_tabort abort code - adds the s390intrin.h header file (for GCC compatibility) - adds s390 sections to the htmintrin.h and htmxlintrin.h header files Since this is first use of target-specific intrinsics on the platform, the patch creates the include/clang/Basic/BuiltinsSystemZ.def file and hooks it up in TargetBuiltins.h and lib/Basic/Targets.cpp. An associated LLVM patch adds the required LLVM IR intrinsics. For reference, the transactional-execution instructions are documented in the z/Architecture Principles of Operation for the zEC12: http://publibfp.boulder.ibm.com/cgi-bin/bookmgr/download/DZ9ZR009.pdf The associated builtins are documented in the GCC manual: http://gcc.gnu.org/onlinedocs/gcc/S_002f390-System-z-Built-in-Functions.html The htmxlintrin.h intrinsics provided for compatibility with the IBM XL compiler are documented in the "z/OS XL C/C++ Programming Guide". llvm-svn: 233804
2015-04-01 20:54:25 +08:00
//
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// CHECK_SYSTEMZ_ZEC12: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1
// CHECK_SYSTEMZ_ZEC12: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 1
// CHECK_SYSTEMZ_ZEC12: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1
// CHECK_SYSTEMZ_ZEC12: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8 1
[SystemZ] Support transactional execution on zEC12 The zEC12 provides the transactional-execution facility. This is exposed to users via a set of builtin routines on other compilers. This patch adds clang support to enable those builtins. In partciular, the patch: - enables the transactional-execution feature by default on zEC12 - allows to override presence of that feature via the -mhtm/-mno-htm options - adds a predefined macro __HTM__ if the feature is enabled - adds support for the transactional-execution GCC builtins - adds Sema checking to verify the __builtin_tabort abort code - adds the s390intrin.h header file (for GCC compatibility) - adds s390 sections to the htmintrin.h and htmxlintrin.h header files Since this is first use of target-specific intrinsics on the platform, the patch creates the include/clang/Basic/BuiltinsSystemZ.def file and hooks it up in TargetBuiltins.h and lib/Basic/Targets.cpp. An associated LLVM patch adds the required LLVM IR intrinsics. For reference, the transactional-execution instructions are documented in the z/Architecture Principles of Operation for the zEC12: http://publibfp.boulder.ibm.com/cgi-bin/bookmgr/download/DZ9ZR009.pdf The associated builtins are documented in the GCC manual: http://gcc.gnu.org/onlinedocs/gcc/S_002f390-System-z-Built-in-Functions.html The htmxlintrin.h intrinsics provided for compatibility with the IBM XL compiler are documented in the "z/OS XL C/C++ Programming Guide". llvm-svn: 233804
2015-04-01 20:54:25 +08:00
// CHECK_SYSTEMZ_ZEC12: #define __HTM__ 1
// CHECK_SYSTEMZ_ZEC12: #define __LONG_DOUBLE_128__ 1
// CHECK_SYSTEMZ_ZEC12: #define __s390__ 1
// CHECK_SYSTEMZ_ZEC12: #define __s390x__ 1
// CHECK_SYSTEMZ_ZEC12: #define __zarch__ 1
//
// RUN: %clang -mhtm -E -dM %s -o - 2>&1 \
// RUN: -target s390x-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_SYSTEMZ_HTM
[SystemZ] Support transactional execution on zEC12 The zEC12 provides the transactional-execution facility. This is exposed to users via a set of builtin routines on other compilers. This patch adds clang support to enable those builtins. In partciular, the patch: - enables the transactional-execution feature by default on zEC12 - allows to override presence of that feature via the -mhtm/-mno-htm options - adds a predefined macro __HTM__ if the feature is enabled - adds support for the transactional-execution GCC builtins - adds Sema checking to verify the __builtin_tabort abort code - adds the s390intrin.h header file (for GCC compatibility) - adds s390 sections to the htmintrin.h and htmxlintrin.h header files Since this is first use of target-specific intrinsics on the platform, the patch creates the include/clang/Basic/BuiltinsSystemZ.def file and hooks it up in TargetBuiltins.h and lib/Basic/Targets.cpp. An associated LLVM patch adds the required LLVM IR intrinsics. For reference, the transactional-execution instructions are documented in the z/Architecture Principles of Operation for the zEC12: http://publibfp.boulder.ibm.com/cgi-bin/bookmgr/download/DZ9ZR009.pdf The associated builtins are documented in the GCC manual: http://gcc.gnu.org/onlinedocs/gcc/S_002f390-System-z-Built-in-Functions.html The htmxlintrin.h intrinsics provided for compatibility with the IBM XL compiler are documented in the "z/OS XL C/C++ Programming Guide". llvm-svn: 233804
2015-04-01 20:54:25 +08:00
//
// CHECK_SYSTEMZ_HTM: #define __HTM__ 1
Add support for System z vector language extensions The z13 vector facility has an associated language extension, closely modeled on AltiVec/VSX. The main differences are: - vector long, vector float and vector pixel are not supported - vector long long and vector double are supported (like VSX) - comparison operators return a vector rather than a scalar integer - shift operators behave like the OpenCL shift operators - vector bool is only supported as argument to certain operators; some operators allow mixing a bool with a non-bool vector This patch adds clang support for the extension. It is closely modelled on the AltiVec support. Similarly to the -faltivec option, there's a new -fzvector option to enable the extensions (as well as an -mzvector alias for compatibility with GCC). There's also a separate LangOpt. The extension as implemented here is intended to be compatible with the -mzvector extension recently implemented by GCC. Based on a patch by Richard Sandiford. Differential Revision: http://reviews.llvm.org/D11001 llvm-svn: 243642
2015-07-30 22:08:36 +08:00
//
// RUN: %clang -fzvector -E -dM %s -o - 2>&1 \
// RUN: -target s390x-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_SYSTEMZ_ZVECTOR
Add support for System z vector language extensions The z13 vector facility has an associated language extension, closely modeled on AltiVec/VSX. The main differences are: - vector long, vector float and vector pixel are not supported - vector long long and vector double are supported (like VSX) - comparison operators return a vector rather than a scalar integer - shift operators behave like the OpenCL shift operators - vector bool is only supported as argument to certain operators; some operators allow mixing a bool with a non-bool vector This patch adds clang support for the extension. It is closely modelled on the AltiVec support. Similarly to the -faltivec option, there's a new -fzvector option to enable the extensions (as well as an -mzvector alias for compatibility with GCC). There's also a separate LangOpt. The extension as implemented here is intended to be compatible with the -mzvector extension recently implemented by GCC. Based on a patch by Richard Sandiford. Differential Revision: http://reviews.llvm.org/D11001 llvm-svn: 243642
2015-07-30 22:08:36 +08:00
// RUN: %clang -mzvector -E -dM %s -o - 2>&1 \
// RUN: -target s390x-unknown-linux \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_SYSTEMZ_ZVECTOR
Add support for System z vector language extensions The z13 vector facility has an associated language extension, closely modeled on AltiVec/VSX. The main differences are: - vector long, vector float and vector pixel are not supported - vector long long and vector double are supported (like VSX) - comparison operators return a vector rather than a scalar integer - shift operators behave like the OpenCL shift operators - vector bool is only supported as argument to certain operators; some operators allow mixing a bool with a non-bool vector This patch adds clang support for the extension. It is closely modelled on the AltiVec support. Similarly to the -faltivec option, there's a new -fzvector option to enable the extensions (as well as an -mzvector alias for compatibility with GCC). There's also a separate LangOpt. The extension as implemented here is intended to be compatible with the -mzvector extension recently implemented by GCC. Based on a patch by Richard Sandiford. Differential Revision: http://reviews.llvm.org/D11001 llvm-svn: 243642
2015-07-30 22:08:36 +08:00
//
// CHECK_SYSTEMZ_ZVECTOR: #define __VEC__ 10301
AMDGPU: Fix broken/confusing predefined macro amdgcn should not be defining __R600__ llvm-svn: 262124
2016-02-27 17:06:26 +08:00
// Begin amdgcn tests ----------------
//
// RUN: %clang -march=amdgcn -E -dM %s -o - 2>&1 \
// RUN: -target amdgcn-unknown-unknown \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_AMDGCN
AMDGPU: Fix broken/confusing predefined macro amdgcn should not be defining __R600__ llvm-svn: 262124
2016-02-27 17:06:26 +08:00
// CHECK_AMDGCN: #define __AMDGCN__ 1
// Begin r600 tests ----------------
//
// RUN: %clang -march=amdgcn -E -dM %s -o - 2>&1 \
// RUN: -target r600-unknown-unknown \
Clean up a couple more preprocessor tests to use match-full-lines. llvm-svn: 265187
2016-04-02 05:33:20 +08:00
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_R600
AMDGPU: Fix broken/confusing predefined macro amdgcn should not be defining __R600__ llvm-svn: 262124
2016-02-27 17:06:26 +08:00
// CHECK_R600: #define __R600__ 1