forked from OSchip/llvm-project
65 lines
1.9 KiB
LLVM
65 lines
1.9 KiB
LLVM
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; RUN: llc -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a9 -mattr=+neon,+neonfp -float-abi=hard < %s | FileCheck %s
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define <2 x float> @test_vmovs_via_vext_lane0to0(float %arg, <2 x float> %in) {
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; CHECK: test_vmovs_via_vext_lane0to0:
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%vec = insertelement <2 x float> %in, float %arg, i32 0
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%res = fadd <2 x float> %vec, %vec
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; CHECK: vext.32 d1, d1, d0, #1
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; CHECK: vext.32 d1, d1, d1, #1
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; CHECK: vadd.f32 {{d[0-9]+}}, d1, d1
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ret <2 x float> %res
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}
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define <2 x float> @test_vmovs_via_vext_lane0to1(float %arg, <2 x float> %in) {
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; CHECK: test_vmovs_via_vext_lane0to1:
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%vec = insertelement <2 x float> %in, float %arg, i32 1
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%res = fadd <2 x float> %vec, %vec
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; CHECK: vext.32 d1, d1, d1, #1
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; CHECK: vext.32 d1, d1, d0, #1
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; CHECK: vadd.f32 {{d[0-9]+}}, d1, d1
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ret <2 x float> %res
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}
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define <2 x float> @test_vmovs_via_vext_lane1to0(float, float %arg, <2 x float> %in) {
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; CHECK: test_vmovs_via_vext_lane1to0:
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%vec = insertelement <2 x float> %in, float %arg, i32 0
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%res = fadd <2 x float> %vec, %vec
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; CHECK: vext.32 d1, d1, d1, #1
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; CHECK: vext.32 d1, d0, d1, #1
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; CHECK: vadd.f32 {{d[0-9]+}}, d1, d1
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ret <2 x float> %res
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}
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define <2 x float> @test_vmovs_via_vext_lane1to1(float, float %arg, <2 x float> %in) {
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; CHECK: test_vmovs_via_vext_lane1to1:
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%vec = insertelement <2 x float> %in, float %arg, i32 1
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%res = fadd <2 x float> %vec, %vec
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; CHECK: vext.32 d1, d0, d1, #1
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; CHECK: vext.32 d1, d1, d1, #1
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; CHECK: vadd.f32 {{d[0-9]+}}, d1, d1
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ret <2 x float> %res
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}
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define float @test_vmovs_via_vdup(float, float %ret, float %lhs, float %rhs) {
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; CHECK: test_vmovs_via_vdup:
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; Do an operation (which will end up NEON because of +neonfp) to convince the
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; execution-domain pass that NEON is a good thing to use.
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%res = fadd float %ret, %ret
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; It makes sense for LLVM to do the addition in d0 here, because it's going
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; to be returned. This means it will want a "vmov s0, s1":
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; CHECK: vdup.32 d0, d0[1]
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ret float %res
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}
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