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llvm-project/llvm/test/Transforms/InstCombine/zext-bool-add-sub.ll

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[InstCombine] regenerate checks llvm-svn: 281247
2016-09-13 03:29:26 +08:00
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
Remove a instcombine transform that (no longer?) makes sense: // C - zext(bool) -> bool ? C - 1 : C if (ZExtInst *ZI = dyn_cast<ZExtInst>(Op1)) if (ZI->getSrcTy()->isIntegerTy(1)) return SelectInst::Create(ZI->getOperand(0), SubOne(C), C); This ends up forming sext i1 instructions that codegen to terrible code. e.g. int blah(_Bool x, _Bool y) { return (x - y) + 1; } => movzbl %dil, %eax movzbl %sil, %ecx shll $31, %ecx sarl $31, %ecx leal 1(%rax,%rcx), %eax ret Without the rule, llvm now generates: movzbl %sil, %ecx movzbl %dil, %eax incl %eax subl %ecx, %eax ret It also helps with ARM (and pretty much any target that doesn't have a sext i1 :-). The transformation was done as part of Eli's r75531. He has given the ok to remove it. rdar://11748024 llvm-svn: 159230
2012-06-27 06:03:13 +08:00
; RUN: opt < %s -instcombine -S | FileCheck %s
[InstCombine] add test for PR30327 llvm-svn: 281248
2016-09-13 03:50:08 +08:00
Remove a instcombine transform that (no longer?) makes sense: // C - zext(bool) -> bool ? C - 1 : C if (ZExtInst *ZI = dyn_cast<ZExtInst>(Op1)) if (ZI->getSrcTy()->isIntegerTy(1)) return SelectInst::Create(ZI->getOperand(0), SubOne(C), C); This ends up forming sext i1 instructions that codegen to terrible code. e.g. int blah(_Bool x, _Bool y) { return (x - y) + 1; } => movzbl %dil, %eax movzbl %sil, %ecx shll $31, %ecx sarl $31, %ecx leal 1(%rax,%rcx), %eax ret Without the rule, llvm now generates: movzbl %sil, %ecx movzbl %dil, %eax incl %eax subl %ecx, %eax ret It also helps with ARM (and pretty much any target that doesn't have a sext i1 :-). The transformation was done as part of Eli's r75531. He has given the ok to remove it. rdar://11748024 llvm-svn: 159230
2012-06-27 06:03:13 +08:00
; rdar://11748024
Canonicalize boolean +/- a constant to a select. (I think it's reasonably clear that we want to have a canonical form for constructs like this; if anyone thinks that a select is not the best canonical form, please tell me.) llvm-svn: 75531
2009-07-14 06:27:52 +08:00
Remove a instcombine transform that (no longer?) makes sense: // C - zext(bool) -> bool ? C - 1 : C if (ZExtInst *ZI = dyn_cast<ZExtInst>(Op1)) if (ZI->getSrcTy()->isIntegerTy(1)) return SelectInst::Create(ZI->getOperand(0), SubOne(C), C); This ends up forming sext i1 instructions that codegen to terrible code. e.g. int blah(_Bool x, _Bool y) { return (x - y) + 1; } => movzbl %dil, %eax movzbl %sil, %ecx shll $31, %ecx sarl $31, %ecx leal 1(%rax,%rcx), %eax ret Without the rule, llvm now generates: movzbl %sil, %ecx movzbl %dil, %eax incl %eax subl %ecx, %eax ret It also helps with ARM (and pretty much any target that doesn't have a sext i1 :-). The transformation was done as part of Eli's r75531. He has given the ok to remove it. rdar://11748024 llvm-svn: 159230
2012-06-27 06:03:13 +08:00
define i32 @a(i1 zeroext %x, i1 zeroext %y) {
Update Transforms tests to use CHECK-LABEL for easier debugging. No functionality change. This update was done with the following bash script: find test/Transforms -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_]*\):\( *\)@$FUNC\([( ]*\)\$/;\1\2-LABEL:\3@$FUNC(/g" $TEMP done mv $TEMP $NAME fi done llvm-svn: 186268
2013-07-14 09:42:54 +08:00
; CHECK-LABEL: @a(
[InstCombine] move/add tests for sub with bool op; NFC llvm-svn: 333012
2018-05-23 02:50:06 +08:00
; CHECK-NEXT: [[CONV3_NEG:%.*]] = sext i1 [[Y:%.*]] to i32
; CHECK-NEXT: [[SUB:%.*]] = select i1 [[X:%.*]], i32 2, i32 1
[InstCombine] regenerate checks llvm-svn: 281247
2016-09-13 03:29:26 +08:00
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], [[CONV3_NEG]]
; CHECK-NEXT: ret i32 [[ADD]]
;
Remove a instcombine transform that (no longer?) makes sense: // C - zext(bool) -> bool ? C - 1 : C if (ZExtInst *ZI = dyn_cast<ZExtInst>(Op1)) if (ZI->getSrcTy()->isIntegerTy(1)) return SelectInst::Create(ZI->getOperand(0), SubOne(C), C); This ends up forming sext i1 instructions that codegen to terrible code. e.g. int blah(_Bool x, _Bool y) { return (x - y) + 1; } => movzbl %dil, %eax movzbl %sil, %ecx shll $31, %ecx sarl $31, %ecx leal 1(%rax,%rcx), %eax ret Without the rule, llvm now generates: movzbl %sil, %ecx movzbl %dil, %eax incl %eax subl %ecx, %eax ret It also helps with ARM (and pretty much any target that doesn't have a sext i1 :-). The transformation was done as part of Eli's r75531. He has given the ok to remove it. rdar://11748024 llvm-svn: 159230
2012-06-27 06:03:13 +08:00
%conv = zext i1 %x to i32
%conv3 = zext i1 %y to i32
%conv3.neg = sub i32 0, %conv3
%sub = add i32 %conv, 1
%add = add i32 %sub, %conv3.neg
ret i32 %add
Canonicalize boolean +/- a constant to a select. (I think it's reasonably clear that we want to have a canonical form for constructs like this; if anyone thinks that a select is not the best canonical form, please tell me.) llvm-svn: 75531
2009-07-14 06:27:52 +08:00
}
[InstCombine] regenerate checks llvm-svn: 281247
2016-09-13 03:29:26 +08:00
add more tests for PR30273 llvm-svn: 281270
2016-09-13 06:28:29 +08:00
define i32 @PR30273_select(i1 %a, i1 %b) {
; CHECK-LABEL: @PR30273_select(
[InstCombine] move/add tests for sub with bool op; NFC llvm-svn: 333012
2018-05-23 02:50:06 +08:00
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[A:%.*]] to i32
; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[A]], i32 2, i32 1
; CHECK-NEXT: [[SEL2:%.*]] = select i1 [[B:%.*]], i32 [[SEL1]], i32 [[ZEXT]]
[InstCombine] add test for PR30327 llvm-svn: 281248
2016-09-13 03:50:08 +08:00
; CHECK-NEXT: ret i32 [[SEL2]]
;
%zext = zext i1 %a to i32
%sel1 = select i1 %a, i32 2, i32 1
%sel2 = select i1 %b, i32 %sel1, i32 %zext
ret i32 %sel2
}
add more tests for PR30273 llvm-svn: 281270
2016-09-13 06:28:29 +08:00
define i32 @PR30273_zext_add(i1 %a, i1 %b) {
; CHECK-LABEL: @PR30273_zext_add(
[InstCombine] move/add tests for sub with bool op; NFC llvm-svn: 333012
2018-05-23 02:50:06 +08:00
; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[A:%.*]] to i32
; CHECK-NEXT: [[CONV3:%.*]] = zext i1 [[B:%.*]] to i32
add more tests for PR30273 llvm-svn: 281270
2016-09-13 06:28:29 +08:00
; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[CONV3]], [[CONV]]
; CHECK-NEXT: ret i32 [[ADD]]
;
%conv = zext i1 %a to i32
%conv3 = zext i1 %b to i32
%add = add nuw nsw i32 %conv3, %conv
ret i32 %add
}
define i32 @PR30273_three_bools(i1 %x, i1 %y, i1 %z) {
; CHECK-LABEL: @PR30273_three_bools(
[InstCombine] move/add tests for sub with bool op; NFC llvm-svn: 333012
2018-05-23 02:50:06 +08:00
; CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[X:%.*]] to i32
; CHECK-NEXT: [[ADD1:%.*]] = select i1 [[X]], i32 2, i32 1
; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[Y:%.*]], i32 [[ADD1]], i32 [[FROMBOOL]]
; CHECK-NEXT: [[ADD2:%.*]] = zext i1 [[Z:%.*]] to i32
add more tests for PR30273 llvm-svn: 281270
2016-09-13 06:28:29 +08:00
; CHECK-NEXT: [[SEL2:%.*]] = add nuw nsw i32 [[SEL1]], [[ADD2]]
; CHECK-NEXT: ret i32 [[SEL2]]
;
%frombool = zext i1 %x to i32
%add1 = add nsw i32 %frombool, 1
%sel1 = select i1 %y, i32 %add1, i32 %frombool
%add2 = add nsw i32 %sel1, 1
%sel2 = select i1 %z, i32 %add2, i32 %sel1
ret i32 %sel2
}
[InstCombine] add tests for boolean extend + add; NFC llvm-svn: 315681
2017-10-13 22:09:45 +08:00
define i32 @zext_add_scalar(i1 %x) {
; CHECK-LABEL: @zext_add_scalar(
[InstCombine] move/add tests for sub with bool op; NFC llvm-svn: 333012
2018-05-23 02:50:06 +08:00
; CHECK-NEXT: [[ADD:%.*]] = select i1 [[X:%.*]], i32 43, i32 42
[InstCombine] add tests for boolean extend + add; NFC llvm-svn: 315681
2017-10-13 22:09:45 +08:00
; CHECK-NEXT: ret i32 [[ADD]]
;
%zext = zext i1 %x to i32
%add = add i32 %zext, 42
ret i32 %add
}
define <2 x i32> @zext_add_vec_splat(<2 x i1> %x) {
; CHECK-LABEL: @zext_add_vec_splat(
[InstCombine] move/add tests for sub with bool op; NFC llvm-svn: 333012
2018-05-23 02:50:06 +08:00
; CHECK-NEXT: [[ADD:%.*]] = select <2 x i1> [[X:%.*]], <2 x i32> <i32 43, i32 43>, <2 x i32> <i32 42, i32 42>
[InstCombine] add tests for boolean extend + add; NFC llvm-svn: 315681
2017-10-13 22:09:45 +08:00
; CHECK-NEXT: ret <2 x i32> [[ADD]]
;
%zext = zext <2 x i1> %x to <2 x i32>
%add = add <2 x i32> %zext, <i32 42, i32 42>
ret <2 x i32> %add
}
define <2 x i32> @zext_add_vec(<2 x i1> %x) {
; CHECK-LABEL: @zext_add_vec(
[InstCombine] move/add tests for sub with bool op; NFC llvm-svn: 333012
2018-05-23 02:50:06 +08:00
; CHECK-NEXT: [[ADD:%.*]] = select <2 x i1> [[X:%.*]], <2 x i32> <i32 43, i32 24>, <2 x i32> <i32 42, i32 23>
[InstCombine] add tests for boolean extend + add; NFC llvm-svn: 315681
2017-10-13 22:09:45 +08:00
; CHECK-NEXT: ret <2 x i32> [[ADD]]
;
%zext = zext <2 x i1> %x to <2 x i32>
%add = add <2 x i32> %zext, <i32 42, i32 23>
ret <2 x i32> %add
}
[InstCombine] move/add tests for sub with bool op; NFC llvm-svn: 333012
2018-05-23 02:50:06 +08:00
declare void @use(i64)
define i64 @zext_negate(i1 %A) {
; CHECK-LABEL: @zext_negate(
; CHECK-NEXT: [[SUB:%.*]] = sext i1 [[A:%.*]] to i64
; CHECK-NEXT: ret i64 [[SUB]]
;
%ext = zext i1 %A to i64
%sub = sub i64 0, %ext
ret i64 %sub
}
define i64 @zext_negate_extra_use(i1 %A) {
; CHECK-LABEL: @zext_negate_extra_use(
; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[A:%.*]] to i64
; CHECK-NEXT: [[SUB:%.*]] = sext i1 [[A]] to i64
; CHECK-NEXT: call void @use(i64 [[EXT]])
; CHECK-NEXT: ret i64 [[SUB]]
;
%ext = zext i1 %A to i64
%sub = sub i64 0, %ext
call void @use(i64 %ext)
ret i64 %sub
}
define <2 x i64> @zext_negate_vec(<2 x i1> %A) {
; CHECK-LABEL: @zext_negate_vec(
; CHECK-NEXT: [[SUB:%.*]] = sext <2 x i1> [[A:%.*]] to <2 x i64>
; CHECK-NEXT: ret <2 x i64> [[SUB]]
;
%ext = zext <2 x i1> %A to <2 x i64>
%sub = sub <2 x i64> zeroinitializer, %ext
ret <2 x i64> %sub
}
define <2 x i64> @zext_negate_vec_undef_elt(<2 x i1> %A) {
; CHECK-LABEL: @zext_negate_vec_undef_elt(
; CHECK-NEXT: [[SUB:%.*]] = sext <2 x i1> [[A:%.*]] to <2 x i64>
; CHECK-NEXT: ret <2 x i64> [[SUB]]
;
%ext = zext <2 x i1> %A to <2 x i64>
%sub = sub <2 x i64> <i64 0, i64 undef>, %ext
ret <2 x i64> %sub
}
define i64 @zext_sub_const(i1 %A) {
; CHECK-LABEL: @zext_sub_const(
; CHECK-NEXT: [[SUB:%.*]] = select i1 [[A:%.*]], i64 41, i64 42
; CHECK-NEXT: ret i64 [[SUB]]
;
%ext = zext i1 %A to i64
%sub = sub i64 42, %ext
ret i64 %sub
}
define i64 @zext_sub_const_extra_use(i1 %A) {
; CHECK-LABEL: @zext_sub_const_extra_use(
; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[A:%.*]] to i64
; CHECK-NEXT: [[SUB:%.*]] = select i1 [[A]], i64 41, i64 42
; CHECK-NEXT: call void @use(i64 [[EXT]])
; CHECK-NEXT: ret i64 [[SUB]]
;
%ext = zext i1 %A to i64
%sub = sub i64 42, %ext
call void @use(i64 %ext)
ret i64 %sub
}
define <2 x i64> @zext_sub_const_vec(<2 x i1> %A) {
; CHECK-LABEL: @zext_sub_const_vec(
; CHECK-NEXT: [[SUB:%.*]] = select <2 x i1> [[A:%.*]], <2 x i64> <i64 41, i64 2>, <2 x i64> <i64 42, i64 3>
; CHECK-NEXT: ret <2 x i64> [[SUB]]
;
%ext = zext <2 x i1> %A to <2 x i64>
%sub = sub <2 x i64> <i64 42, i64 3>, %ext
ret <2 x i64> %sub
}
define <2 x i64> @zext_sub_const_vec_undef_elt(<2 x i1> %A) {
; CHECK-LABEL: @zext_sub_const_vec_undef_elt(
; CHECK-NEXT: [[SUB:%.*]] = select <2 x i1> [[A:%.*]], <2 x i64> <i64 41, i64 undef>, <2 x i64> <i64 42, i64 undef>
; CHECK-NEXT: ret <2 x i64> [[SUB]]
;
%ext = zext <2 x i1> %A to <2 x i64>
%sub = sub <2 x i64> <i64 42, i64 undef>, %ext
ret <2 x i64> %sub
}
define i64 @sext_negate(i1 %A) {
; CHECK-LABEL: @sext_negate(
; CHECK-NEXT: [[SUB:%.*]] = zext i1 [[A:%.*]] to i64
; CHECK-NEXT: ret i64 [[SUB]]
;
%ext = sext i1 %A to i64
%sub = sub i64 0, %ext
ret i64 %sub
}
define i64 @sext_negate_extra_use(i1 %A) {
; CHECK-LABEL: @sext_negate_extra_use(
; CHECK-NEXT: [[EXT:%.*]] = sext i1 [[A:%.*]] to i64
; CHECK-NEXT: [[SUB:%.*]] = zext i1 [[A]] to i64
; CHECK-NEXT: call void @use(i64 [[EXT]])
; CHECK-NEXT: ret i64 [[SUB]]
;
%ext = sext i1 %A to i64
%sub = sub i64 0, %ext
call void @use(i64 %ext)
ret i64 %sub
}
define <2 x i64> @sext_negate_vec(<2 x i1> %A) {
; CHECK-LABEL: @sext_negate_vec(
; CHECK-NEXT: [[SUB:%.*]] = zext <2 x i1> [[A:%.*]] to <2 x i64>
; CHECK-NEXT: ret <2 x i64> [[SUB]]
;
%ext = sext <2 x i1> %A to <2 x i64>
%sub = sub <2 x i64> zeroinitializer, %ext
ret <2 x i64> %sub
}
define <2 x i64> @sext_negate_vec_undef_elt(<2 x i1> %A) {
; CHECK-LABEL: @sext_negate_vec_undef_elt(
[InstCombine] improve sub with bool folds There's a patchwork of existing transforms trying to handle these cases, but as seen in the changed test, we weren't catching them all. llvm-svn: 333845
2018-06-04 00:35:26 +08:00
; CHECK-NEXT: [[SUB:%.*]] = zext <2 x i1> [[A:%.*]] to <2 x i64>
; CHECK-NEXT: ret <2 x i64> [[SUB]]
[InstCombine] move/add tests for sub with bool op; NFC llvm-svn: 333012
2018-05-23 02:50:06 +08:00
;
%ext = sext <2 x i1> %A to <2 x i64>
%sub = sub <2 x i64> <i64 0, i64 undef>, %ext
ret <2 x i64> %sub
}
define i64 @sext_sub_const(i1 %A) {
; CHECK-LABEL: @sext_sub_const(
; CHECK-NEXT: [[SUB:%.*]] = select i1 [[A:%.*]], i64 43, i64 42
; CHECK-NEXT: ret i64 [[SUB]]
;
%ext = sext i1 %A to i64
%sub = sub i64 42, %ext
ret i64 %sub
}
define i64 @sext_sub_const_extra_use(i1 %A) {
; CHECK-LABEL: @sext_sub_const_extra_use(
; CHECK-NEXT: [[EXT:%.*]] = sext i1 [[A:%.*]] to i64
[InstCombine] improve sub with bool folds There's a patchwork of existing transforms trying to handle these cases, but as seen in the changed test, we weren't catching them all. llvm-svn: 333845
2018-06-04 00:35:26 +08:00
; CHECK-NEXT: [[SUB:%.*]] = select i1 [[A]], i64 43, i64 42
[InstCombine] move/add tests for sub with bool op; NFC llvm-svn: 333012
2018-05-23 02:50:06 +08:00
; CHECK-NEXT: call void @use(i64 [[EXT]])
; CHECK-NEXT: ret i64 [[SUB]]
;
%ext = sext i1 %A to i64
%sub = sub i64 42, %ext
call void @use(i64 %ext)
ret i64 %sub
}
define <2 x i64> @sext_sub_const_vec(<2 x i1> %A) {
; CHECK-LABEL: @sext_sub_const_vec(
; CHECK-NEXT: [[SUB:%.*]] = select <2 x i1> [[A:%.*]], <2 x i64> <i64 43, i64 4>, <2 x i64> <i64 42, i64 3>
; CHECK-NEXT: ret <2 x i64> [[SUB]]
;
%ext = sext <2 x i1> %A to <2 x i64>
%sub = sub <2 x i64> <i64 42, i64 3>, %ext
ret <2 x i64> %sub
}
define <2 x i64> @sext_sub_const_vec_undef_elt(<2 x i1> %A) {
; CHECK-LABEL: @sext_sub_const_vec_undef_elt(
; CHECK-NEXT: [[SUB:%.*]] = select <2 x i1> [[A:%.*]], <2 x i64> <i64 undef, i64 43>, <2 x i64> <i64 undef, i64 42>
; CHECK-NEXT: ret <2 x i64> [[SUB]]
;
%ext = sext <2 x i1> %A to <2 x i64>
%sub = sub <2 x i64> <i64 undef, i64 42>, %ext
ret <2 x i64> %sub
}
define i8 @sext_sub(i8 %x, i1 %y) {
; CHECK-LABEL: @sext_sub(
; CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[Y:%.*]] to i8
; CHECK-NEXT: [[SUB:%.*]] = add i8 [[TMP1]], [[X:%.*]]
; CHECK-NEXT: ret i8 [[SUB]]
;
%sext = sext i1 %y to i8
%sub = sub i8 %x, %sext
ret i8 %sub
}
; Vectors get the same transform.
define <2 x i8> @sext_sub_vec(<2 x i8> %x, <2 x i1> %y) {
; CHECK-LABEL: @sext_sub_vec(
; CHECK-NEXT: [[TMP1:%.*]] = zext <2 x i1> [[Y:%.*]] to <2 x i8>
; CHECK-NEXT: [[SUB:%.*]] = add <2 x i8> [[TMP1]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i8> [[SUB]]
;
%sext = sext <2 x i1> %y to <2 x i8>
%sub = sub <2 x i8> %x, %sext
ret <2 x i8> %sub
}
; NSW is preserved.
define <2 x i8> @sext_sub_vec_nsw(<2 x i8> %x, <2 x i1> %y) {
; CHECK-LABEL: @sext_sub_vec_nsw(
; CHECK-NEXT: [[TMP1:%.*]] = zext <2 x i1> [[Y:%.*]] to <2 x i8>
; CHECK-NEXT: [[SUB:%.*]] = add nsw <2 x i8> [[TMP1]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i8> [[SUB]]
;
%sext = sext <2 x i1> %y to <2 x i8>
%sub = sub nsw <2 x i8> %x, %sext
ret <2 x i8> %sub
}
; We favor the canonical zext+add over keeping the NUW.
define i8 @sext_sub_nuw(i8 %x, i1 %y) {
; CHECK-LABEL: @sext_sub_nuw(
; CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[Y:%.*]] to i8
; CHECK-NEXT: [[SUB:%.*]] = add i8 [[TMP1]], [[X:%.*]]
; CHECK-NEXT: ret i8 [[SUB]]
;
%sext = sext i1 %y to i8
%sub = sub nuw i8 %x, %sext
ret i8 %sub
}