[codeview] Implement FPO data assembler directives
Summary:
This adds a set of new directives that describe 32-bit x86 prologues.
The directives are limited and do not expose the full complexity of
codeview FPO data. They are merely a convenience for the compiler to
generate more readable assembly so we don't need to generate tons of
labels in CodeGen. If our prologue emission changes in the future, we
can change the set of available directives to suit our needs. These are
modelled after the .seh_ directives, which use a different format that
interacts with exception handling.
The directives are:
.cv_fpo_proc _foo
.cv_fpo_pushreg ebp/ebx/etc
.cv_fpo_setframe ebp/esi/etc
.cv_fpo_stackalloc 200
.cv_fpo_endprologue
.cv_fpo_endproc
.cv_fpo_data _foo
I tried to follow the implementation of ARM EHABI CFI directives by
sinking most directives out of MCStreamer and into X86TargetStreamer.
This helps avoid polluting non-X86 code with WinCOFF specific logic.
I used cdb to confirm that this can show locals in parent CSRs in a few
cases, most importantly the one where we use ESI as a frame pointer,
i.e. the one in http://crbug.com/756153#c28
Once we have cdb integration in debuginfo-tests, we can add integration
tests there.
Reviewers: majnemer, hans
Subscribers: aemerson, mgorny, kristof.beyls, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D38776
llvm-svn: 315513
2017-10-12 05:24:33 +08:00
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# RUN: llvm-mc -filetype=asm < %s -triple i686-windows-msvc | FileCheck %s --check-prefix=ASM
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# RUN: llvm-mc -filetype=obj < %s -triple i686-windows-msvc | llvm-readobj -codeview | FileCheck %s --check-prefix=OBJ
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.globl _foo
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_foo:
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.cv_fpo_proc _foo 4
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pushl %ebp
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.cv_fpo_pushreg %ebp
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movl %ebp, %esp
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.cv_fpo_setframe %ebp
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pushl %ebx
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.cv_fpo_pushreg %ebx
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pushl %edi
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.cv_fpo_pushreg %edi
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pushl %esi
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.cv_fpo_pushreg esi
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subl $20, %esp
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.cv_fpo_stackalloc 20
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.cv_fpo_endprologue
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# ASM: .cv_fpo_proc _foo 4
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# ASM: pushl %ebp
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# ASM: .cv_fpo_pushreg %ebp
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# ASM: movl %ebp, %esp
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# ASM: .cv_fpo_setframe %ebp
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# ASM: pushl %ebx
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# ASM: .cv_fpo_pushreg %ebx
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# ASM: pushl %edi
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# ASM: .cv_fpo_pushreg %edi
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# ASM: pushl %esi
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# ASM: .cv_fpo_pushreg %esi
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# ASM: subl $20, %esp
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# ASM: .cv_fpo_stackalloc 20
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# ASM: .cv_fpo_endprologue
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# Clobbers
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xorl %ebx, %ebx
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xorl %edi, %edi
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xorl %esi, %esi
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# Use that stack memory
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leal 4(%esp), %eax
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movl %eax, (%esp)
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calll _bar
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# ASM: calll _bar
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# Epilogue
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# FIXME: Get FPO data for this once we get it for DWARF.
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addl $20, %esp
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popl %esi
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popl %edi
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popl %ebx
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popl %ebp
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retl
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.cv_fpo_endproc
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# ASM: .cv_fpo_endproc
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.section .debug$S,"dr"
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.p2align 2
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.long 4 # Debug section magic
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.cv_fpo_data _foo
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.cv_stringtable
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# ASM: .cv_fpo_data
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# OBJ: Subsection [
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# OBJ-NEXT: SubSectionType: FrameData (0xF5)
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# OBJ-NEXT: SubSectionSize:
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# OBJ-NEXT: LinkageName: _foo
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# OBJ-NEXT: FrameData {
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# OBJ-NEXT: RvaStart: 0x0
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# OBJ-NEXT: CodeSize: 0x23
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# OBJ-NEXT: LocalSize: 0x0
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# OBJ-NEXT: ParamsSize: 0x4
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# OBJ-NEXT: MaxStackSize: 0x0
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# OBJ-NEXT: PrologSize: 0x9
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# OBJ-NEXT: SavedRegsSize: 0x0
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# OBJ-NEXT: Flags [ (0x4)
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# OBJ-NEXT: IsFunctionStart (0x4)
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# OBJ-NEXT: ]
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2018-09-08 02:48:27 +08:00
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# OBJ-NEXT: FrameFunc [
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# OBJ-NEXT: $T0 .raSearch =
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# OBJ-NEXT: $eip $T0 ^ =
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# OBJ-NEXT: $esp $T0 4 + =
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# OBJ-NEXT: ]
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[codeview] Implement FPO data assembler directives
Summary:
This adds a set of new directives that describe 32-bit x86 prologues.
The directives are limited and do not expose the full complexity of
codeview FPO data. They are merely a convenience for the compiler to
generate more readable assembly so we don't need to generate tons of
labels in CodeGen. If our prologue emission changes in the future, we
can change the set of available directives to suit our needs. These are
modelled after the .seh_ directives, which use a different format that
interacts with exception handling.
The directives are:
.cv_fpo_proc _foo
.cv_fpo_pushreg ebp/ebx/etc
.cv_fpo_setframe ebp/esi/etc
.cv_fpo_stackalloc 200
.cv_fpo_endprologue
.cv_fpo_endproc
.cv_fpo_data _foo
I tried to follow the implementation of ARM EHABI CFI directives by
sinking most directives out of MCStreamer and into X86TargetStreamer.
This helps avoid polluting non-X86 code with WinCOFF specific logic.
I used cdb to confirm that this can show locals in parent CSRs in a few
cases, most importantly the one where we use ESI as a frame pointer,
i.e. the one in http://crbug.com/756153#c28
Once we have cdb integration in debuginfo-tests, we can add integration
tests there.
Reviewers: majnemer, hans
Subscribers: aemerson, mgorny, kristof.beyls, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D38776
llvm-svn: 315513
2017-10-12 05:24:33 +08:00
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# OBJ-NEXT: }
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# OBJ-NEXT: FrameData {
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# OBJ-NEXT: RvaStart: 0x1
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# OBJ-NEXT: CodeSize: 0x22
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# OBJ-NEXT: LocalSize: 0x0
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# OBJ-NEXT: ParamsSize: 0x4
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# OBJ-NEXT: MaxStackSize: 0x0
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# OBJ-NEXT: PrologSize: 0x8
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# OBJ-NEXT: SavedRegsSize: 0x4
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# OBJ-NEXT: Flags [ (0x0)
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# OBJ-NEXT: ]
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2018-09-08 02:48:27 +08:00
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# OBJ-NEXT: FrameFunc [
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# OBJ-NEXT: $T0 .raSearch =
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# OBJ-NEXT: $eip $T0 ^ =
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# OBJ-NEXT: $esp $T0 4 + =
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# OBJ-NEXT: $ebp $T0 4 - ^ =
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# OBJ-NEXT: ]
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[codeview] Implement FPO data assembler directives
Summary:
This adds a set of new directives that describe 32-bit x86 prologues.
The directives are limited and do not expose the full complexity of
codeview FPO data. They are merely a convenience for the compiler to
generate more readable assembly so we don't need to generate tons of
labels in CodeGen. If our prologue emission changes in the future, we
can change the set of available directives to suit our needs. These are
modelled after the .seh_ directives, which use a different format that
interacts with exception handling.
The directives are:
.cv_fpo_proc _foo
.cv_fpo_pushreg ebp/ebx/etc
.cv_fpo_setframe ebp/esi/etc
.cv_fpo_stackalloc 200
.cv_fpo_endprologue
.cv_fpo_endproc
.cv_fpo_data _foo
I tried to follow the implementation of ARM EHABI CFI directives by
sinking most directives out of MCStreamer and into X86TargetStreamer.
This helps avoid polluting non-X86 code with WinCOFF specific logic.
I used cdb to confirm that this can show locals in parent CSRs in a few
cases, most importantly the one where we use ESI as a frame pointer,
i.e. the one in http://crbug.com/756153#c28
Once we have cdb integration in debuginfo-tests, we can add integration
tests there.
Reviewers: majnemer, hans
Subscribers: aemerson, mgorny, kristof.beyls, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D38776
llvm-svn: 315513
2017-10-12 05:24:33 +08:00
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# OBJ-NEXT: }
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# OBJ-NEXT: FrameData {
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# OBJ-NEXT: RvaStart: 0x3
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# OBJ-NEXT: CodeSize: 0x20
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# OBJ-NEXT: LocalSize: 0x0
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# OBJ-NEXT: ParamsSize: 0x4
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# OBJ-NEXT: MaxStackSize: 0x0
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# OBJ-NEXT: PrologSize: 0x6
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# OBJ-NEXT: SavedRegsSize: 0x4
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# OBJ-NEXT: Flags [ (0x0)
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# OBJ-NEXT: ]
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2018-09-08 02:48:27 +08:00
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# OBJ-NEXT: FrameFunc [
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# OBJ-NEXT: $T0 $ebp 4 + =
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# OBJ-NEXT: $eip $T0 ^ =
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# OBJ-NEXT: $esp $T0 4 + =
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# OBJ-NEXT: $ebp $T0 4 - ^ =
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# OBJ-NEXT: ]
|
[codeview] Implement FPO data assembler directives
Summary:
This adds a set of new directives that describe 32-bit x86 prologues.
The directives are limited and do not expose the full complexity of
codeview FPO data. They are merely a convenience for the compiler to
generate more readable assembly so we don't need to generate tons of
labels in CodeGen. If our prologue emission changes in the future, we
can change the set of available directives to suit our needs. These are
modelled after the .seh_ directives, which use a different format that
interacts with exception handling.
The directives are:
.cv_fpo_proc _foo
.cv_fpo_pushreg ebp/ebx/etc
.cv_fpo_setframe ebp/esi/etc
.cv_fpo_stackalloc 200
.cv_fpo_endprologue
.cv_fpo_endproc
.cv_fpo_data _foo
I tried to follow the implementation of ARM EHABI CFI directives by
sinking most directives out of MCStreamer and into X86TargetStreamer.
This helps avoid polluting non-X86 code with WinCOFF specific logic.
I used cdb to confirm that this can show locals in parent CSRs in a few
cases, most importantly the one where we use ESI as a frame pointer,
i.e. the one in http://crbug.com/756153#c28
Once we have cdb integration in debuginfo-tests, we can add integration
tests there.
Reviewers: majnemer, hans
Subscribers: aemerson, mgorny, kristof.beyls, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D38776
llvm-svn: 315513
2017-10-12 05:24:33 +08:00
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# OBJ-NEXT: }
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# OBJ-NEXT: FrameData {
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# OBJ-NEXT: RvaStart: 0x4
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# OBJ-NEXT: CodeSize: 0x1F
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# OBJ-NEXT: LocalSize: 0x0
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# OBJ-NEXT: ParamsSize: 0x4
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# OBJ-NEXT: MaxStackSize: 0x0
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# OBJ-NEXT: PrologSize: 0x5
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# OBJ-NEXT: SavedRegsSize: 0x8
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# OBJ-NEXT: Flags [ (0x0)
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# OBJ-NEXT: ]
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2018-09-08 02:48:27 +08:00
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# OBJ-NEXT: FrameFunc [
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# OBJ-NEXT: $T0 $ebp 4 + =
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# OBJ-NEXT: $eip $T0 ^ =
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# OBJ-NEXT: $esp $T0 4 + =
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# OBJ-NEXT: $ebp $T0 4 - ^ =
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# OBJ-NEXT: $ebx $T0 8 - ^ =
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# OBJ-NEXT: ]
|
[codeview] Implement FPO data assembler directives
Summary:
This adds a set of new directives that describe 32-bit x86 prologues.
The directives are limited and do not expose the full complexity of
codeview FPO data. They are merely a convenience for the compiler to
generate more readable assembly so we don't need to generate tons of
labels in CodeGen. If our prologue emission changes in the future, we
can change the set of available directives to suit our needs. These are
modelled after the .seh_ directives, which use a different format that
interacts with exception handling.
The directives are:
.cv_fpo_proc _foo
.cv_fpo_pushreg ebp/ebx/etc
.cv_fpo_setframe ebp/esi/etc
.cv_fpo_stackalloc 200
.cv_fpo_endprologue
.cv_fpo_endproc
.cv_fpo_data _foo
I tried to follow the implementation of ARM EHABI CFI directives by
sinking most directives out of MCStreamer and into X86TargetStreamer.
This helps avoid polluting non-X86 code with WinCOFF specific logic.
I used cdb to confirm that this can show locals in parent CSRs in a few
cases, most importantly the one where we use ESI as a frame pointer,
i.e. the one in http://crbug.com/756153#c28
Once we have cdb integration in debuginfo-tests, we can add integration
tests there.
Reviewers: majnemer, hans
Subscribers: aemerson, mgorny, kristof.beyls, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D38776
llvm-svn: 315513
2017-10-12 05:24:33 +08:00
|
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|
# OBJ-NEXT: }
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# OBJ-NEXT: FrameData {
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# OBJ-NEXT: RvaStart: 0x5
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# OBJ-NEXT: CodeSize: 0x1E
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# OBJ-NEXT: LocalSize: 0x0
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# OBJ-NEXT: ParamsSize: 0x4
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# OBJ-NEXT: MaxStackSize: 0x0
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# OBJ-NEXT: PrologSize: 0x4
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# OBJ-NEXT: SavedRegsSize: 0xC
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# OBJ-NEXT: Flags [ (0x0)
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# OBJ-NEXT: ]
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2018-09-08 02:48:27 +08:00
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# OBJ-NEXT: FrameFunc [
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# OBJ-NEXT: $T0 $ebp 4 + =
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# OBJ-NEXT: $eip $T0 ^ =
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# OBJ-NEXT: $esp $T0 4 + =
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# OBJ-NEXT: $ebp $T0 4 - ^ =
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# OBJ-NEXT: $ebx $T0 8 - ^ =
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# OBJ-NEXT: $edi $T0 12 - ^ =
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|
# OBJ-NEXT: ]
|
[codeview] Implement FPO data assembler directives
Summary:
This adds a set of new directives that describe 32-bit x86 prologues.
The directives are limited and do not expose the full complexity of
codeview FPO data. They are merely a convenience for the compiler to
generate more readable assembly so we don't need to generate tons of
labels in CodeGen. If our prologue emission changes in the future, we
can change the set of available directives to suit our needs. These are
modelled after the .seh_ directives, which use a different format that
interacts with exception handling.
The directives are:
.cv_fpo_proc _foo
.cv_fpo_pushreg ebp/ebx/etc
.cv_fpo_setframe ebp/esi/etc
.cv_fpo_stackalloc 200
.cv_fpo_endprologue
.cv_fpo_endproc
.cv_fpo_data _foo
I tried to follow the implementation of ARM EHABI CFI directives by
sinking most directives out of MCStreamer and into X86TargetStreamer.
This helps avoid polluting non-X86 code with WinCOFF specific logic.
I used cdb to confirm that this can show locals in parent CSRs in a few
cases, most importantly the one where we use ESI as a frame pointer,
i.e. the one in http://crbug.com/756153#c28
Once we have cdb integration in debuginfo-tests, we can add integration
tests there.
Reviewers: majnemer, hans
Subscribers: aemerson, mgorny, kristof.beyls, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D38776
llvm-svn: 315513
2017-10-12 05:24:33 +08:00
|
|
|
# OBJ-NEXT: }
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# OBJ-NEXT: FrameData {
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# OBJ-NEXT: RvaStart: 0x6
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# OBJ-NEXT: CodeSize: 0x1D
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# OBJ-NEXT: LocalSize: 0x0
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# OBJ-NEXT: ParamsSize: 0x4
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# OBJ-NEXT: MaxStackSize: 0x0
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# OBJ-NEXT: PrologSize: 0x3
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# OBJ-NEXT: SavedRegsSize: 0x10
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# OBJ-NEXT: Flags [ (0x0)
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# OBJ-NEXT: ]
|
2018-09-08 02:48:27 +08:00
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# OBJ-NEXT: FrameFunc [
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# OBJ-NEXT: $T0 $ebp 4 + =
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# OBJ-NEXT: $eip $T0 ^ =
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# OBJ-NEXT: $esp $T0 4 + =
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# OBJ-NEXT: $ebp $T0 4 - ^ =
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# OBJ-NEXT: $ebx $T0 8 - ^ =
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# OBJ-NEXT: $edi $T0 12 - ^ =
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# OBJ-NEXT: $esi $T0 16 - ^ =
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|
|
|
|
# OBJ-NEXT: ]
|
[codeview] Implement FPO data assembler directives
Summary:
This adds a set of new directives that describe 32-bit x86 prologues.
The directives are limited and do not expose the full complexity of
codeview FPO data. They are merely a convenience for the compiler to
generate more readable assembly so we don't need to generate tons of
labels in CodeGen. If our prologue emission changes in the future, we
can change the set of available directives to suit our needs. These are
modelled after the .seh_ directives, which use a different format that
interacts with exception handling.
The directives are:
.cv_fpo_proc _foo
.cv_fpo_pushreg ebp/ebx/etc
.cv_fpo_setframe ebp/esi/etc
.cv_fpo_stackalloc 200
.cv_fpo_endprologue
.cv_fpo_endproc
.cv_fpo_data _foo
I tried to follow the implementation of ARM EHABI CFI directives by
sinking most directives out of MCStreamer and into X86TargetStreamer.
This helps avoid polluting non-X86 code with WinCOFF specific logic.
I used cdb to confirm that this can show locals in parent CSRs in a few
cases, most importantly the one where we use ESI as a frame pointer,
i.e. the one in http://crbug.com/756153#c28
Once we have cdb integration in debuginfo-tests, we can add integration
tests there.
Reviewers: majnemer, hans
Subscribers: aemerson, mgorny, kristof.beyls, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D38776
llvm-svn: 315513
2017-10-12 05:24:33 +08:00
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# OBJ-NEXT: }
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# OBJ-NOT: FrameData
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