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llvm-project/llvm/test/CodeGen/WebAssembly/irreducible-cfg.ll

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[WebAssembly] Added default stack-only instruction mode for MC. Summary: Made it convert from register to stack based instructions, and removed the registers. Fixes to related code that was expecting register based instructions. Added the correct testing flag to all tests, depending on what the format they were expecting so far. Translated one test to stack format as example: reg-stackify-stack.ll tested: llvm-lit -v `find test -name WebAssembly` unittests/MC/* Reviewers: dschuff, sunfish Subscribers: sbc100, jgravelle-google, eraman, aheejin, llvm-commits, jfb Differential Revision: https://reviews.llvm.org/D51241 llvm-svn: 340750
2018-08-27 23:45:51 +08:00
; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-block-placement -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
[WebAssembly] Implement irreducible control flow. This implements a very simple conservative transformation that doesn't require more than linear code size growth. There's room for much more optimization in this space. llvm-svn: 262982
2016-03-09 10:01:14 +08:00
; Test irreducible CFG handling.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
[WebAsembly] Update default triple in test files to wasm32-unknown-unkown. Summary: The final -wasm component has been the default for some time now. Subscribers: jfb, dschuff, jgravelle-google, eraman, aheejin, JDevlieghere, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D46342 llvm-svn: 332007
2018-05-11 01:49:11 +08:00
target triple = "wasm32-unknown-unknown"
[WebAssembly] Implement irreducible control flow. This implements a very simple conservative transformation that doesn't require more than linear code size growth. There's room for much more optimization in this space. llvm-svn: 262982
2016-03-09 10:01:14 +08:00
; A simple loop with two entries.
; CHECK-LABEL: test0:
[WebAssembly] Account for implicit operands when computing operand indices. llvm-svn: 267511
2016-04-26 09:40:56 +08:00
; CHECK: f64.load
; CHECK: i32.const $[[REG:[^,]+]]=, 0{{$}}
; CHECK: br_table $[[REG]],
[WebAssembly] Implement irreducible control flow. This implements a very simple conservative transformation that doesn't require more than linear code size growth. There's room for much more optimization in this space. llvm-svn: 262982
2016-03-09 10:01:14 +08:00
define void @test0(double* %arg, i32 %arg1, i32 %arg2, i32 %arg3) {
bb:
%tmp = icmp eq i32 %arg2, 0
br i1 %tmp, label %bb6, label %bb3
bb3:
%tmp4 = getelementptr double, double* %arg, i32 %arg3
%tmp5 = load double, double* %tmp4, align 4
br label %bb13
bb6:
%tmp7 = phi i32 [ %tmp18, %bb13 ], [ 0, %bb ]
%tmp8 = icmp slt i32 %tmp7, %arg1
br i1 %tmp8, label %bb9, label %bb19
bb9:
%tmp10 = getelementptr double, double* %arg, i32 %tmp7
%tmp11 = load double, double* %tmp10, align 4
%tmp12 = fmul double %tmp11, 2.300000e+00
store double %tmp12, double* %tmp10, align 4
br label %bb13
bb13:
%tmp14 = phi double [ %tmp5, %bb3 ], [ %tmp12, %bb9 ]
%tmp15 = phi i32 [ undef, %bb3 ], [ %tmp7, %bb9 ]
%tmp16 = getelementptr double, double* %arg, i32 %tmp15
%tmp17 = fadd double %tmp14, 1.300000e+00
store double %tmp17, double* %tmp16, align 4
%tmp18 = add nsw i32 %tmp15, 1
br label %bb6
bb19:
ret void
}
; A simple loop with two entries and an inner natural loop.
; CHECK-LABEL: test1:
[WebAssembly] Account for implicit operands when computing operand indices. llvm-svn: 267511
2016-04-26 09:40:56 +08:00
; CHECK: f64.load
; CHECK: i32.const $[[REG:[^,]+]]=, 0{{$}}
; CHECK: br_table $[[REG]],
[WebAssembly] Implement irreducible control flow. This implements a very simple conservative transformation that doesn't require more than linear code size growth. There's room for much more optimization in this space. llvm-svn: 262982
2016-03-09 10:01:14 +08:00
define void @test1(double* %arg, i32 %arg1, i32 %arg2, i32 %arg3) {
bb:
%tmp = icmp eq i32 %arg2, 0
br i1 %tmp, label %bb6, label %bb3
bb3:
%tmp4 = getelementptr double, double* %arg, i32 %arg3
%tmp5 = load double, double* %tmp4, align 4
br label %bb13
bb6:
%tmp7 = phi i32 [ %tmp18, %bb13 ], [ 0, %bb ]
%tmp8 = icmp slt i32 %tmp7, %arg1
br i1 %tmp8, label %bb9, label %bb19
bb9:
%tmp10 = getelementptr double, double* %arg, i32 %tmp7
%tmp11 = load double, double* %tmp10, align 4
%tmp12 = fmul double %tmp11, 2.300000e+00
store double %tmp12, double* %tmp10, align 4
br label %bb10
bb10:
%p = phi i32 [ 0, %bb9 ], [ %pn, %bb10 ]
%pn = add i32 %p, 1
%c = icmp slt i32 %pn, 256
br i1 %c, label %bb10, label %bb13
bb13:
%tmp14 = phi double [ %tmp5, %bb3 ], [ %tmp12, %bb10 ]
%tmp15 = phi i32 [ undef, %bb3 ], [ %tmp7, %bb10 ]
%tmp16 = getelementptr double, double* %arg, i32 %tmp15
%tmp17 = fadd double %tmp14, 1.300000e+00
store double %tmp17, double* %tmp16, align 4
%tmp18 = add nsw i32 %tmp15, 1
br label %bb6
bb19:
ret void
}