2013-08-28 18:02:29 +08:00
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; Test the MSA intrinsics that are encoded with the 3RF instruction format and
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; use the result as a third operand.
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[Mips][msa] Added the simple builtins (fadd to ftq)
Includes:
fadd, fceq, fcg[et], fclass, fcl[et], fcne, fcun, fdiv, fexdo, fexp2,
fexup[lr], ffint_[su], ffql, ffqr, fill, flog2, fmadd, fmax, fmax_a, fmin,
fmin_a, fmsub, fmul, frint, frcp, frsqrt, fseq, fsge, fsgt, fsle, fslt,
fsne, fsqr, fsub, ftint_s, ftq
Patch by Daniel Sanders
llvm-svn: 188458
2013-08-15 21:45:36 +08:00
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; RUN: llc -march=mips -mattr=+msa < %s | FileCheck %s
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@llvm_mips_fmadd_w_ARG1 = global <4 x float> <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, align 16
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@llvm_mips_fmadd_w_ARG2 = global <4 x float> <float 4.000000e+00, float 5.000000e+00, float 6.000000e+00, float 7.000000e+00>, align 16
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@llvm_mips_fmadd_w_ARG3 = global <4 x float> <float 8.000000e+00, float 9.000000e+00, float 1.000000e+01, float 1.100000e+01>, align 16
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@llvm_mips_fmadd_w_RES = global <4 x float> <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00>, align 16
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define void @llvm_mips_fmadd_w_test() nounwind {
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entry:
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%0 = load <4 x float>* @llvm_mips_fmadd_w_ARG1
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%1 = load <4 x float>* @llvm_mips_fmadd_w_ARG2
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%2 = load <4 x float>* @llvm_mips_fmadd_w_ARG3
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%3 = tail call <4 x float> @llvm.mips.fmadd.w(<4 x float> %0, <4 x float> %1, <4 x float> %2)
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store <4 x float> %3, <4 x float>* @llvm_mips_fmadd_w_RES
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ret void
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}
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declare <4 x float> @llvm.mips.fmadd.w(<4 x float>, <4 x float>, <4 x float>) nounwind
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; CHECK: llvm_mips_fmadd_w_test:
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; CHECK: ld.w
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; CHECK: ld.w
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; CHECK: ld.w
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; CHECK: fmadd.w
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; CHECK: st.w
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; CHECK: .size llvm_mips_fmadd_w_test
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;
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@llvm_mips_fmadd_d_ARG1 = global <2 x double> <double 0.000000e+00, double 1.000000e+00>, align 16
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@llvm_mips_fmadd_d_ARG2 = global <2 x double> <double 2.000000e+00, double 3.000000e+00>, align 16
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@llvm_mips_fmadd_d_ARG3 = global <2 x double> <double 4.000000e+00, double 5.000000e+00>, align 16
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@llvm_mips_fmadd_d_RES = global <2 x double> <double 0.000000e+00, double 0.000000e+00>, align 16
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define void @llvm_mips_fmadd_d_test() nounwind {
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entry:
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%0 = load <2 x double>* @llvm_mips_fmadd_d_ARG1
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%1 = load <2 x double>* @llvm_mips_fmadd_d_ARG2
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%2 = load <2 x double>* @llvm_mips_fmadd_d_ARG3
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%3 = tail call <2 x double> @llvm.mips.fmadd.d(<2 x double> %0, <2 x double> %1, <2 x double> %2)
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store <2 x double> %3, <2 x double>* @llvm_mips_fmadd_d_RES
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ret void
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}
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declare <2 x double> @llvm.mips.fmadd.d(<2 x double>, <2 x double>, <2 x double>) nounwind
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; CHECK: llvm_mips_fmadd_d_test:
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; CHECK: ld.d
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; CHECK: ld.d
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; CHECK: ld.d
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; CHECK: fmadd.d
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; CHECK: st.d
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; CHECK: .size llvm_mips_fmadd_d_test
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;
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@llvm_mips_fmsub_w_ARG1 = global <4 x float> <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, align 16
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@llvm_mips_fmsub_w_ARG2 = global <4 x float> <float 4.000000e+00, float 5.000000e+00, float 6.000000e+00, float 7.000000e+00>, align 16
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@llvm_mips_fmsub_w_ARG3 = global <4 x float> <float 8.000000e+00, float 9.000000e+00, float 1.000000e+01, float 1.100000e+01>, align 16
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@llvm_mips_fmsub_w_RES = global <4 x float> <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00>, align 16
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define void @llvm_mips_fmsub_w_test() nounwind {
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entry:
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%0 = load <4 x float>* @llvm_mips_fmsub_w_ARG1
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%1 = load <4 x float>* @llvm_mips_fmsub_w_ARG2
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%2 = load <4 x float>* @llvm_mips_fmsub_w_ARG3
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%3 = tail call <4 x float> @llvm.mips.fmsub.w(<4 x float> %0, <4 x float> %1, <4 x float> %2)
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store <4 x float> %3, <4 x float>* @llvm_mips_fmsub_w_RES
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ret void
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}
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declare <4 x float> @llvm.mips.fmsub.w(<4 x float>, <4 x float>, <4 x float>) nounwind
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; CHECK: llvm_mips_fmsub_w_test:
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; CHECK: ld.w
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; CHECK: ld.w
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; CHECK: ld.w
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; CHECK: fmsub.w
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; CHECK: st.w
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; CHECK: .size llvm_mips_fmsub_w_test
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;
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@llvm_mips_fmsub_d_ARG1 = global <2 x double> <double 0.000000e+00, double 1.000000e+00>, align 16
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@llvm_mips_fmsub_d_ARG2 = global <2 x double> <double 2.000000e+00, double 3.000000e+00>, align 16
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@llvm_mips_fmsub_d_ARG3 = global <2 x double> <double 4.000000e+00, double 5.000000e+00>, align 16
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@llvm_mips_fmsub_d_RES = global <2 x double> <double 0.000000e+00, double 0.000000e+00>, align 16
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define void @llvm_mips_fmsub_d_test() nounwind {
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entry:
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%0 = load <2 x double>* @llvm_mips_fmsub_d_ARG1
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%1 = load <2 x double>* @llvm_mips_fmsub_d_ARG2
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%2 = load <2 x double>* @llvm_mips_fmsub_d_ARG3
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%3 = tail call <2 x double> @llvm.mips.fmsub.d(<2 x double> %0, <2 x double> %1, <2 x double> %2)
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store <2 x double> %3, <2 x double>* @llvm_mips_fmsub_d_RES
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ret void
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}
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declare <2 x double> @llvm.mips.fmsub.d(<2 x double>, <2 x double>, <2 x double>) nounwind
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; CHECK: llvm_mips_fmsub_d_test:
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; CHECK: ld.d
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; CHECK: ld.d
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; CHECK: ld.d
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; CHECK: fmsub.d
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; CHECK: st.d
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; CHECK: .size llvm_mips_fmsub_d_test
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;
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