2017-02-07 07:18:57 +08:00
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# RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump -d - | FileCheck %s
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#
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# In packets with two extensions assembler is not extending both instructions
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#
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//['D_DUMMY,C4_or_or,L4_ploadrbtnew_abs,S2_storerfgp']
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{
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if (p3) r23 = memb(##2164335510)
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memh(##1696682668) = r28.h
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}
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# CHECK: { immext(#2164335488)
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# CHECK: if (p3) r23 = memb(##2164335510)
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# CHECK: immext(#1696682624)
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# CHECK: memh(##1696682668) = r28.h }
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//['D_DUMMY,C4_or_or,L4_ploadrbtnew_abs,S2_storerfgp']
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{
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if (p3.new) r23 = memb(##2164335510)
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p3 = or(p2,or(p3, p0))
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}
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2017-02-10 23:33:13 +08:00
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# CHECK: { p3 = or(p2,or(p3,p0))
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2017-02-07 07:18:57 +08:00
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# CHECK: immext(#2164335488)
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# CHECK: if (p3.new) r23 = memb(##2164335510) }
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# -------------------------- Non-extended cases:
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# -------------------------- Use GP and non GP notation
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R2 = memb(gp+#0x1000)
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# CHECK: { r2 = memb(gp+#4096) }
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R3 = memh(gp+#0x1000)
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# CHECK: { r3 = memh(gp+#4096) }
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r4 = memub(gp+#0x1000)
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# CHECK: { r4 = memub(gp+#4096) }
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r5 = memuh(gp+#0x1000)
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# CHECK: { r5 = memuh(gp+#4096) }
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r6 = memw(gp+#0x1000)
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# CHECK: { r6 = memw(gp+#4096) }
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R1:0 = memd(gp+#0x1000)
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# CHECK: { r1:0 = memd(gp+#4096) }
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{R25 = #1; memb(gp+#0x1000) = R25.new}
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# CHECK: { r25 = #1
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# CHECK-NEXT: memb(gp+#4096) = r25.new }
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{R26 = #1; memh(gp+#0x1000) = R26.new}
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# CHECK: { r26 = #1
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# CHECK-NEXT: memh(gp+#4096) = r26.new }
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{R27 = #1; memw(gp+#0x1000) = R27.new}
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# CHECK: { r27 = #1
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# CHECK-NEXT: memw(gp+#4096) = r27.new }
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memd(gp+#0x1000) = R1:0
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# CHECK: { memd(gp+#4096) = r1:0 }
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memb(gp+#0x1000) = R2
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# CHECK: { memb(gp+#4096) = r2 }
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memh(gp+#0x1000) = r3.h
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# CHECK: { memh(gp+#4096) = r3.h }
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memh(gp+#0x1000) = R4
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# CHECK: { memh(gp+#4096) = r4 }
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memw(gp+#0x1000) = R5
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# CHECK: { memw(gp+#4096) = r5 }
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# -------------------------- Extended cases:
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# -------------------------- Use GP and non GP notation
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R11:10 = memd(##0x1000)
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# CHECK: { immext(#4096)
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# CHECK-NEXT: r11:10 = memd(##4096) }
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R11 = memb(##0x1000)
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# CHECK: { immext(#4096)
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# CHECK-NEXT: r11 = memb(##4096) }
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R12 = memh(##0x1000)
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# CHECK: { immext(#4096)
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# CHECK-NEXT: r12 = memh(##4096) }
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r13 = memub(##0x1000)
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# CHECK: { immext(#4096)
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# CHECK-NEXT: r13 = memub(##4096) }
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r14 = memuh(##0x1000)
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# CHECK: { immext(#4096)
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# CHECK-NEXT: r14 = memuh(##4096) }
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r15 = memw(##0x1000)
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# CHECK: { immext(#4096)
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# CHECK-NEXT: r15 = memw(##4096) }
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{R22 = #1; memb(##0x1000) = R22.new}
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# CHECK: { r22 = #1
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# CHECK-NEXT: immext(#4096)
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# CHECK-NEXT: memb(##4096) = r22.new }
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{R23 = #1; memh(##0x1000) = R23.new}
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# CHECK: { r23 = #1
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# CHECK-NEXT: immext(#4096)
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# CHECK-NEXT: memh(##4096) = r23.new }
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{R24 = #1; memw(##0x1000) = R24.new}
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# CHECK: { r24 = #1
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# CHECK-NEXT: immext(#4096)
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# CHECK-NEXT: memw(##4096) = r24.new }
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memd(##0x1000) = R17:16
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# CHECK: { immext(#4096)
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# CHECK-NEXT: memd(##4096) = r17:16 }
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memb(##0x1000) = R18
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# CHECK: { immext(#4096)
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# CHECK-NEXT: memb(##4096) = r18 }
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memh(##0x1000) = r19.h
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# CHECK: { immext(#4096)
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# CHECK-NEXT: memh(##4096) = r19.h }
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memh(##0x1000) = R20
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# CHECK: { immext(#4096)
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# CHECK-NEXT: memh(##4096) = r20 }
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memw(##0x1000) = R21
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# CHECK: { immext(#4096)
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# CHECK-NEXT: memw(##4096) = r21 }
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