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llvm-project/polly/test/Isl/CodeGen/simple_non_single_entry.ll

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Rename IslCodeGeneration to CodeGeneration Besides class, function and file names, we also change the command line option from -polly-codegen-isl to just -polly-codegen. The isl postfix is a leftover from the times when we still had the CLooG based -polly-codegen. Today it is just redundant and we drop it. llvm-svn: 237099
2015-05-12 15:45:52 +08:00
; RUN: opt %loadPolly -polly-detect-unprofitable -polly-no-early-exit -polly-detect-scops-in-regions-without-loops -polly-codegen -analyze < %s | FileCheck %s
; RUN: opt %loadPolly -polly-detect-unprofitable -polly-no-early-exit -polly-detect-scops-in-regions-without-loops -polly-codegen -S < %s | FileCheck %s -check-prefix=CHECK-CODE
Support SCoPs with multiple entry edges. Regions that have multiple entry edges are very common. A simple if condition yields e.g. such a region: if / \ then else \ / for_region This for_region contains two entry edges 'then' -> 'for_region' and 'else' -> 'for_region'. Previously we scheduled the RegionSimplify pass to translate such regions into simple regions. With this patch, we now support them natively when the region is in -loop-simplify form, which means the entry block should not be a loop header. Contributed by: Star Tan <tanmx_star@yeah.net> llvm-svn: 179586
2013-04-16 16:04:42 +08:00
; void f(long A[], long N) {
; long i;
;
; if (true){
; i = 0;
; goto next;
; }else{
; i = 1;
; goto next;
; }
;
; next:
; if (true)
; goto for.i;
; else
; goto for.i;
;
; for.i:
; for (i = 0; i < N; ++i)
; A[i] = i;
; }
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
define void @f(i64* %A, i64 %N) nounwind {
entry:
fence seq_cst
br i1 true, label %then1, label %else1
then1:
br label %next
else1:
br label %next
next:
br i1 true, label %then, label %else
then:
br label %for.i.head
else:
br label %for.i.head
for.i.head:
br label %for.i.head1
for.i.head1:
br label %for.i
for.i:
%indvar = phi i64 [ 0, %for.i.head1], [ %indvar.next, %for.i ]
fence seq_cst
Update Polly tests to handle explicitly typed gep changes in LLVM llvm-svn: 230784
2015-02-28 03:20:19 +08:00
%scevgep = getelementptr i64, i64* %A, i64 %indvar
Support SCoPs with multiple entry edges. Regions that have multiple entry edges are very common. A simple if condition yields e.g. such a region: if / \ then else \ / for_region This for_region contains two entry edges 'then' -> 'for_region' and 'else' -> 'for_region'. Previously we scheduled the RegionSimplify pass to translate such regions into simple regions. With this patch, we now support them natively when the region is in -loop-simplify form, which means the entry block should not be a loop header. Contributed by: Star Tan <tanmx_star@yeah.net> llvm-svn: 179586
2013-04-16 16:04:42 +08:00
store i64 %indvar, i64* %scevgep
%indvar.next = add nsw i64 %indvar, 1
%exitcond = icmp eq i64 %indvar.next, %N
br i1 %exitcond, label %return, label %for.i
return:
fence seq_cst
ret void
}
; CHECK: Create LLVM-IR from SCoPs' for region: 'next.split => polly.merge_new_and_old'
; CHECK-CODE: polly.split_new_and_old
; CHECK-CODE: polly.merge_new_and_old