2015-04-28 01:03:31 +08:00
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//===-- X86IntrinsicsInfo.h - X86 Intrinsics ------------*- C++ -*-===//
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2014-08-24 17:19:56 +08:00
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the details for lowering X86 intrinsics
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_X86_X86INTRINSICSINFO_H
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#define LLVM_LIB_TARGET_X86_X86INTRINSICSINFO_H
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2016-01-28 03:29:56 +08:00
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#include "X86ISelLowering.h"
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#include "X86InstrInfo.h"
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2014-09-04 14:34:34 +08:00
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namespace llvm {
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2014-08-24 17:19:56 +08:00
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2016-06-04 12:32:17 +08:00
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enum IntrinsicType : uint16_t {
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2014-09-04 14:34:34 +08:00
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INTR_NO_TYPE,
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2016-08-16 14:41:00 +08:00
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GATHER, SCATTER, PREFETCH, RDSEED, RDRAND, RDPMC, RDTSC, XTEST, XGETBV, ADX, FPCLASS, FPCLASSS,
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2016-09-06 13:45:24 +08:00
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INTR_TYPE_1OP, INTR_TYPE_2OP, INTR_TYPE_3OP, INTR_TYPE_4OP,
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2016-11-06 12:12:46 +08:00
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CMP_MASK, CMP_MASK_CC,CMP_MASK_SCALAR_CC, VSHIFT, COMI, COMI_RM,
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CVTPD2PS, CVTPD2PS_MASK,
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2015-07-25 01:24:15 +08:00
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INTR_TYPE_1OP_MASK, INTR_TYPE_1OP_MASK_RM,
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2015-10-04 15:20:41 +08:00
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INTR_TYPE_2OP_MASK, INTR_TYPE_2OP_MASK_RM, INTR_TYPE_2OP_IMM8_MASK,
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2015-08-31 19:14:02 +08:00
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INTR_TYPE_3OP_MASK, INTR_TYPE_3OP_MASK_RM, INTR_TYPE_3OP_IMM8_MASK,
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2016-02-04 22:41:08 +08:00
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FMA_OP_MASK, FMA_OP_MASKZ, FMA_OP_MASK3,
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FMA_OP_SCALAR_MASK, FMA_OP_SCALAR_MASKZ, FMA_OP_SCALAR_MASK3,
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2016-05-24 19:06:22 +08:00
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VPERM_2OP_MASK, VPERM_3OP_MASK, VPERM_3OP_MASKZ, INTR_TYPE_SCALAR_MASK,
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2015-09-02 19:18:55 +08:00
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INTR_TYPE_SCALAR_MASK_RM, INTR_TYPE_3OP_SCALAR_MASK_RM,
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2016-05-31 15:43:39 +08:00
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COMPRESS_EXPAND_IN_REG, COMPRESS_TO_MEM, BRCST_SUBVEC_TO_VEC, BRCST32x2_TO_VEC,
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2015-07-25 01:24:15 +08:00
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TRUNCATE_TO_MEM_VI8, TRUNCATE_TO_MEM_VI16, TRUNCATE_TO_MEM_VI32,
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2017-01-03 13:45:57 +08:00
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EXPAND_FROM_MEM,
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2016-01-19 22:21:39 +08:00
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TERLOG_OP_MASK, TERLOG_OP_MASKZ, BROADCASTM, KUNPCK, FIXUPIMM, FIXUPIMM_MASKZ, FIXUPIMMS,
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FIXUPIMMS_MASKZ, CONVERT_MASK_TO_VEC, CONVERT_TO_MASK
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2014-08-24 17:19:56 +08:00
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};
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struct IntrinsicData {
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2014-09-04 14:34:34 +08:00
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2016-06-04 12:32:17 +08:00
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uint16_t Id;
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2014-08-24 17:19:56 +08:00
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IntrinsicType Type;
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2016-06-04 12:32:17 +08:00
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uint16_t Opc0;
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uint16_t Opc1;
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2014-08-24 17:19:56 +08:00
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2014-09-04 14:34:34 +08:00
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bool operator<(const IntrinsicData &RHS) const {
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return Id < RHS.Id;
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}
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bool operator==(const IntrinsicData &RHS) const {
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return RHS.Id == Id;
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}
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};
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2014-08-24 17:19:56 +08:00
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2014-09-04 14:34:34 +08:00
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#define X86_INTRINSIC_DATA(id, type, op0, op1) \
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{ Intrinsic::x86_##id, type, op0, op1 }
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/*
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* IntrinsicsWithChain - the table should be sorted by Intrinsic ID - in
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* the alphabetical order.
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*/
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static const IntrinsicData IntrinsicsWithChain[] = {
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X86_INTRINSIC_DATA(addcarry_u32, ADX, X86ISD::ADC, 0),
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X86_INTRINSIC_DATA(addcarry_u64, ADX, X86ISD::ADC, 0),
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X86_INTRINSIC_DATA(addcarryx_u32, ADX, X86ISD::ADC, 0),
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X86_INTRINSIC_DATA(addcarryx_u64, ADX, X86ISD::ADC, 0),
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2014-12-04 13:20:33 +08:00
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2016-01-26 08:55:00 +08:00
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X86_INTRINSIC_DATA(avx512_gather_dpd_512, GATHER, X86::VGATHERDPDZrm, 0),
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X86_INTRINSIC_DATA(avx512_gather_dpi_512, GATHER, X86::VPGATHERDDZrm, 0),
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X86_INTRINSIC_DATA(avx512_gather_dpq_512, GATHER, X86::VPGATHERDQZrm, 0),
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X86_INTRINSIC_DATA(avx512_gather_dps_512, GATHER, X86::VGATHERDPSZrm, 0),
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X86_INTRINSIC_DATA(avx512_gather_qpd_512, GATHER, X86::VGATHERQPDZrm, 0),
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X86_INTRINSIC_DATA(avx512_gather_qpi_512, GATHER, X86::VPGATHERQDZrm, 0),
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X86_INTRINSIC_DATA(avx512_gather_qpq_512, GATHER, X86::VPGATHERQQZrm, 0),
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X86_INTRINSIC_DATA(avx512_gather_qps_512, GATHER, X86::VGATHERQPSZrm, 0),
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2015-06-28 18:53:29 +08:00
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X86_INTRINSIC_DATA(avx512_gather3div2_df, GATHER, X86::VGATHERQPDZ128rm, 0),
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X86_INTRINSIC_DATA(avx512_gather3div2_di, GATHER, X86::VPGATHERQQZ128rm, 0),
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X86_INTRINSIC_DATA(avx512_gather3div4_df, GATHER, X86::VGATHERQPDZ256rm, 0),
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X86_INTRINSIC_DATA(avx512_gather3div4_di, GATHER, X86::VPGATHERQQZ256rm, 0),
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X86_INTRINSIC_DATA(avx512_gather3div4_sf, GATHER, X86::VGATHERQPSZ128rm, 0),
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X86_INTRINSIC_DATA(avx512_gather3div4_si, GATHER, X86::VPGATHERQDZ128rm, 0),
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X86_INTRINSIC_DATA(avx512_gather3div8_sf, GATHER, X86::VGATHERQPSZ256rm, 0),
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X86_INTRINSIC_DATA(avx512_gather3div8_si, GATHER, X86::VPGATHERQDZ256rm, 0),
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X86_INTRINSIC_DATA(avx512_gather3siv2_df, GATHER, X86::VGATHERDPDZ128rm, 0),
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X86_INTRINSIC_DATA(avx512_gather3siv2_di, GATHER, X86::VPGATHERDQZ128rm, 0),
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X86_INTRINSIC_DATA(avx512_gather3siv4_df, GATHER, X86::VGATHERDPDZ256rm, 0),
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X86_INTRINSIC_DATA(avx512_gather3siv4_di, GATHER, X86::VPGATHERDQZ256rm, 0),
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X86_INTRINSIC_DATA(avx512_gather3siv4_sf, GATHER, X86::VGATHERDPSZ128rm, 0),
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X86_INTRINSIC_DATA(avx512_gather3siv4_si, GATHER, X86::VPGATHERDDZ128rm, 0),
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X86_INTRINSIC_DATA(avx512_gather3siv8_sf, GATHER, X86::VGATHERDPSZ256rm, 0),
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X86_INTRINSIC_DATA(avx512_gather3siv8_si, GATHER, X86::VPGATHERDDZ256rm, 0),
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2014-12-04 13:20:33 +08:00
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2014-09-04 14:34:34 +08:00
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X86_INTRINSIC_DATA(avx512_gatherpf_dpd_512, PREFETCH,
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X86::VGATHERPF0DPDm, X86::VGATHERPF1DPDm),
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X86_INTRINSIC_DATA(avx512_gatherpf_dps_512, PREFETCH,
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X86::VGATHERPF0DPSm, X86::VGATHERPF1DPSm),
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X86_INTRINSIC_DATA(avx512_gatherpf_qpd_512, PREFETCH,
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X86::VGATHERPF0QPDm, X86::VGATHERPF1QPDm),
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X86_INTRINSIC_DATA(avx512_gatherpf_qps_512, PREFETCH,
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X86::VGATHERPF0QPSm, X86::VGATHERPF1QPSm),
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2014-12-04 13:20:33 +08:00
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2014-12-11 23:02:24 +08:00
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X86_INTRINSIC_DATA(avx512_mask_compress_store_d_128,
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COMPRESS_TO_MEM, X86ISD::COMPRESS, 0),
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X86_INTRINSIC_DATA(avx512_mask_compress_store_d_256,
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COMPRESS_TO_MEM, X86ISD::COMPRESS, 0),
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X86_INTRINSIC_DATA(avx512_mask_compress_store_d_512,
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COMPRESS_TO_MEM, X86ISD::COMPRESS, 0),
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X86_INTRINSIC_DATA(avx512_mask_compress_store_pd_128,
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COMPRESS_TO_MEM, X86ISD::COMPRESS, 0),
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X86_INTRINSIC_DATA(avx512_mask_compress_store_pd_256,
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COMPRESS_TO_MEM, X86ISD::COMPRESS, 0),
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X86_INTRINSIC_DATA(avx512_mask_compress_store_pd_512,
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COMPRESS_TO_MEM, X86ISD::COMPRESS, 0),
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X86_INTRINSIC_DATA(avx512_mask_compress_store_ps_128,
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COMPRESS_TO_MEM, X86ISD::COMPRESS, 0),
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X86_INTRINSIC_DATA(avx512_mask_compress_store_ps_256,
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COMPRESS_TO_MEM, X86ISD::COMPRESS, 0),
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X86_INTRINSIC_DATA(avx512_mask_compress_store_ps_512,
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COMPRESS_TO_MEM, X86ISD::COMPRESS, 0),
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X86_INTRINSIC_DATA(avx512_mask_compress_store_q_128,
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COMPRESS_TO_MEM, X86ISD::COMPRESS, 0),
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X86_INTRINSIC_DATA(avx512_mask_compress_store_q_256,
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COMPRESS_TO_MEM, X86ISD::COMPRESS, 0),
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X86_INTRINSIC_DATA(avx512_mask_compress_store_q_512,
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COMPRESS_TO_MEM, X86ISD::COMPRESS, 0),
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2014-12-15 18:03:52 +08:00
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X86_INTRINSIC_DATA(avx512_mask_expand_load_d_128,
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EXPAND_FROM_MEM, X86ISD::EXPAND, 0),
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X86_INTRINSIC_DATA(avx512_mask_expand_load_d_256,
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EXPAND_FROM_MEM, X86ISD::EXPAND, 0),
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X86_INTRINSIC_DATA(avx512_mask_expand_load_d_512,
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EXPAND_FROM_MEM, X86ISD::EXPAND, 0),
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X86_INTRINSIC_DATA(avx512_mask_expand_load_pd_128,
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EXPAND_FROM_MEM, X86ISD::EXPAND, 0),
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X86_INTRINSIC_DATA(avx512_mask_expand_load_pd_256,
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EXPAND_FROM_MEM, X86ISD::EXPAND, 0),
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X86_INTRINSIC_DATA(avx512_mask_expand_load_pd_512,
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EXPAND_FROM_MEM, X86ISD::EXPAND, 0),
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X86_INTRINSIC_DATA(avx512_mask_expand_load_ps_128,
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EXPAND_FROM_MEM, X86ISD::EXPAND, 0),
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X86_INTRINSIC_DATA(avx512_mask_expand_load_ps_256,
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EXPAND_FROM_MEM, X86ISD::EXPAND, 0),
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X86_INTRINSIC_DATA(avx512_mask_expand_load_ps_512,
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EXPAND_FROM_MEM, X86ISD::EXPAND, 0),
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X86_INTRINSIC_DATA(avx512_mask_expand_load_q_128,
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EXPAND_FROM_MEM, X86ISD::EXPAND, 0),
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X86_INTRINSIC_DATA(avx512_mask_expand_load_q_256,
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EXPAND_FROM_MEM, X86ISD::EXPAND, 0),
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X86_INTRINSIC_DATA(avx512_mask_expand_load_q_512,
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EXPAND_FROM_MEM, X86ISD::EXPAND, 0),
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2015-12-24 15:11:53 +08:00
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X86_INTRINSIC_DATA(avx512_mask_pmov_db_mem_128, TRUNCATE_TO_MEM_VI8,
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2015-07-25 01:24:15 +08:00
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X86ISD::VTRUNC, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmov_db_mem_256, TRUNCATE_TO_MEM_VI8,
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X86ISD::VTRUNC, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmov_db_mem_512, TRUNCATE_TO_MEM_VI8,
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X86ISD::VTRUNC, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmov_dw_mem_128, TRUNCATE_TO_MEM_VI16,
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X86ISD::VTRUNC, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmov_dw_mem_256, TRUNCATE_TO_MEM_VI16,
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X86ISD::VTRUNC, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmov_dw_mem_512, TRUNCATE_TO_MEM_VI16,
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X86ISD::VTRUNC, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmov_qb_mem_128, TRUNCATE_TO_MEM_VI8,
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X86ISD::VTRUNC, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmov_qb_mem_256, TRUNCATE_TO_MEM_VI8,
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X86ISD::VTRUNC, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmov_qb_mem_512, TRUNCATE_TO_MEM_VI8,
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X86ISD::VTRUNC, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmov_qd_mem_128, TRUNCATE_TO_MEM_VI32,
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X86ISD::VTRUNC, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmov_qd_mem_256, TRUNCATE_TO_MEM_VI32,
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X86ISD::VTRUNC, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmov_qd_mem_512, TRUNCATE_TO_MEM_VI32,
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X86ISD::VTRUNC, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmov_qw_mem_128, TRUNCATE_TO_MEM_VI16,
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X86ISD::VTRUNC, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmov_qw_mem_256, TRUNCATE_TO_MEM_VI16,
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X86ISD::VTRUNC, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmov_qw_mem_512, TRUNCATE_TO_MEM_VI16,
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X86ISD::VTRUNC, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmov_wb_mem_128, TRUNCATE_TO_MEM_VI8,
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X86ISD::VTRUNC, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmov_wb_mem_256, TRUNCATE_TO_MEM_VI8,
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X86ISD::VTRUNC, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmov_wb_mem_512, TRUNCATE_TO_MEM_VI8,
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X86ISD::VTRUNC, 0),
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2016-12-21 18:43:36 +08:00
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X86_INTRINSIC_DATA(avx512_mask_pmovs_db_mem_128, TRUNCATE_TO_MEM_VI8,
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X86ISD::VTRUNCS, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmovs_db_mem_256, TRUNCATE_TO_MEM_VI8,
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X86ISD::VTRUNCS, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmovs_db_mem_512, TRUNCATE_TO_MEM_VI8,
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X86ISD::VTRUNCS, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmovs_dw_mem_128, TRUNCATE_TO_MEM_VI16,
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X86ISD::VTRUNCS, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmovs_dw_mem_256, TRUNCATE_TO_MEM_VI16,
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X86ISD::VTRUNCS, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmovs_dw_mem_512, TRUNCATE_TO_MEM_VI16,
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X86ISD::VTRUNCS, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmovs_qb_mem_128, TRUNCATE_TO_MEM_VI8,
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X86ISD::VTRUNCS, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmovs_qb_mem_256, TRUNCATE_TO_MEM_VI8,
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X86ISD::VTRUNCS, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmovs_qb_mem_512, TRUNCATE_TO_MEM_VI8,
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X86ISD::VTRUNCS, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmovs_qd_mem_128, TRUNCATE_TO_MEM_VI32,
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X86ISD::VTRUNCS, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmovs_qd_mem_256, TRUNCATE_TO_MEM_VI32,
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X86ISD::VTRUNCS, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmovs_qd_mem_512, TRUNCATE_TO_MEM_VI32,
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X86ISD::VTRUNCS, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmovs_qw_mem_128, TRUNCATE_TO_MEM_VI16,
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X86ISD::VTRUNCS, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmovs_qw_mem_256, TRUNCATE_TO_MEM_VI16,
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X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_qw_mem_512, TRUNCATE_TO_MEM_VI16,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_wb_mem_128, TRUNCATE_TO_MEM_VI8,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_wb_mem_256, TRUNCATE_TO_MEM_VI8,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_wb_mem_512, TRUNCATE_TO_MEM_VI8,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_db_mem_128, TRUNCATE_TO_MEM_VI8,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_db_mem_256, TRUNCATE_TO_MEM_VI8,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_db_mem_512, TRUNCATE_TO_MEM_VI8,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_dw_mem_128, TRUNCATE_TO_MEM_VI16,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_dw_mem_256, TRUNCATE_TO_MEM_VI16,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_dw_mem_512, TRUNCATE_TO_MEM_VI16,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_qb_mem_128, TRUNCATE_TO_MEM_VI8,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_qb_mem_256, TRUNCATE_TO_MEM_VI8,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_qb_mem_512, TRUNCATE_TO_MEM_VI8,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_qd_mem_128, TRUNCATE_TO_MEM_VI32,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_qd_mem_256, TRUNCATE_TO_MEM_VI32,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_qd_mem_512, TRUNCATE_TO_MEM_VI32,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_qw_mem_128, TRUNCATE_TO_MEM_VI16,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_qw_mem_256, TRUNCATE_TO_MEM_VI16,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_qw_mem_512, TRUNCATE_TO_MEM_VI16,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_wb_mem_128, TRUNCATE_TO_MEM_VI8,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_wb_mem_256, TRUNCATE_TO_MEM_VI8,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_wb_mem_512, TRUNCATE_TO_MEM_VI8,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
|
2014-09-04 14:34:34 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_scatter_dpd_512, SCATTER, X86::VSCATTERDPDZmr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scatter_dpi_512, SCATTER, X86::VPSCATTERDDZmr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scatter_dpq_512, SCATTER, X86::VPSCATTERDQZmr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scatter_dps_512, SCATTER, X86::VSCATTERDPSZmr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scatter_qpd_512, SCATTER, X86::VSCATTERQPDZmr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scatter_qpi_512, SCATTER, X86::VPSCATTERQDZmr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scatter_qpq_512, SCATTER, X86::VPSCATTERQQZmr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scatter_qps_512, SCATTER, X86::VSCATTERQPSZmr, 0),
|
2015-06-29 20:14:24 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_scatterdiv2_df, SCATTER, X86::VSCATTERQPDZ128mr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scatterdiv2_di, SCATTER, X86::VPSCATTERQQZ128mr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scatterdiv4_df, SCATTER, X86::VSCATTERQPDZ256mr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scatterdiv4_di, SCATTER, X86::VPSCATTERQQZ256mr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scatterdiv4_sf, SCATTER, X86::VSCATTERQPSZ128mr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scatterdiv4_si, SCATTER, X86::VPSCATTERQDZ128mr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scatterdiv8_sf, SCATTER, X86::VSCATTERQPSZ256mr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scatterdiv8_si, SCATTER, X86::VPSCATTERQDZ256mr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scatterpf_dpd_512, PREFETCH, X86::VSCATTERPF0DPDm,
|
|
|
|
X86::VSCATTERPF1DPDm),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scatterpf_dps_512, PREFETCH, X86::VSCATTERPF0DPSm,
|
|
|
|
X86::VSCATTERPF1DPSm),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scatterpf_qpd_512, PREFETCH, X86::VSCATTERPF0QPDm,
|
|
|
|
X86::VSCATTERPF1QPDm),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scatterpf_qps_512, PREFETCH, X86::VSCATTERPF0QPSm,
|
|
|
|
X86::VSCATTERPF1QPSm),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scattersiv2_df, SCATTER, X86::VSCATTERDPDZ128mr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scattersiv2_di, SCATTER, X86::VPSCATTERDQZ128mr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scattersiv4_df, SCATTER, X86::VSCATTERDPDZ256mr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scattersiv4_di, SCATTER, X86::VPSCATTERDQZ256mr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scattersiv4_sf, SCATTER, X86::VSCATTERDPSZ128mr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scattersiv4_si, SCATTER, X86::VPSCATTERDDZ128mr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scattersiv8_sf, SCATTER, X86::VSCATTERDPSZ256mr, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_scattersiv8_si, SCATTER, X86::VPSCATTERDDZ256mr, 0),
|
2014-09-04 14:34:34 +08:00
|
|
|
X86_INTRINSIC_DATA(rdpmc, RDPMC, X86ISD::RDPMC_DAG, 0),
|
|
|
|
X86_INTRINSIC_DATA(rdrand_16, RDRAND, X86ISD::RDRAND, 0),
|
|
|
|
X86_INTRINSIC_DATA(rdrand_32, RDRAND, X86ISD::RDRAND, 0),
|
|
|
|
X86_INTRINSIC_DATA(rdrand_64, RDRAND, X86ISD::RDRAND, 0),
|
|
|
|
X86_INTRINSIC_DATA(rdseed_16, RDSEED, X86ISD::RDSEED, 0),
|
|
|
|
X86_INTRINSIC_DATA(rdseed_32, RDSEED, X86ISD::RDSEED, 0),
|
|
|
|
X86_INTRINSIC_DATA(rdseed_64, RDSEED, X86ISD::RDSEED, 0),
|
|
|
|
X86_INTRINSIC_DATA(rdtsc, RDTSC, X86ISD::RDTSC_DAG, 0),
|
|
|
|
X86_INTRINSIC_DATA(rdtscp, RDTSC, X86ISD::RDTSCP_DAG, 0),
|
2014-12-04 13:20:33 +08:00
|
|
|
|
2014-09-04 14:34:34 +08:00
|
|
|
X86_INTRINSIC_DATA(subborrow_u32, ADX, X86ISD::SBB, 0),
|
|
|
|
X86_INTRINSIC_DATA(subborrow_u64, ADX, X86ISD::SBB, 0),
|
2016-08-16 14:41:00 +08:00
|
|
|
X86_INTRINSIC_DATA(xgetbv, XGETBV, X86::XGETBV, 0),
|
2014-09-04 14:34:34 +08:00
|
|
|
X86_INTRINSIC_DATA(xtest, XTEST, X86ISD::XTEST, 0),
|
|
|
|
};
|
2014-08-24 17:19:56 +08:00
|
|
|
|
2014-09-04 14:34:34 +08:00
|
|
|
/*
|
|
|
|
* Find Intrinsic data by intrinsic ID
|
|
|
|
*/
|
2016-06-04 12:32:17 +08:00
|
|
|
static const IntrinsicData* getIntrinsicWithChain(uint16_t IntNo) {
|
2014-09-04 14:34:34 +08:00
|
|
|
|
2014-09-04 15:20:39 +08:00
|
|
|
IntrinsicData IntrinsicToFind = {IntNo, INTR_NO_TYPE, 0, 0 };
|
2014-09-04 14:34:34 +08:00
|
|
|
const IntrinsicData *Data = std::lower_bound(std::begin(IntrinsicsWithChain),
|
|
|
|
std::end(IntrinsicsWithChain),
|
|
|
|
IntrinsicToFind);
|
|
|
|
if (Data != std::end(IntrinsicsWithChain) && *Data == IntrinsicToFind)
|
|
|
|
return Data;
|
|
|
|
return nullptr;
|
2014-08-24 17:19:56 +08:00
|
|
|
}
|
|
|
|
|
2014-09-04 14:34:34 +08:00
|
|
|
/*
|
|
|
|
* IntrinsicsWithoutChain - the table should be sorted by Intrinsic ID - in
|
|
|
|
* the alphabetical order.
|
|
|
|
*/
|
|
|
|
static const IntrinsicData IntrinsicsWithoutChain[] = {
|
2016-11-06 12:12:46 +08:00
|
|
|
X86_INTRINSIC_DATA(avx_cvt_pd2_ps_256,CVTPD2PS, ISD::FP_ROUND, 0),
|
2016-11-10 15:47:17 +08:00
|
|
|
X86_INTRINSIC_DATA(avx_cvt_pd2dq_256, INTR_TYPE_1OP, X86ISD::CVTP2SI, 0),
|
2016-11-06 12:12:42 +08:00
|
|
|
X86_INTRINSIC_DATA(avx_cvtdq2_ps_256, INTR_TYPE_1OP, ISD::SINT_TO_FP, 0),
|
2016-11-10 14:45:39 +08:00
|
|
|
X86_INTRINSIC_DATA(avx_cvtt_pd2dq_256,INTR_TYPE_1OP, ISD::FP_TO_SINT, 0),
|
2016-11-10 15:24:52 +08:00
|
|
|
X86_INTRINSIC_DATA(avx_cvtt_ps2dq_256,INTR_TYPE_1OP, ISD::FP_TO_SINT, 0),
|
2016-01-26 08:55:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx_hadd_pd_256, INTR_TYPE_2OP, X86ISD::FHADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx_hadd_ps_256, INTR_TYPE_2OP, X86ISD::FHADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx_hsub_pd_256, INTR_TYPE_2OP, X86ISD::FHSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx_hsub_ps_256, INTR_TYPE_2OP, X86ISD::FHSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx_max_pd_256, INTR_TYPE_2OP, X86ISD::FMAX, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx_max_ps_256, INTR_TYPE_2OP, X86ISD::FMAX, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx_min_pd_256, INTR_TYPE_2OP, X86ISD::FMIN, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx_min_ps_256, INTR_TYPE_2OP, X86ISD::FMIN, 0),
|
2016-04-04 02:22:03 +08:00
|
|
|
X86_INTRINSIC_DATA(avx_movmsk_pd_256, INTR_TYPE_1OP, X86ISD::MOVMSK, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx_movmsk_ps_256, INTR_TYPE_1OP, X86ISD::MOVMSK, 0),
|
2016-01-26 08:55:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx_rcp_ps_256, INTR_TYPE_1OP, X86ISD::FRCP, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx_rsqrt_ps_256, INTR_TYPE_1OP, X86ISD::FRSQRT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx_sqrt_pd_256, INTR_TYPE_1OP, ISD::FSQRT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx_sqrt_ps_256, INTR_TYPE_1OP, ISD::FSQRT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx_vperm2f128_pd_256, INTR_TYPE_3OP, X86ISD::VPERM2X128, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx_vperm2f128_ps_256, INTR_TYPE_3OP, X86ISD::VPERM2X128, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx_vperm2f128_si_256, INTR_TYPE_3OP, X86ISD::VPERM2X128, 0),
|
2016-03-04 02:13:53 +08:00
|
|
|
X86_INTRINSIC_DATA(avx_vpermilvar_pd, INTR_TYPE_2OP, X86ISD::VPERMILPV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx_vpermilvar_pd_256, INTR_TYPE_2OP, X86ISD::VPERMILPV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx_vpermilvar_ps, INTR_TYPE_2OP, X86ISD::VPERMILPV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx_vpermilvar_ps_256, INTR_TYPE_2OP, X86ISD::VPERMILPV, 0),
|
2016-06-04 12:32:15 +08:00
|
|
|
X86_INTRINSIC_DATA(avx2_pabs_b, INTR_TYPE_1OP, X86ISD::ABS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_pabs_d, INTR_TYPE_1OP, X86ISD::ABS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_pabs_w, INTR_TYPE_1OP, X86ISD::ABS, 0),
|
2015-04-21 18:27:40 +08:00
|
|
|
X86_INTRINSIC_DATA(avx2_packssdw, INTR_TYPE_2OP, X86ISD::PACKSS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_packsswb, INTR_TYPE_2OP, X86ISD::PACKSS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_packusdw, INTR_TYPE_2OP, X86ISD::PACKUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_packuswb, INTR_TYPE_2OP, X86ISD::PACKUS, 0),
|
2016-05-21 11:52:28 +08:00
|
|
|
X86_INTRINSIC_DATA(avx2_padds_b, INTR_TYPE_2OP, X86ISD::ADDS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_padds_w, INTR_TYPE_2OP, X86ISD::ADDS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_paddus_b, INTR_TYPE_2OP, X86ISD::ADDUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_paddus_w, INTR_TYPE_2OP, X86ISD::ADDUS, 0),
|
[X86][SSE] Detect AVG pattern during instruction combine for SSE2/AVX2/AVX512BW.
This patch detects the AVG pattern in vectorized code, which is simply
c = (a + b + 1) / 2, where a, b, and c have the same type which are vectors of
either unsigned i8 or unsigned i16. In the IR, i8/i16 will be promoted to
i32 before any arithmetic operations. The following IR shows such an example:
%1 = zext <N x i8> %a to <N x i32>
%2 = zext <N x i8> %b to <N x i32>
%3 = add nuw nsw <N x i32> %1, <i32 1 x N>
%4 = add nuw nsw <N x i32> %3, %2
%5 = lshr <N x i32> %N, <i32 1 x N>
%6 = trunc <N x i32> %5 to <N x i8>
and with this patch it will be converted to a X86ISD::AVG instruction.
The pattern recognition is done when combining instructions just before type
legalization during instruction selection. We do it here because after type
legalization, it is much more difficult to do pattern recognition based
on many instructions that are doing type conversions. Therefore, for
target-specific instructions (like X86ISD::AVG), we need to take care of type
legalization by ourselves. However, as X86ISD::AVG behaves similarly to
ISD::ADD, I am wondering if there is a way to legalize operands and result
types of X86ISD::AVG together with ISD::ADD. It seems that the current design
doesn't support this idea.
Tests are added for SSE2, AVX2, and AVX512BW and both i8 and i16 types of
variant vector sizes.
Differential revision: http://reviews.llvm.org/D14761
llvm-svn: 253952
2015-11-24 13:44:19 +08:00
|
|
|
X86_INTRINSIC_DATA(avx2_pavg_b, INTR_TYPE_2OP, X86ISD::AVG, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_pavg_w, INTR_TYPE_2OP, X86ISD::AVG, 0),
|
2015-04-21 18:27:40 +08:00
|
|
|
X86_INTRINSIC_DATA(avx2_phadd_d, INTR_TYPE_2OP, X86ISD::HADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_phadd_w, INTR_TYPE_2OP, X86ISD::HADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_phsub_d, INTR_TYPE_2OP, X86ISD::HSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_phsub_w, INTR_TYPE_2OP, X86ISD::HSUB, 0),
|
2016-10-30 14:56:16 +08:00
|
|
|
X86_INTRINSIC_DATA(avx2_pmadd_ub_sw, INTR_TYPE_2OP, X86ISD::VPMADDUBSW, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_pmadd_wd, INTR_TYPE_2OP, X86ISD::VPMADDWD, 0),
|
2016-04-04 02:22:03 +08:00
|
|
|
X86_INTRINSIC_DATA(avx2_pmovmskb, INTR_TYPE_1OP, X86ISD::MOVMSK, 0),
|
2015-04-21 18:27:40 +08:00
|
|
|
X86_INTRINSIC_DATA(avx2_pmul_dq, INTR_TYPE_2OP, X86ISD::PMULDQ, 0),
|
2016-10-30 02:41:45 +08:00
|
|
|
X86_INTRINSIC_DATA(avx2_pmul_hr_sw, INTR_TYPE_2OP, X86ISD::MULHRS, 0),
|
2015-04-21 18:27:40 +08:00
|
|
|
X86_INTRINSIC_DATA(avx2_pmulh_w, INTR_TYPE_2OP, ISD::MULHS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_pmulhu_w, INTR_TYPE_2OP, ISD::MULHU, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_pmulu_dq, INTR_TYPE_2OP, X86ISD::PMULUDQ, 0),
|
2015-11-25 03:51:26 +08:00
|
|
|
X86_INTRINSIC_DATA(avx2_psad_bw, INTR_TYPE_2OP, X86ISD::PSADBW, 0),
|
2015-04-21 18:27:40 +08:00
|
|
|
X86_INTRINSIC_DATA(avx2_pshuf_b, INTR_TYPE_2OP, X86ISD::PSHUFB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psll_d, INTR_TYPE_2OP, X86ISD::VSHL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psll_q, INTR_TYPE_2OP, X86ISD::VSHL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psll_w, INTR_TYPE_2OP, X86ISD::VSHL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_pslli_d, VSHIFT, X86ISD::VSHLI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_pslli_q, VSHIFT, X86ISD::VSHLI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_pslli_w, VSHIFT, X86ISD::VSHLI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psllv_d, INTR_TYPE_2OP, ISD::SHL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psllv_d_256, INTR_TYPE_2OP, ISD::SHL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psllv_q, INTR_TYPE_2OP, ISD::SHL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psllv_q_256, INTR_TYPE_2OP, ISD::SHL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psra_d, INTR_TYPE_2OP, X86ISD::VSRA, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psra_w, INTR_TYPE_2OP, X86ISD::VSRA, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psrai_d, VSHIFT, X86ISD::VSRAI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psrai_w, VSHIFT, X86ISD::VSRAI, 0),
|
2016-06-20 15:05:43 +08:00
|
|
|
X86_INTRINSIC_DATA(avx2_psrav_d, INTR_TYPE_2OP, X86ISD::VSRAV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psrav_d_256, INTR_TYPE_2OP, X86ISD::VSRAV, 0),
|
2015-04-21 18:27:40 +08:00
|
|
|
X86_INTRINSIC_DATA(avx2_psrl_d, INTR_TYPE_2OP, X86ISD::VSRL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psrl_q, INTR_TYPE_2OP, X86ISD::VSRL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psrl_w, INTR_TYPE_2OP, X86ISD::VSRL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psrli_d, VSHIFT, X86ISD::VSRLI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psrli_q, VSHIFT, X86ISD::VSRLI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psrli_w, VSHIFT, X86ISD::VSRLI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psrlv_d, INTR_TYPE_2OP, ISD::SRL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psrlv_d_256, INTR_TYPE_2OP, ISD::SRL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psrlv_q, INTR_TYPE_2OP, ISD::SRL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psrlv_q_256, INTR_TYPE_2OP, ISD::SRL, 0),
|
2016-05-21 11:52:28 +08:00
|
|
|
X86_INTRINSIC_DATA(avx2_psubs_b, INTR_TYPE_2OP, X86ISD::SUBS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psubs_w, INTR_TYPE_2OP, X86ISD::SUBS, 0),
|
2015-04-21 18:27:40 +08:00
|
|
|
X86_INTRINSIC_DATA(avx2_psubus_b, INTR_TYPE_2OP, X86ISD::SUBUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_psubus_w, INTR_TYPE_2OP, X86ISD::SUBUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx2_vperm2i128, INTR_TYPE_3OP, X86ISD::VPERM2X128, 0),
|
2015-11-18 17:42:45 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_broadcastmb_128, BROADCASTM, X86ISD::VBROADCASTM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_broadcastmb_256, BROADCASTM, X86ISD::VBROADCASTM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_broadcastmb_512, BROADCASTM, X86ISD::VBROADCASTM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_broadcastmw_128, BROADCASTM, X86ISD::VBROADCASTM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_broadcastmw_256, BROADCASTM, X86ISD::VBROADCASTM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_broadcastmw_512, BROADCASTM, X86ISD::VBROADCASTM, 0),
|
2015-12-27 21:56:16 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_cvtb2mask_128, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtb2mask_256, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtb2mask_512, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtd2mask_128, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtd2mask_256, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtd2mask_512, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0),
|
2015-12-24 15:11:53 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_cvtmask2b_128, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtmask2b_256, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtmask2b_512, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtmask2d_128, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtmask2d_256, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtmask2d_512, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtmask2q_128, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtmask2q_256, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtmask2q_512, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtmask2w_128, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtmask2w_256, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtmask2w_512, CONVERT_MASK_TO_VEC, X86ISD::VSEXT, 0),
|
2015-12-27 21:56:16 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_cvtq2mask_128, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtq2mask_256, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtq2mask_512, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0),
|
2016-09-23 14:24:39 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_cvtsi2sd64, INTR_TYPE_3OP, X86ISD::SCALAR_SINT_TO_FP_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtsi2ss32, INTR_TYPE_3OP, X86ISD::SCALAR_SINT_TO_FP_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtsi2ss64, INTR_TYPE_3OP, X86ISD::SCALAR_SINT_TO_FP_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvttsd2si, INTR_TYPE_2OP, X86ISD::CVTTS2SI_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvttsd2si64, INTR_TYPE_2OP, X86ISD::CVTTS2SI_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvttsd2usi, INTR_TYPE_2OP, X86ISD::CVTTS2UI_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvttsd2usi64, INTR_TYPE_2OP, X86ISD::CVTTS2UI_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvttss2si, INTR_TYPE_2OP, X86ISD::CVTTS2SI_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvttss2si64, INTR_TYPE_2OP, X86ISD::CVTTS2SI_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvttss2usi, INTR_TYPE_2OP, X86ISD::CVTTS2UI_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvttss2usi64, INTR_TYPE_2OP, X86ISD::CVTTS2UI_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtusi2ss, INTR_TYPE_3OP, X86ISD::SCALAR_UINT_TO_FP_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtusi642sd, INTR_TYPE_3OP, X86ISD::SCALAR_UINT_TO_FP_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtusi642ss, INTR_TYPE_3OP, X86ISD::SCALAR_UINT_TO_FP_RND, 0),
|
2015-12-27 21:56:16 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_cvtw2mask_128, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtw2mask_256, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_cvtw2mask_512, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0),
|
2015-04-21 18:27:40 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_exp2_pd, INTR_TYPE_1OP_MASK_RM, X86ISD::EXP2, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_exp2_ps, INTR_TYPE_1OP_MASK_RM, X86ISD::EXP2, 0),
|
2015-12-07 21:25:18 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_kunpck_bw, KUNPCK, ISD::CONCAT_VECTORS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_kunpck_dq, KUNPCK, ISD::CONCAT_VECTORS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_kunpck_wd, KUNPCK, ISD::CONCAT_VECTORS, 0),
|
2015-06-29 17:10:00 +08:00
|
|
|
|
2015-02-18 15:59:20 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_add_pd_512, INTR_TYPE_2OP_MASK, ISD::FADD,
|
2015-04-21 18:27:40 +08:00
|
|
|
X86ISD::FADD_RND),
|
2015-02-18 15:59:20 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_add_ps_512, INTR_TYPE_2OP_MASK, ISD::FADD,
|
2015-04-21 18:27:40 +08:00
|
|
|
X86ISD::FADD_RND),
|
2016-09-25 09:03:10 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_add_sd_round, INTR_TYPE_SCALAR_MASK_RM,
|
|
|
|
X86ISD::FADD_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_add_ss_round, INTR_TYPE_SCALAR_MASK_RM,
|
|
|
|
X86ISD::FADD_RND, 0),
|
2016-05-31 15:43:39 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_broadcastf32x2_256, BRCST32x2_TO_VEC,
|
|
|
|
X86ISD::VBROADCAST, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_broadcastf32x2_512, BRCST32x2_TO_VEC,
|
|
|
|
X86ISD::VBROADCAST, 0),
|
[X86][AVX512] Lower broadcast sub vector to vector inrtrinsics
lower broadcast<type>x<vector> to shuffles.
there are two cases:
1.src is 128 bits and dest is 512 bits: in this case we will lower it to shuffle with imm = 0.
2.src is 256 bit and dest is 512 bits: in this case we will lower it to shuffle with imm = 01000100b (0x44) that way we will broadcast the 256bit source: ymm[0,1,2,3] => zmm[0,1,2,3,0,1,2,3] then it will mask it with the passthru value (in case it's mask op).
Differential Revision: http://reviews.llvm.org/D15790
llvm-svn: 256490
2015-12-28 16:26:26 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_broadcastf32x4_256, BRCST_SUBVEC_TO_VEC,
|
|
|
|
X86ISD::SHUF128, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_broadcastf32x4_512, BRCST_SUBVEC_TO_VEC,
|
|
|
|
X86ISD::SHUF128, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_broadcastf32x8_512, BRCST_SUBVEC_TO_VEC,
|
|
|
|
X86ISD::SHUF128, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_broadcastf64x2_256, BRCST_SUBVEC_TO_VEC,
|
|
|
|
X86ISD::SHUF128, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_broadcastf64x2_512, BRCST_SUBVEC_TO_VEC,
|
|
|
|
X86ISD::SHUF128, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_broadcastf64x4_512, BRCST_SUBVEC_TO_VEC,
|
|
|
|
X86ISD::SHUF128, 0),
|
2016-05-31 15:43:39 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_broadcasti32x2_128, BRCST32x2_TO_VEC,
|
|
|
|
X86ISD::VBROADCAST, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_broadcasti32x2_256, BRCST32x2_TO_VEC,
|
|
|
|
X86ISD::VBROADCAST, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_broadcasti32x2_512, BRCST32x2_TO_VEC,
|
|
|
|
X86ISD::VBROADCAST, 0),
|
[X86][AVX512] Lower broadcast sub vector to vector inrtrinsics
lower broadcast<type>x<vector> to shuffles.
there are two cases:
1.src is 128 bits and dest is 512 bits: in this case we will lower it to shuffle with imm = 0.
2.src is 256 bit and dest is 512 bits: in this case we will lower it to shuffle with imm = 01000100b (0x44) that way we will broadcast the 256bit source: ymm[0,1,2,3] => zmm[0,1,2,3,0,1,2,3] then it will mask it with the passthru value (in case it's mask op).
Differential Revision: http://reviews.llvm.org/D15790
llvm-svn: 256490
2015-12-28 16:26:26 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_broadcasti32x4_256, BRCST_SUBVEC_TO_VEC,
|
|
|
|
X86ISD::SHUF128, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_broadcasti32x4_512, BRCST_SUBVEC_TO_VEC,
|
|
|
|
X86ISD::SHUF128, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_broadcasti32x8_512, BRCST_SUBVEC_TO_VEC,
|
|
|
|
X86ISD::SHUF128, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_broadcasti64x2_256, BRCST_SUBVEC_TO_VEC,
|
|
|
|
X86ISD::SHUF128, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_broadcasti64x2_512, BRCST_SUBVEC_TO_VEC,
|
|
|
|
X86ISD::SHUF128, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_broadcasti64x4_512, BRCST_SUBVEC_TO_VEC,
|
|
|
|
X86ISD::SHUF128, 0),
|
2015-05-07 19:24:42 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cmp_b_128, CMP_MASK_CC, X86ISD::CMPM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cmp_b_256, CMP_MASK_CC, X86ISD::CMPM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cmp_b_512, CMP_MASK_CC, X86ISD::CMPM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cmp_d_128, CMP_MASK_CC, X86ISD::CMPM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cmp_d_256, CMP_MASK_CC, X86ISD::CMPM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cmp_d_512, CMP_MASK_CC, X86ISD::CMPM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cmp_pd_128, CMP_MASK_CC, X86ISD::CMPM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cmp_pd_256, CMP_MASK_CC, X86ISD::CMPM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cmp_pd_512, CMP_MASK_CC, X86ISD::CMPM,
|
|
|
|
X86ISD::CMPM_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cmp_ps_128, CMP_MASK_CC, X86ISD::CMPM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cmp_ps_256, CMP_MASK_CC, X86ISD::CMPM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cmp_ps_512, CMP_MASK_CC, X86ISD::CMPM,
|
|
|
|
X86ISD::CMPM_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cmp_q_128, CMP_MASK_CC, X86ISD::CMPM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cmp_q_256, CMP_MASK_CC, X86ISD::CMPM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cmp_q_512, CMP_MASK_CC, X86ISD::CMPM, 0),
|
2016-09-21 14:37:54 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cmp_sd, CMP_MASK_SCALAR_CC,
|
|
|
|
X86ISD::FSETCCM, X86ISD::FSETCCM_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cmp_ss, CMP_MASK_SCALAR_CC,
|
|
|
|
X86ISD::FSETCCM, X86ISD::FSETCCM_RND),
|
2015-05-07 19:24:42 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cmp_w_128, CMP_MASK_CC, X86ISD::CMPM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cmp_w_256, CMP_MASK_CC, X86ISD::CMPM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cmp_w_512, CMP_MASK_CC, X86ISD::CMPM, 0),
|
2014-12-15 18:03:52 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_compress_d_128, COMPRESS_EXPAND_IN_REG,
|
2014-12-11 23:02:24 +08:00
|
|
|
X86ISD::COMPRESS, 0),
|
2014-12-15 18:03:52 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_compress_d_256, COMPRESS_EXPAND_IN_REG,
|
2014-12-11 23:02:24 +08:00
|
|
|
X86ISD::COMPRESS, 0),
|
2014-12-15 18:03:52 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_compress_d_512, COMPRESS_EXPAND_IN_REG,
|
2014-12-11 23:02:24 +08:00
|
|
|
X86ISD::COMPRESS, 0),
|
2014-12-15 18:03:52 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_compress_pd_128, COMPRESS_EXPAND_IN_REG,
|
2014-12-11 23:02:24 +08:00
|
|
|
X86ISD::COMPRESS, 0),
|
2014-12-15 18:03:52 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_compress_pd_256, COMPRESS_EXPAND_IN_REG,
|
2014-12-11 23:02:24 +08:00
|
|
|
X86ISD::COMPRESS, 0),
|
2014-12-15 18:03:52 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_compress_pd_512, COMPRESS_EXPAND_IN_REG,
|
2014-12-11 23:02:24 +08:00
|
|
|
X86ISD::COMPRESS, 0),
|
2014-12-15 18:03:52 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_compress_ps_128, COMPRESS_EXPAND_IN_REG,
|
2014-12-11 23:02:24 +08:00
|
|
|
X86ISD::COMPRESS, 0),
|
2014-12-15 18:03:52 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_compress_ps_256, COMPRESS_EXPAND_IN_REG,
|
2014-12-11 23:02:24 +08:00
|
|
|
X86ISD::COMPRESS, 0),
|
2014-12-15 18:03:52 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_compress_ps_512, COMPRESS_EXPAND_IN_REG,
|
2014-12-11 23:02:24 +08:00
|
|
|
X86ISD::COMPRESS, 0),
|
2014-12-15 18:03:52 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_compress_q_128, COMPRESS_EXPAND_IN_REG,
|
2014-12-11 23:02:24 +08:00
|
|
|
X86ISD::COMPRESS, 0),
|
2014-12-15 18:03:52 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_compress_q_256, COMPRESS_EXPAND_IN_REG,
|
2014-12-11 23:02:24 +08:00
|
|
|
X86ISD::COMPRESS, 0),
|
2014-12-15 18:03:52 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_compress_q_512, COMPRESS_EXPAND_IN_REG,
|
2014-12-11 23:02:24 +08:00
|
|
|
X86ISD::COMPRESS, 0),
|
2015-09-03 17:05:31 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_conflict_d_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::CONFLICT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_conflict_d_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::CONFLICT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_conflict_d_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::CONFLICT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_conflict_q_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::CONFLICT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_conflict_q_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::CONFLICT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_conflict_q_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::CONFLICT, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtdq2ps_128, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::SINT_TO_FP, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtdq2ps_256, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::SINT_TO_FP, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtdq2ps_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
ISD::SINT_TO_FP, X86ISD::SINT_TO_FP_RND), //er
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtpd2dq_128, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2SI, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtpd2dq_256, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2SI, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtpd2dq_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2SI, X86ISD::CVTP2SI_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtpd2ps, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VFPROUND, 0),
|
2016-11-06 12:12:46 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtpd2ps_256, CVTPD2PS_MASK,
|
2015-07-22 16:56:00 +08:00
|
|
|
ISD::FP_ROUND, 0),
|
2016-11-06 12:12:46 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtpd2ps_512, CVTPD2PS_MASK,
|
2016-09-23 14:24:43 +08:00
|
|
|
ISD::FP_ROUND, X86ISD::VFPROUND_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtpd2qq_128, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2SI, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtpd2qq_256, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2SI, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtpd2qq_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2SI, X86ISD::CVTP2SI_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtpd2udq_128, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2UI, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtpd2udq_256, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2UI, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtpd2udq_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2UI, X86ISD::CVTP2UI_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtpd2uqq_128, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2UI, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtpd2uqq_256, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2UI, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtpd2uqq_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2UI, X86ISD::CVTP2UI_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtps2dq_128, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2SI, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtps2dq_256, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2SI, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtps2dq_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2SI, X86ISD::CVTP2SI_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtps2pd_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VFPEXT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtps2pd_256, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::FP_EXTEND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtps2pd_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:43 +08:00
|
|
|
ISD::FP_EXTEND, X86ISD::VFPEXT_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtps2qq_128, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2SI, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtps2qq_256, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2SI, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtps2qq_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2SI, X86ISD::CVTP2SI_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtps2udq_128, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2UI, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtps2udq_256, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2UI, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtps2udq_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2UI, X86ISD::CVTP2UI_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtps2uqq_128, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2UI, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtps2uqq_256, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2UI, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtps2uqq_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
X86ISD::CVTP2UI, X86ISD::CVTP2UI_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtqq2pd_128, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::SINT_TO_FP, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtqq2pd_256, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::SINT_TO_FP, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtqq2pd_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
ISD::SINT_TO_FP, X86ISD::SINT_TO_FP_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtqq2ps_128, INTR_TYPE_1OP_MASK,
|
2016-11-24 20:13:46 +08:00
|
|
|
X86ISD::CVTSI2P, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtqq2ps_256, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::SINT_TO_FP, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtqq2ps_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
ISD::SINT_TO_FP, X86ISD::SINT_TO_FP_RND),
|
2015-09-20 22:31:19 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtsd2ss_round, INTR_TYPE_SCALAR_MASK_RM,
|
2016-09-23 14:24:43 +08:00
|
|
|
X86ISD::VFPROUNDS_RND, 0),
|
2015-10-29 10:33:05 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtss2sd_round, INTR_TYPE_SCALAR_MASK_RM,
|
2016-09-23 14:24:43 +08:00
|
|
|
X86ISD::VFPEXTS_RND, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttpd2dq_128, INTR_TYPE_1OP_MASK,
|
2016-11-24 20:13:46 +08:00
|
|
|
X86ISD::CVTTP2SI, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttpd2dq_256, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::FP_TO_SINT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttpd2dq_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
ISD::FP_TO_SINT, X86ISD::CVTTP2SI_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttpd2qq_128, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::FP_TO_SINT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttpd2qq_256, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::FP_TO_SINT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttpd2qq_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
ISD::FP_TO_SINT, X86ISD::CVTTP2SI_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttpd2udq_128, INTR_TYPE_1OP_MASK,
|
2016-11-24 20:13:46 +08:00
|
|
|
X86ISD::CVTTP2UI, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttpd2udq_256, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::FP_TO_UINT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttpd2udq_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
ISD::FP_TO_UINT, X86ISD::CVTTP2UI_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttpd2uqq_128, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::FP_TO_UINT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttpd2uqq_256, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::FP_TO_UINT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttpd2uqq_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
ISD::FP_TO_UINT, X86ISD::CVTTP2UI_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttps2dq_128, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::FP_TO_SINT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttps2dq_256, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::FP_TO_SINT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttps2dq_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
ISD::FP_TO_SINT, X86ISD::CVTTP2SI_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttps2qq_128, INTR_TYPE_1OP_MASK,
|
2016-12-10 14:02:48 +08:00
|
|
|
X86ISD::CVTTP2SI, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttps2qq_256, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::FP_TO_SINT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttps2qq_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
ISD::FP_TO_SINT, X86ISD::CVTTP2SI_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttps2udq_128, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::FP_TO_UINT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttps2udq_256, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::FP_TO_UINT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttps2udq_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
ISD::FP_TO_UINT, X86ISD::CVTTP2UI_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttps2uqq_128, INTR_TYPE_1OP_MASK,
|
2016-12-10 14:02:48 +08:00
|
|
|
X86ISD::CVTTP2UI, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttps2uqq_256, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::FP_TO_UINT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvttps2uqq_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
ISD::FP_TO_UINT, X86ISD::CVTTP2UI_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtudq2ps_128, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::UINT_TO_FP, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtudq2ps_256, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::UINT_TO_FP, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtudq2ps_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
ISD::UINT_TO_FP, X86ISD::UINT_TO_FP_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtuqq2pd_128, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::UINT_TO_FP, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtuqq2pd_256, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::UINT_TO_FP, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtuqq2pd_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
ISD::UINT_TO_FP, X86ISD::UINT_TO_FP_RND),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtuqq2ps_128, INTR_TYPE_1OP_MASK,
|
2016-11-24 20:13:46 +08:00
|
|
|
X86ISD::CVTUI2P, 0),
|
2015-07-22 16:56:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtuqq2ps_256, INTR_TYPE_1OP_MASK,
|
|
|
|
ISD::UINT_TO_FP, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_cvtuqq2ps_512, INTR_TYPE_1OP_MASK,
|
2016-09-23 14:24:39 +08:00
|
|
|
ISD::UINT_TO_FP, X86ISD::UINT_TO_FP_RND),
|
2015-08-31 21:09:30 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_dbpsadbw_128, INTR_TYPE_3OP_IMM8_MASK,
|
|
|
|
X86ISD::DBPSADBW, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_dbpsadbw_256, INTR_TYPE_3OP_IMM8_MASK,
|
|
|
|
X86ISD::DBPSADBW, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_dbpsadbw_512, INTR_TYPE_3OP_IMM8_MASK,
|
|
|
|
X86ISD::DBPSADBW, 0),
|
2015-02-18 15:59:20 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_div_pd_512, INTR_TYPE_2OP_MASK, ISD::FDIV,
|
|
|
|
X86ISD::FDIV_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_div_ps_512, INTR_TYPE_2OP_MASK, ISD::FDIV,
|
|
|
|
X86ISD::FDIV_RND),
|
2016-09-25 09:03:10 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_div_sd_round, INTR_TYPE_SCALAR_MASK_RM,
|
|
|
|
X86ISD::FDIV_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_div_ss_round, INTR_TYPE_SCALAR_MASK_RM,
|
|
|
|
X86ISD::FDIV_RND, 0),
|
2014-12-15 18:03:52 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_expand_d_128, COMPRESS_EXPAND_IN_REG,
|
|
|
|
X86ISD::EXPAND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_expand_d_256, COMPRESS_EXPAND_IN_REG,
|
|
|
|
X86ISD::EXPAND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_expand_d_512, COMPRESS_EXPAND_IN_REG,
|
|
|
|
X86ISD::EXPAND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_expand_pd_128, COMPRESS_EXPAND_IN_REG,
|
|
|
|
X86ISD::EXPAND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_expand_pd_256, COMPRESS_EXPAND_IN_REG,
|
|
|
|
X86ISD::EXPAND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_expand_pd_512, COMPRESS_EXPAND_IN_REG,
|
|
|
|
X86ISD::EXPAND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_expand_ps_128, COMPRESS_EXPAND_IN_REG,
|
|
|
|
X86ISD::EXPAND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_expand_ps_256, COMPRESS_EXPAND_IN_REG,
|
|
|
|
X86ISD::EXPAND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_expand_ps_512, COMPRESS_EXPAND_IN_REG,
|
|
|
|
X86ISD::EXPAND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_expand_q_128, COMPRESS_EXPAND_IN_REG,
|
|
|
|
X86ISD::EXPAND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_expand_q_256, COMPRESS_EXPAND_IN_REG,
|
|
|
|
X86ISD::EXPAND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_expand_q_512, COMPRESS_EXPAND_IN_REG,
|
|
|
|
X86ISD::EXPAND, 0),
|
2016-01-19 22:21:39 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_fixupimm_pd_128, FIXUPIMM, X86ISD::VFIXUPIMM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_fixupimm_pd_256, FIXUPIMM, X86ISD::VFIXUPIMM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_fixupimm_pd_512, FIXUPIMM, X86ISD::VFIXUPIMM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_fixupimm_ps_128, FIXUPIMM, X86ISD::VFIXUPIMM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_fixupimm_ps_256, FIXUPIMM, X86ISD::VFIXUPIMM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_fixupimm_ps_512, FIXUPIMM, X86ISD::VFIXUPIMM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_fixupimm_sd, FIXUPIMMS, X86ISD::VFIXUPIMMS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_fixupimm_ss, FIXUPIMMS, X86ISD::VFIXUPIMMS, 0),
|
2015-10-19 21:05:25 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_fpclass_pd_128, FPCLASS, X86ISD::VFPCLASS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_fpclass_pd_256, FPCLASS, X86ISD::VFPCLASS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_fpclass_pd_512, FPCLASS, X86ISD::VFPCLASS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_fpclass_ps_128, FPCLASS, X86ISD::VFPCLASS, 0),
|
2015-09-23 16:48:33 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_fpclass_ps_256, FPCLASS, X86ISD::VFPCLASS, 0),
|
2015-10-19 21:05:25 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_fpclass_ps_512, FPCLASS, X86ISD::VFPCLASS, 0),
|
2015-11-27 03:41:34 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_fpclass_sd, FPCLASSS, X86ISD::VFPCLASSS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_fpclass_ss, FPCLASSS, X86ISD::VFPCLASSS, 0),
|
2015-09-23 16:48:33 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_getexp_pd_128, INTR_TYPE_1OP_MASK_RM,
|
2015-06-03 21:41:48 +08:00
|
|
|
X86ISD::FGETEXP_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_getexp_pd_256, INTR_TYPE_1OP_MASK_RM,
|
|
|
|
X86ISD::FGETEXP_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_getexp_pd_512, INTR_TYPE_1OP_MASK_RM,
|
|
|
|
X86ISD::FGETEXP_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_getexp_ps_128, INTR_TYPE_1OP_MASK_RM,
|
|
|
|
X86ISD::FGETEXP_RND, 0),
|
2015-06-29 12:50:09 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_getexp_ps_256, INTR_TYPE_1OP_MASK_RM,
|
2015-06-03 21:41:48 +08:00
|
|
|
X86ISD::FGETEXP_RND, 0),
|
2015-06-29 12:50:09 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_getexp_ps_512, INTR_TYPE_1OP_MASK_RM,
|
2015-06-03 21:41:48 +08:00
|
|
|
X86ISD::FGETEXP_RND, 0),
|
2015-07-28 14:53:28 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_getexp_sd, INTR_TYPE_SCALAR_MASK_RM,
|
2016-09-23 14:24:35 +08:00
|
|
|
X86ISD::FGETEXPS_RND, 0),
|
2015-07-28 14:53:28 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_getexp_ss, INTR_TYPE_SCALAR_MASK_RM,
|
2016-09-23 14:24:35 +08:00
|
|
|
X86ISD::FGETEXPS_RND, 0),
|
2015-09-02 19:18:55 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_getmant_pd_128, INTR_TYPE_2OP_MASK_RM,
|
|
|
|
X86ISD::VGETMANT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_getmant_pd_256, INTR_TYPE_2OP_MASK_RM,
|
|
|
|
X86ISD::VGETMANT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_getmant_pd_512, INTR_TYPE_2OP_MASK_RM,
|
|
|
|
X86ISD::VGETMANT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_getmant_ps_128, INTR_TYPE_2OP_MASK_RM,
|
|
|
|
X86ISD::VGETMANT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_getmant_ps_256, INTR_TYPE_2OP_MASK_RM,
|
|
|
|
X86ISD::VGETMANT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_getmant_ps_512, INTR_TYPE_2OP_MASK_RM,
|
|
|
|
X86ISD::VGETMANT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_getmant_sd, INTR_TYPE_3OP_SCALAR_MASK_RM,
|
2016-09-23 14:24:35 +08:00
|
|
|
X86ISD::VGETMANTS, 0),
|
2015-09-02 19:18:55 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_getmant_ss, INTR_TYPE_3OP_SCALAR_MASK_RM,
|
2016-09-23 14:24:35 +08:00
|
|
|
X86ISD::VGETMANTS, 0),
|
2015-05-11 14:05:05 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_max_pd_512, INTR_TYPE_2OP_MASK, X86ISD::FMAX,
|
|
|
|
X86ISD::FMAX_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_max_ps_512, INTR_TYPE_2OP_MASK, X86ISD::FMAX,
|
2015-06-29 12:50:09 +08:00
|
|
|
X86ISD::FMAX_RND),
|
2017-02-22 14:54:18 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_max_sd_round, INTR_TYPE_SCALAR_MASK,
|
|
|
|
X86ISD::FMAXS, X86ISD::FMAX_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_max_ss_round, INTR_TYPE_SCALAR_MASK,
|
|
|
|
X86ISD::FMAXS, X86ISD::FMAX_RND),
|
2015-05-11 14:05:05 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_min_pd_512, INTR_TYPE_2OP_MASK, X86ISD::FMIN,
|
|
|
|
X86ISD::FMIN_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_min_ps_512, INTR_TYPE_2OP_MASK, X86ISD::FMIN,
|
2015-06-29 12:50:09 +08:00
|
|
|
X86ISD::FMIN_RND),
|
2017-02-22 14:54:18 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_min_sd_round, INTR_TYPE_SCALAR_MASK,
|
|
|
|
X86ISD::FMINS, X86ISD::FMIN_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_min_ss_round, INTR_TYPE_SCALAR_MASK,
|
|
|
|
X86ISD::FMINS, X86ISD::FMIN_RND),
|
2015-02-18 15:59:20 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_mul_pd_512, INTR_TYPE_2OP_MASK, ISD::FMUL,
|
|
|
|
X86ISD::FMUL_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_mul_ps_512, INTR_TYPE_2OP_MASK, ISD::FMUL,
|
|
|
|
X86ISD::FMUL_RND),
|
2016-09-25 09:03:10 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_mul_sd_round, INTR_TYPE_SCALAR_MASK_RM,
|
|
|
|
X86ISD::FMUL_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_mul_ss_round, INTR_TYPE_SCALAR_MASK_RM,
|
|
|
|
X86ISD::FMUL_RND, 0),
|
2015-06-23 16:19:46 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pabs_b_128, INTR_TYPE_1OP_MASK, X86ISD::ABS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pabs_b_256, INTR_TYPE_1OP_MASK, X86ISD::ABS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pabs_b_512, INTR_TYPE_1OP_MASK, X86ISD::ABS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pabs_d_128, INTR_TYPE_1OP_MASK, X86ISD::ABS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pabs_d_256, INTR_TYPE_1OP_MASK, X86ISD::ABS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pabs_d_512, INTR_TYPE_1OP_MASK, X86ISD::ABS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pabs_q_128, INTR_TYPE_1OP_MASK, X86ISD::ABS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pabs_q_256, INTR_TYPE_1OP_MASK, X86ISD::ABS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pabs_q_512, INTR_TYPE_1OP_MASK, X86ISD::ABS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pabs_w_128, INTR_TYPE_1OP_MASK, X86ISD::ABS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pabs_w_256, INTR_TYPE_1OP_MASK, X86ISD::ABS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pabs_w_512, INTR_TYPE_1OP_MASK, X86ISD::ABS, 0),
|
2015-05-04 20:35:55 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_padds_b_128, INTR_TYPE_2OP_MASK, X86ISD::ADDS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_padds_b_256, INTR_TYPE_2OP_MASK, X86ISD::ADDS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_padds_b_512, INTR_TYPE_2OP_MASK, X86ISD::ADDS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_padds_w_128, INTR_TYPE_2OP_MASK, X86ISD::ADDS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_padds_w_256, INTR_TYPE_2OP_MASK, X86ISD::ADDS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_padds_w_512, INTR_TYPE_2OP_MASK, X86ISD::ADDS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_paddus_b_128, INTR_TYPE_2OP_MASK, X86ISD::ADDUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_paddus_b_256, INTR_TYPE_2OP_MASK, X86ISD::ADDUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_paddus_b_512, INTR_TYPE_2OP_MASK, X86ISD::ADDUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_paddus_w_128, INTR_TYPE_2OP_MASK, X86ISD::ADDUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_paddus_w_256, INTR_TYPE_2OP_MASK, X86ISD::ADDUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_paddus_w_512, INTR_TYPE_2OP_MASK, X86ISD::ADDUS, 0),
|
2015-06-18 20:30:53 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pavg_b_128, INTR_TYPE_2OP_MASK, X86ISD::AVG, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pavg_b_256, INTR_TYPE_2OP_MASK, X86ISD::AVG, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pavg_b_512, INTR_TYPE_2OP_MASK, X86ISD::AVG, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pavg_w_128, INTR_TYPE_2OP_MASK, X86ISD::AVG, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pavg_w_256, INTR_TYPE_2OP_MASK, X86ISD::AVG, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pavg_w_512, INTR_TYPE_2OP_MASK, X86ISD::AVG, 0),
|
2016-02-07 16:30:50 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pbroadcast_b_gpr_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VBROADCAST, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pbroadcast_b_gpr_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VBROADCAST, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pbroadcast_b_gpr_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VBROADCAST, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pbroadcast_d_gpr_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VBROADCAST, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pbroadcast_d_gpr_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VBROADCAST, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pbroadcast_d_gpr_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VBROADCAST, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pbroadcast_q_gpr_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VBROADCAST, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pbroadcast_q_gpr_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VBROADCAST, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pbroadcast_q_gpr_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VBROADCAST, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pbroadcast_w_gpr_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VBROADCAST, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pbroadcast_w_gpr_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VBROADCAST, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pbroadcast_w_gpr_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VBROADCAST, 0),
|
2016-05-24 19:06:22 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_permvar_df_256, VPERM_2OP_MASK,
|
|
|
|
X86ISD::VPERMV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_permvar_df_512, VPERM_2OP_MASK,
|
|
|
|
X86ISD::VPERMV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_permvar_di_256, VPERM_2OP_MASK,
|
|
|
|
X86ISD::VPERMV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_permvar_di_512, VPERM_2OP_MASK,
|
|
|
|
X86ISD::VPERMV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_permvar_hi_128, VPERM_2OP_MASK,
|
|
|
|
X86ISD::VPERMV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_permvar_hi_256, VPERM_2OP_MASK,
|
|
|
|
X86ISD::VPERMV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_permvar_hi_512, VPERM_2OP_MASK,
|
|
|
|
X86ISD::VPERMV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_permvar_qi_128, VPERM_2OP_MASK,
|
|
|
|
X86ISD::VPERMV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_permvar_qi_256, VPERM_2OP_MASK,
|
|
|
|
X86ISD::VPERMV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_permvar_qi_512, VPERM_2OP_MASK,
|
|
|
|
X86ISD::VPERMV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_permvar_sf_256, VPERM_2OP_MASK,
|
|
|
|
X86ISD::VPERMV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_permvar_sf_512, VPERM_2OP_MASK,
|
|
|
|
X86ISD::VPERMV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_permvar_si_256, VPERM_2OP_MASK,
|
|
|
|
X86ISD::VPERMV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_permvar_si_512, VPERM_2OP_MASK,
|
|
|
|
X86ISD::VPERMV, 0),
|
2015-07-21 15:11:28 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmaddubs_w_128, INTR_TYPE_2OP_MASK,
|
|
|
|
X86ISD::VPMADDUBSW, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmaddubs_w_256, INTR_TYPE_2OP_MASK,
|
|
|
|
X86ISD::VPMADDUBSW, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmaddubs_w_512, INTR_TYPE_2OP_MASK,
|
|
|
|
X86ISD::VPMADDUBSW, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmaddw_d_128, INTR_TYPE_2OP_MASK,
|
|
|
|
X86ISD::VPMADDWD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmaddw_d_256, INTR_TYPE_2OP_MASK,
|
|
|
|
X86ISD::VPMADDWD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmaddw_d_512, INTR_TYPE_2OP_MASK,
|
|
|
|
X86ISD::VPMADDWD, 0),
|
2015-07-25 01:24:15 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmov_db_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNC, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmov_db_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNC, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmov_db_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNC, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmov_dw_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNC, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmov_dw_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNC, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmov_dw_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNC, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmov_qb_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNC, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmov_qb_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNC, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmov_qb_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNC, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmov_qd_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNC, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmov_qd_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNC, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmov_qd_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNC, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmov_qw_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNC, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmov_qw_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNC, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmov_qw_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNC, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmov_wb_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNC, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmov_wb_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNC, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmov_wb_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNC, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_db_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_db_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_db_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_dw_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_dw_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_dw_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_qb_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_qb_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_qb_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_qd_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_qd_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_qd_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_qw_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_qw_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_qw_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_wb_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_wb_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovs_wb_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_db_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_db_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_db_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_dw_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_dw_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_dw_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_qb_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_qb_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_qb_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_qd_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_qd_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_qd_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_qw_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_qw_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_qw_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_wb_128, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_wb_256, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmovus_wb_512, INTR_TYPE_1OP_MASK,
|
|
|
|
X86ISD::VTRUNCUS, 0),
|
2015-07-06 22:03:40 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmul_hr_sw_128, INTR_TYPE_2OP_MASK, X86ISD::MULHRS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmul_hr_sw_256, INTR_TYPE_2OP_MASK, X86ISD::MULHRS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmul_hr_sw_512, INTR_TYPE_2OP_MASK, X86ISD::MULHRS, 0),
|
2015-07-05 20:23:20 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmulh_w_128, INTR_TYPE_2OP_MASK, ISD::MULHS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmulh_w_256, INTR_TYPE_2OP_MASK, ISD::MULHS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmulh_w_512, INTR_TYPE_2OP_MASK, ISD::MULHS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmulhu_w_128, INTR_TYPE_2OP_MASK, ISD::MULHU, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmulhu_w_256, INTR_TYPE_2OP_MASK, ISD::MULHU, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmulhu_w_512, INTR_TYPE_2OP_MASK, ISD::MULHU, 0),
|
2016-02-01 23:48:21 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmultishift_qb_128, INTR_TYPE_2OP_MASK,
|
|
|
|
X86ISD::MULTISHIFT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmultishift_qb_256, INTR_TYPE_2OP_MASK,
|
|
|
|
X86ISD::MULTISHIFT, 0),
|
2016-02-27 19:49:16 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pmultishift_qb_512, INTR_TYPE_2OP_MASK,
|
2016-02-01 23:48:21 +08:00
|
|
|
X86ISD::MULTISHIFT, 0),
|
2016-02-08 23:13:32 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_prol_d_128, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VROTLI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_prol_d_256, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VROTLI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_prol_d_512, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VROTLI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_prol_q_128, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VROTLI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_prol_q_256, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VROTLI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_prol_q_512, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VROTLI, 0),
|
2016-01-13 20:39:33 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_prolv_d_128, INTR_TYPE_2OP_MASK, ISD::ROTL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_prolv_d_256, INTR_TYPE_2OP_MASK, ISD::ROTL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_prolv_d_512, INTR_TYPE_2OP_MASK, ISD::ROTL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_prolv_q_128, INTR_TYPE_2OP_MASK, ISD::ROTL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_prolv_q_256, INTR_TYPE_2OP_MASK, ISD::ROTL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_prolv_q_512, INTR_TYPE_2OP_MASK, ISD::ROTL, 0),
|
2016-02-18 17:52:12 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pror_d_128, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VROTRI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pror_d_256, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VROTRI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pror_d_512, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VROTRI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pror_q_128, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VROTRI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pror_q_256, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VROTRI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pror_q_512, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VROTRI, 0),
|
2016-01-10 17:16:41 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_prorv_d_128, INTR_TYPE_2OP_MASK, ISD::ROTR, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_prorv_d_256, INTR_TYPE_2OP_MASK, ISD::ROTR, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_prorv_d_512, INTR_TYPE_2OP_MASK, ISD::ROTR, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_prorv_q_128, INTR_TYPE_2OP_MASK, ISD::ROTR, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_prorv_q_256, INTR_TYPE_2OP_MASK, ISD::ROTR, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_prorv_q_512, INTR_TYPE_2OP_MASK, ISD::ROTR, 0),
|
2015-05-04 20:35:55 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_psubs_b_128, INTR_TYPE_2OP_MASK, X86ISD::SUBS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_psubs_b_256, INTR_TYPE_2OP_MASK, X86ISD::SUBS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_psubs_b_512, INTR_TYPE_2OP_MASK, X86ISD::SUBS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_psubs_w_128, INTR_TYPE_2OP_MASK, X86ISD::SUBS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_psubs_w_256, INTR_TYPE_2OP_MASK, X86ISD::SUBS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_psubs_w_512, INTR_TYPE_2OP_MASK, X86ISD::SUBS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_psubus_b_128, INTR_TYPE_2OP_MASK, X86ISD::SUBUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_psubus_b_256, INTR_TYPE_2OP_MASK, X86ISD::SUBUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_psubus_b_512, INTR_TYPE_2OP_MASK, X86ISD::SUBUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_psubus_w_128, INTR_TYPE_2OP_MASK, X86ISD::SUBUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_psubus_w_256, INTR_TYPE_2OP_MASK, X86ISD::SUBUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_psubus_w_512, INTR_TYPE_2OP_MASK, X86ISD::SUBUS, 0),
|
2015-10-15 20:33:24 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pternlog_d_128, TERLOG_OP_MASK,
|
|
|
|
X86ISD::VPTERNLOG, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pternlog_d_256, TERLOG_OP_MASK,
|
|
|
|
X86ISD::VPTERNLOG, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pternlog_d_512, TERLOG_OP_MASK,
|
|
|
|
X86ISD::VPTERNLOG, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pternlog_q_128, TERLOG_OP_MASK,
|
|
|
|
X86ISD::VPTERNLOG, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pternlog_q_256, TERLOG_OP_MASK,
|
|
|
|
X86ISD::VPTERNLOG, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_pternlog_q_512, TERLOG_OP_MASK,
|
|
|
|
X86ISD::VPTERNLOG, 0),
|
2015-07-22 20:00:43 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_range_pd_128, INTR_TYPE_3OP_MASK_RM, X86ISD::VRANGE, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_range_pd_256, INTR_TYPE_3OP_MASK_RM, X86ISD::VRANGE, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_range_pd_512, INTR_TYPE_3OP_MASK_RM, X86ISD::VRANGE, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_range_ps_128, INTR_TYPE_3OP_MASK_RM, X86ISD::VRANGE, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_range_ps_256, INTR_TYPE_3OP_MASK_RM, X86ISD::VRANGE, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_range_ps_512, INTR_TYPE_3OP_MASK_RM, X86ISD::VRANGE, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_range_sd, INTR_TYPE_SCALAR_MASK_RM, X86ISD::VRANGE, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_range_ss, INTR_TYPE_SCALAR_MASK_RM, X86ISD::VRANGE, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_reduce_pd_128, INTR_TYPE_2OP_MASK_RM, X86ISD::VREDUCE, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_reduce_pd_256, INTR_TYPE_2OP_MASK_RM, X86ISD::VREDUCE, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_reduce_pd_512, INTR_TYPE_2OP_MASK_RM, X86ISD::VREDUCE, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_reduce_ps_128, INTR_TYPE_2OP_MASK_RM, X86ISD::VREDUCE, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_reduce_ps_256, INTR_TYPE_2OP_MASK_RM, X86ISD::VREDUCE, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_reduce_ps_512, INTR_TYPE_2OP_MASK_RM, X86ISD::VREDUCE, 0),
|
2016-09-23 14:24:35 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_reduce_sd, INTR_TYPE_SCALAR_MASK_RM, X86ISD::VREDUCES, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_reduce_ss, INTR_TYPE_SCALAR_MASK_RM, X86ISD::VREDUCES, 0),
|
2015-07-22 20:00:43 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_rndscale_pd_128, INTR_TYPE_2OP_MASK_RM, X86ISD::VRNDSCALE, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_rndscale_pd_256, INTR_TYPE_2OP_MASK_RM, X86ISD::VRNDSCALE, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_rndscale_pd_512, INTR_TYPE_2OP_MASK_RM, X86ISD::VRNDSCALE, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_rndscale_ps_128, INTR_TYPE_2OP_MASK_RM, X86ISD::VRNDSCALE, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_rndscale_ps_256, INTR_TYPE_2OP_MASK_RM, X86ISD::VRNDSCALE, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_rndscale_ps_512, INTR_TYPE_2OP_MASK_RM, X86ISD::VRNDSCALE, 0),
|
2015-02-23 23:12:31 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_rndscale_sd, INTR_TYPE_SCALAR_MASK_RM,
|
2016-09-23 14:24:35 +08:00
|
|
|
X86ISD::VRNDSCALES, 0),
|
2015-02-23 23:12:31 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_rndscale_ss, INTR_TYPE_SCALAR_MASK_RM,
|
2016-09-23 14:24:35 +08:00
|
|
|
X86ISD::VRNDSCALES, 0),
|
2015-06-29 12:50:09 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_scalef_pd_128, INTR_TYPE_2OP_MASK_RM,
|
|
|
|
X86ISD::SCALEF, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_scalef_pd_256, INTR_TYPE_2OP_MASK_RM,
|
|
|
|
X86ISD::SCALEF, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_scalef_pd_512, INTR_TYPE_2OP_MASK_RM,
|
|
|
|
X86ISD::SCALEF, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_scalef_ps_128, INTR_TYPE_2OP_MASK_RM,
|
|
|
|
X86ISD::SCALEF, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_scalef_ps_256, INTR_TYPE_2OP_MASK_RM,
|
|
|
|
X86ISD::SCALEF, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_scalef_ps_512, INTR_TYPE_2OP_MASK_RM,
|
2015-06-28 22:30:39 +08:00
|
|
|
X86ISD::SCALEF, 0),
|
2015-07-22 20:00:43 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_scalef_sd, INTR_TYPE_SCALAR_MASK_RM,
|
2016-05-21 19:09:53 +08:00
|
|
|
X86ISD::SCALEFS, 0),
|
2015-07-22 20:00:43 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_scalef_ss, INTR_TYPE_SCALAR_MASK_RM,
|
2016-05-21 19:09:53 +08:00
|
|
|
X86ISD::SCALEFS, 0),
|
2015-09-20 15:18:53 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_shuf_f32x4, INTR_TYPE_3OP_IMM8_MASK,
|
|
|
|
X86ISD::SHUF128, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_shuf_f32x4_256, INTR_TYPE_3OP_IMM8_MASK,
|
|
|
|
X86ISD::SHUF128, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_shuf_f64x2, INTR_TYPE_3OP_IMM8_MASK,
|
|
|
|
X86ISD::SHUF128, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_shuf_f64x2_256, INTR_TYPE_3OP_IMM8_MASK,
|
|
|
|
X86ISD::SHUF128, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_shuf_i32x4, INTR_TYPE_3OP_IMM8_MASK,
|
|
|
|
X86ISD::SHUF128, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_shuf_i32x4_256, INTR_TYPE_3OP_IMM8_MASK,
|
|
|
|
X86ISD::SHUF128, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_shuf_i64x2, INTR_TYPE_3OP_IMM8_MASK,
|
|
|
|
X86ISD::SHUF128, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_shuf_i64x2_256, INTR_TYPE_3OP_IMM8_MASK,
|
|
|
|
X86ISD::SHUF128, 0),
|
2015-06-03 21:41:48 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_sqrt_pd_128, INTR_TYPE_1OP_MASK, ISD::FSQRT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_sqrt_pd_256, INTR_TYPE_1OP_MASK, ISD::FSQRT, 0),
|
2016-09-19 05:49:28 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_sqrt_pd_512, INTR_TYPE_1OP_MASK, ISD::FSQRT,
|
2015-06-03 21:41:48 +08:00
|
|
|
X86ISD::FSQRT_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_sqrt_ps_128, INTR_TYPE_1OP_MASK, ISD::FSQRT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_sqrt_ps_256, INTR_TYPE_1OP_MASK, ISD::FSQRT, 0),
|
2016-09-19 05:49:28 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_sqrt_ps_512, INTR_TYPE_1OP_MASK, ISD::FSQRT,
|
2015-06-03 21:41:48 +08:00
|
|
|
X86ISD::FSQRT_RND),
|
2015-09-20 17:13:41 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_sqrt_sd, INTR_TYPE_SCALAR_MASK_RM,
|
2016-09-23 14:24:35 +08:00
|
|
|
X86ISD::FSQRTS_RND, 0),
|
2015-09-20 17:13:41 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_sqrt_ss, INTR_TYPE_SCALAR_MASK_RM,
|
2016-09-23 14:24:35 +08:00
|
|
|
X86ISD::FSQRTS_RND, 0),
|
2015-02-18 15:59:20 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_sub_pd_512, INTR_TYPE_2OP_MASK, ISD::FSUB,
|
|
|
|
X86ISD::FSUB_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_sub_ps_512, INTR_TYPE_2OP_MASK, ISD::FSUB,
|
|
|
|
X86ISD::FSUB_RND),
|
2016-09-25 09:03:10 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_sub_sd_round, INTR_TYPE_SCALAR_MASK_RM,
|
|
|
|
X86ISD::FSUB_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_sub_ss_round, INTR_TYPE_SCALAR_MASK_RM,
|
|
|
|
X86ISD::FSUB_RND, 0),
|
2014-10-08 23:49:26 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_ucmp_b_128, CMP_MASK_CC, X86ISD::CMPMU, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_ucmp_b_256, CMP_MASK_CC, X86ISD::CMPMU, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_ucmp_b_512, CMP_MASK_CC, X86ISD::CMPMU, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_ucmp_d_128, CMP_MASK_CC, X86ISD::CMPMU, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_ucmp_d_256, CMP_MASK_CC, X86ISD::CMPMU, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_ucmp_d_512, CMP_MASK_CC, X86ISD::CMPMU, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_ucmp_q_128, CMP_MASK_CC, X86ISD::CMPMU, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_ucmp_q_256, CMP_MASK_CC, X86ISD::CMPMU, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_ucmp_q_512, CMP_MASK_CC, X86ISD::CMPMU, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_ucmp_w_128, CMP_MASK_CC, X86ISD::CMPMU, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_ucmp_w_256, CMP_MASK_CC, X86ISD::CMPMU, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_ucmp_w_512, CMP_MASK_CC, X86ISD::CMPMU, 0),
|
2015-10-22 22:01:16 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vcvtph2ps_128, INTR_TYPE_1OP_MASK_RM,
|
2016-09-21 10:05:22 +08:00
|
|
|
X86ISD::CVTPH2PS, 0),
|
2015-10-22 22:01:16 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vcvtph2ps_256, INTR_TYPE_1OP_MASK_RM,
|
2016-09-21 10:05:22 +08:00
|
|
|
X86ISD::CVTPH2PS, 0),
|
2015-10-22 22:01:16 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vcvtph2ps_512, INTR_TYPE_1OP_MASK_RM,
|
2016-09-21 10:05:22 +08:00
|
|
|
X86ISD::CVTPH2PS, 0),
|
2016-09-21 11:58:44 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vcvtps2ph_128, INTR_TYPE_2OP_MASK,
|
2016-09-21 10:05:22 +08:00
|
|
|
X86ISD::CVTPS2PH, 0),
|
2016-09-21 11:58:44 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vcvtps2ph_256, INTR_TYPE_2OP_MASK,
|
2016-09-21 10:05:22 +08:00
|
|
|
X86ISD::CVTPS2PH, 0),
|
2016-09-21 11:58:44 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vcvtps2ph_512, INTR_TYPE_2OP_MASK,
|
2016-09-21 10:05:22 +08:00
|
|
|
X86ISD::CVTPS2PH, 0),
|
2015-06-29 17:10:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfmadd_pd_128, FMA_OP_MASK, X86ISD::FMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfmadd_pd_256, FMA_OP_MASK, X86ISD::FMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfmadd_pd_512, FMA_OP_MASK, X86ISD::FMADD,
|
|
|
|
X86ISD::FMADD_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfmadd_ps_128, FMA_OP_MASK, X86ISD::FMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfmadd_ps_256, FMA_OP_MASK, X86ISD::FMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfmadd_ps_512, FMA_OP_MASK, X86ISD::FMADD,
|
|
|
|
X86ISD::FMADD_RND),
|
|
|
|
|
2016-12-09 14:42:28 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfmadd_sd, FMA_OP_SCALAR_MASK, X86ISD::FMADDS1_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfmadd_ss, FMA_OP_SCALAR_MASK, X86ISD::FMADDS1_RND, 0),
|
2015-06-29 17:10:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfmaddsub_pd_128, FMA_OP_MASK, X86ISD::FMADDSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfmaddsub_pd_256, FMA_OP_MASK, X86ISD::FMADDSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfmaddsub_pd_512, FMA_OP_MASK, X86ISD::FMADDSUB,
|
|
|
|
X86ISD::FMADDSUB_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfmaddsub_ps_128, FMA_OP_MASK, X86ISD::FMADDSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfmaddsub_ps_256, FMA_OP_MASK, X86ISD::FMADDSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfmaddsub_ps_512, FMA_OP_MASK, X86ISD::FMADDSUB,
|
|
|
|
X86ISD::FMADDSUB_RND),
|
|
|
|
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfnmadd_pd_128, FMA_OP_MASK, X86ISD::FNMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfnmadd_pd_256, FMA_OP_MASK, X86ISD::FNMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfnmadd_pd_512, FMA_OP_MASK, X86ISD::FNMADD,
|
|
|
|
X86ISD::FNMADD_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfnmadd_ps_128, FMA_OP_MASK, X86ISD::FNMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfnmadd_ps_256, FMA_OP_MASK, X86ISD::FNMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfnmadd_ps_512, FMA_OP_MASK, X86ISD::FNMADD,
|
|
|
|
X86ISD::FNMADD_RND),
|
|
|
|
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfnmsub_pd_128, FMA_OP_MASK, X86ISD::FNMSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfnmsub_pd_256, FMA_OP_MASK, X86ISD::FNMSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfnmsub_pd_512, FMA_OP_MASK, X86ISD::FNMSUB,
|
|
|
|
X86ISD::FNMSUB_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfnmsub_ps_128, FMA_OP_MASK, X86ISD::FNMSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfnmsub_ps_256, FMA_OP_MASK, X86ISD::FNMSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vfnmsub_ps_512, FMA_OP_MASK, X86ISD::FNMSUB,
|
|
|
|
X86ISD::FNMSUB_RND),
|
|
|
|
|
2015-06-22 14:45:48 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermi2var_d_128, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMIV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermi2var_d_256, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMIV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermi2var_d_512, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMIV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermi2var_hi_128, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMIV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermi2var_hi_256, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMIV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermi2var_hi_512, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMIV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermi2var_pd_128, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMIV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermi2var_pd_256, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMIV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermi2var_pd_512, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMIV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermi2var_ps_128, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMIV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermi2var_ps_256, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMIV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermi2var_ps_512, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMIV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermi2var_q_128, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMIV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermi2var_q_256, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMIV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermi2var_q_512, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMIV3, 0),
|
2016-01-21 21:36:01 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermi2var_qi_128, VPERM_3OP_MASK,
|
2016-10-16 12:54:35 +08:00
|
|
|
X86ISD::VPERMIV3, 0),
|
2016-01-21 21:36:01 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermi2var_qi_256, VPERM_3OP_MASK,
|
2016-10-16 12:54:35 +08:00
|
|
|
X86ISD::VPERMIV3, 0),
|
2016-01-21 21:36:01 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermi2var_qi_512, VPERM_3OP_MASK,
|
2016-10-16 12:54:35 +08:00
|
|
|
X86ISD::VPERMIV3, 0),
|
2015-06-22 14:45:48 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermt2var_d_128, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermt2var_d_256, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermt2var_d_512, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermt2var_hi_128, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermt2var_hi_256, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermt2var_hi_512, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermt2var_pd_128, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermt2var_pd_256, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermt2var_pd_512, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermt2var_ps_128, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermt2var_ps_256, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermt2var_ps_512, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermt2var_q_128, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermt2var_q_256, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermt2var_q_512, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMV3, 0),
|
2016-01-21 21:36:01 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermt2var_qi_128, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermt2var_qi_256, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpermt2var_qi_512, VPERM_3OP_MASK,
|
|
|
|
X86ISD::VPERMV3, 0),
|
2016-01-25 19:14:24 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpmadd52h_uq_128 , FMA_OP_MASK,
|
|
|
|
X86ISD::VPMADD52H, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpmadd52h_uq_256 , FMA_OP_MASK,
|
|
|
|
X86ISD::VPMADD52H, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpmadd52h_uq_512 , FMA_OP_MASK,
|
|
|
|
X86ISD::VPMADD52H, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpmadd52l_uq_128 , FMA_OP_MASK,
|
|
|
|
X86ISD::VPMADD52L, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpmadd52l_uq_256 , FMA_OP_MASK,
|
|
|
|
X86ISD::VPMADD52L, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask_vpmadd52l_uq_512 , FMA_OP_MASK,
|
|
|
|
X86ISD::VPMADD52L, 0),
|
2016-01-26 08:55:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmadd_pd_128, FMA_OP_MASK3, X86ISD::FMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmadd_pd_256, FMA_OP_MASK3, X86ISD::FMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmadd_pd_512, FMA_OP_MASK3, X86ISD::FMADD,
|
|
|
|
X86ISD::FMADD_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmadd_ps_128, FMA_OP_MASK3, X86ISD::FMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmadd_ps_256, FMA_OP_MASK3, X86ISD::FMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmadd_ps_512, FMA_OP_MASK3, X86ISD::FMADD,
|
|
|
|
X86ISD::FMADD_RND),
|
|
|
|
|
2016-12-09 14:42:28 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmadd_sd, FMA_OP_SCALAR_MASK3, X86ISD::FMADDS3_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmadd_ss, FMA_OP_SCALAR_MASK3, X86ISD::FMADDS3_RND, 0),
|
2016-01-26 08:55:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmaddsub_pd_128, FMA_OP_MASK3, X86ISD::FMADDSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmaddsub_pd_256, FMA_OP_MASK3, X86ISD::FMADDSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmaddsub_pd_512, FMA_OP_MASK3, X86ISD::FMADDSUB,
|
|
|
|
X86ISD::FMADDSUB_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmaddsub_ps_128, FMA_OP_MASK3, X86ISD::FMADDSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmaddsub_ps_256, FMA_OP_MASK3, X86ISD::FMADDSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmaddsub_ps_512, FMA_OP_MASK3, X86ISD::FMADDSUB,
|
|
|
|
X86ISD::FMADDSUB_RND),
|
|
|
|
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmsub_pd_128, FMA_OP_MASK3, X86ISD::FMSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmsub_pd_256, FMA_OP_MASK3, X86ISD::FMSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmsub_pd_512, FMA_OP_MASK3, X86ISD::FMSUB,
|
|
|
|
X86ISD::FMSUB_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmsub_ps_128, FMA_OP_MASK3, X86ISD::FMSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmsub_ps_256, FMA_OP_MASK3, X86ISD::FMSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmsub_ps_512, FMA_OP_MASK3, X86ISD::FMSUB,
|
|
|
|
X86ISD::FMSUB_RND),
|
2016-12-09 14:42:28 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmsub_sd, FMA_OP_SCALAR_MASK3, X86ISD::FMSUBS3_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmsub_ss, FMA_OP_SCALAR_MASK3, X86ISD::FMSUBS3_RND, 0),
|
2016-01-26 08:55:00 +08:00
|
|
|
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmsubadd_pd_128, FMA_OP_MASK3, X86ISD::FMSUBADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmsubadd_pd_256, FMA_OP_MASK3, X86ISD::FMSUBADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmsubadd_pd_512, FMA_OP_MASK3, X86ISD::FMSUBADD,
|
|
|
|
X86ISD::FMSUBADD_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmsubadd_ps_128, FMA_OP_MASK3, X86ISD::FMSUBADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmsubadd_ps_256, FMA_OP_MASK3, X86ISD::FMSUBADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfmsubadd_ps_512, FMA_OP_MASK3, X86ISD::FMSUBADD,
|
|
|
|
X86ISD::FMSUBADD_RND),
|
|
|
|
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfnmsub_pd_128, FMA_OP_MASK3, X86ISD::FNMSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfnmsub_pd_256, FMA_OP_MASK3, X86ISD::FNMSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfnmsub_pd_512, FMA_OP_MASK3, X86ISD::FNMSUB,
|
|
|
|
X86ISD::FNMSUB_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfnmsub_ps_128, FMA_OP_MASK3, X86ISD::FNMSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfnmsub_ps_256, FMA_OP_MASK3, X86ISD::FNMSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfnmsub_ps_512, FMA_OP_MASK3, X86ISD::FNMSUB,
|
|
|
|
X86ISD::FNMSUB_RND),
|
2016-12-09 14:42:28 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfnmsub_sd, FMA_OP_SCALAR_MASK3, X86ISD::FNMSUBS3_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_mask3_vfnmsub_ss, FMA_OP_SCALAR_MASK3, X86ISD::FNMSUBS3_RND, 0),
|
2016-01-19 22:21:39 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_fixupimm_pd_128, FIXUPIMM_MASKZ,
|
|
|
|
X86ISD::VFIXUPIMM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_fixupimm_pd_256, FIXUPIMM_MASKZ,
|
|
|
|
X86ISD::VFIXUPIMM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_fixupimm_pd_512, FIXUPIMM_MASKZ,
|
|
|
|
X86ISD::VFIXUPIMM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_fixupimm_ps_128, FIXUPIMM_MASKZ,
|
|
|
|
X86ISD::VFIXUPIMM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_fixupimm_ps_256, FIXUPIMM_MASKZ,
|
|
|
|
X86ISD::VFIXUPIMM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_fixupimm_ps_512, FIXUPIMM_MASKZ,
|
|
|
|
X86ISD::VFIXUPIMM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_fixupimm_sd, FIXUPIMMS_MASKZ,
|
|
|
|
X86ISD::VFIXUPIMMS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_fixupimm_ss, FIXUPIMMS_MASKZ,
|
|
|
|
X86ISD::VFIXUPIMMS, 0),
|
2015-10-15 20:33:24 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_pternlog_d_128, TERLOG_OP_MASKZ,
|
|
|
|
X86ISD::VPTERNLOG, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_pternlog_d_256, TERLOG_OP_MASKZ,
|
|
|
|
X86ISD::VPTERNLOG, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_pternlog_d_512, TERLOG_OP_MASKZ,
|
|
|
|
X86ISD::VPTERNLOG, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_pternlog_q_128, TERLOG_OP_MASKZ,
|
|
|
|
X86ISD::VPTERNLOG, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_pternlog_q_256, TERLOG_OP_MASKZ,
|
|
|
|
X86ISD::VPTERNLOG, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_pternlog_q_512, TERLOG_OP_MASKZ,
|
|
|
|
X86ISD::VPTERNLOG, 0),
|
2015-06-29 17:10:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vfmadd_pd_128, FMA_OP_MASKZ, X86ISD::FMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vfmadd_pd_256, FMA_OP_MASKZ, X86ISD::FMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vfmadd_pd_512, FMA_OP_MASKZ, X86ISD::FMADD,
|
|
|
|
X86ISD::FMADD_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vfmadd_ps_128, FMA_OP_MASKZ, X86ISD::FMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vfmadd_ps_256, FMA_OP_MASKZ, X86ISD::FMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vfmadd_ps_512, FMA_OP_MASKZ, X86ISD::FMADD,
|
|
|
|
X86ISD::FMADD_RND),
|
|
|
|
|
2016-12-09 14:42:28 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vfmadd_sd, FMA_OP_SCALAR_MASKZ, X86ISD::FMADDS1_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vfmadd_ss, FMA_OP_SCALAR_MASKZ, X86ISD::FMADDS1_RND, 0),
|
2015-06-29 17:10:00 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vfmaddsub_pd_128, FMA_OP_MASKZ, X86ISD::FMADDSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vfmaddsub_pd_256, FMA_OP_MASKZ, X86ISD::FMADDSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vfmaddsub_pd_512, FMA_OP_MASKZ, X86ISD::FMADDSUB,
|
|
|
|
X86ISD::FMADDSUB_RND),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vfmaddsub_ps_128, FMA_OP_MASKZ, X86ISD::FMADDSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vfmaddsub_ps_256, FMA_OP_MASKZ, X86ISD::FMADDSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vfmaddsub_ps_512, FMA_OP_MASKZ, X86ISD::FMADDSUB,
|
|
|
|
X86ISD::FMADDSUB_RND),
|
|
|
|
|
2015-06-22 14:45:48 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpermt2var_d_128, VPERM_3OP_MASKZ,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpermt2var_d_256, VPERM_3OP_MASKZ,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpermt2var_d_512, VPERM_3OP_MASKZ,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpermt2var_hi_128, VPERM_3OP_MASKZ,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpermt2var_hi_256, VPERM_3OP_MASKZ,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpermt2var_hi_512, VPERM_3OP_MASKZ,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpermt2var_pd_128, VPERM_3OP_MASKZ,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpermt2var_pd_256, VPERM_3OP_MASKZ,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpermt2var_pd_512, VPERM_3OP_MASKZ,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpermt2var_ps_128, VPERM_3OP_MASKZ,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpermt2var_ps_256, VPERM_3OP_MASKZ,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpermt2var_ps_512, VPERM_3OP_MASKZ,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpermt2var_q_128, VPERM_3OP_MASKZ,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpermt2var_q_256, VPERM_3OP_MASKZ,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpermt2var_q_512, VPERM_3OP_MASKZ,
|
|
|
|
X86ISD::VPERMV3, 0),
|
2016-01-21 21:36:01 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpermt2var_qi_128, VPERM_3OP_MASKZ,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpermt2var_qi_256, VPERM_3OP_MASKZ,
|
|
|
|
X86ISD::VPERMV3, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpermt2var_qi_512, VPERM_3OP_MASKZ,
|
|
|
|
X86ISD::VPERMV3, 0),
|
2016-02-27 19:49:16 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpmadd52h_uq_128, FMA_OP_MASKZ,
|
2016-01-25 19:14:24 +08:00
|
|
|
X86ISD::VPMADD52H, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpmadd52h_uq_256, FMA_OP_MASKZ,
|
|
|
|
X86ISD::VPMADD52H, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpmadd52h_uq_512, FMA_OP_MASKZ,
|
|
|
|
X86ISD::VPMADD52H, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpmadd52l_uq_128, FMA_OP_MASKZ,
|
|
|
|
X86ISD::VPMADD52L, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpmadd52l_uq_256, FMA_OP_MASKZ,
|
|
|
|
X86ISD::VPMADD52L, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_maskz_vpmadd52l_uq_512, FMA_OP_MASKZ,
|
|
|
|
X86ISD::VPMADD52L, 0),
|
2017-02-16 14:31:54 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_packssdw_512, INTR_TYPE_2OP, X86ISD::PACKSS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_packsswb_512, INTR_TYPE_2OP, X86ISD::PACKSS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_packusdw_512, INTR_TYPE_2OP, X86ISD::PACKUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_packuswb_512, INTR_TYPE_2OP, X86ISD::PACKUS, 0),
|
2016-12-27 11:46:05 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_pmul_dq_512, INTR_TYPE_2OP, X86ISD::PMULDQ, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_pmulu_dq_512, INTR_TYPE_2OP, X86ISD::PMULUDQ, 0),
|
2015-09-02 22:21:54 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_psad_bw_512, INTR_TYPE_2OP, X86ISD::PSADBW, 0),
|
2016-12-11 07:09:43 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_pshuf_b_512, INTR_TYPE_2OP, X86ISD::PSHUFB, 0),
|
2016-11-12 13:28:24 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_psll_d_512, INTR_TYPE_2OP, X86ISD::VSHL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psll_q_512, INTR_TYPE_2OP, X86ISD::VSHL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psll_w_512, INTR_TYPE_2OP, X86ISD::VSHL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_pslli_d_512, VSHIFT, X86ISD::VSHLI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_pslli_q_512, VSHIFT, X86ISD::VSHLI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_pslli_w_512, VSHIFT, X86ISD::VSHLI, 0),
|
2016-11-13 15:26:15 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_psllv_d_512, INTR_TYPE_2OP, ISD::SHL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psllv_q_512, INTR_TYPE_2OP, ISD::SHL, 0),
|
2016-11-18 13:04:44 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_psllv_w_128, INTR_TYPE_2OP, ISD::SHL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psllv_w_256, INTR_TYPE_2OP, ISD::SHL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psllv_w_512, INTR_TYPE_2OP, ISD::SHL, 0),
|
2016-11-12 13:28:24 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_psra_d_512, INTR_TYPE_2OP, X86ISD::VSRA, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psra_q_128, INTR_TYPE_2OP, X86ISD::VSRA, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psra_q_256, INTR_TYPE_2OP, X86ISD::VSRA, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psra_q_512, INTR_TYPE_2OP, X86ISD::VSRA, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psra_w_512, INTR_TYPE_2OP, X86ISD::VSRA, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psrai_d_512, VSHIFT, X86ISD::VSRAI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psrai_q_128, VSHIFT, X86ISD::VSRAI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psrai_q_256, VSHIFT, X86ISD::VSRAI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psrai_q_512, VSHIFT, X86ISD::VSRAI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psrai_w_512, VSHIFT, X86ISD::VSRAI, 0),
|
2016-11-13 15:26:15 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_psrav_d_512, INTR_TYPE_2OP, X86ISD::VSRAV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psrav_q_128, INTR_TYPE_2OP, X86ISD::VSRAV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psrav_q_256, INTR_TYPE_2OP, X86ISD::VSRAV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psrav_q_512, INTR_TYPE_2OP, X86ISD::VSRAV, 0),
|
2016-11-18 13:04:44 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_psrav_w_128, INTR_TYPE_2OP, X86ISD::VSRAV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psrav_w_256, INTR_TYPE_2OP, X86ISD::VSRAV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psrav_w_512, INTR_TYPE_2OP, X86ISD::VSRAV, 0),
|
2016-11-12 13:28:24 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_psrl_d_512, INTR_TYPE_2OP, X86ISD::VSRL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psrl_q_512, INTR_TYPE_2OP, X86ISD::VSRL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psrl_w_512, INTR_TYPE_2OP, X86ISD::VSRL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psrli_d_512, VSHIFT, X86ISD::VSRLI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psrli_q_512, VSHIFT, X86ISD::VSRLI, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psrli_w_512, VSHIFT, X86ISD::VSRLI, 0),
|
2016-11-13 15:26:15 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_psrlv_d_512, INTR_TYPE_2OP, ISD::SRL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psrlv_q_512, INTR_TYPE_2OP, ISD::SRL, 0),
|
2016-11-18 13:04:44 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_psrlv_w_128, INTR_TYPE_2OP, ISD::SRL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psrlv_w_256, INTR_TYPE_2OP, ISD::SRL, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_psrlv_w_512, INTR_TYPE_2OP, ISD::SRL, 0),
|
2016-01-25 21:27:32 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_ptestm_b_128, CMP_MASK, X86ISD::TESTM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_ptestm_b_256, CMP_MASK, X86ISD::TESTM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_ptestm_b_512, CMP_MASK, X86ISD::TESTM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_ptestm_d_128, CMP_MASK, X86ISD::TESTM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_ptestm_d_256, CMP_MASK, X86ISD::TESTM, 0),
|
2016-01-28 16:33:22 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_ptestm_d_512, CMP_MASK, X86ISD::TESTM, 0),
|
2016-01-25 21:27:32 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_ptestm_q_128, CMP_MASK, X86ISD::TESTM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_ptestm_q_256, CMP_MASK, X86ISD::TESTM, 0),
|
2016-01-28 16:33:22 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_ptestm_q_512, CMP_MASK, X86ISD::TESTM, 0),
|
2016-01-25 21:27:32 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_ptestm_w_128, CMP_MASK, X86ISD::TESTM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_ptestm_w_256, CMP_MASK, X86ISD::TESTM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_ptestm_w_512, CMP_MASK, X86ISD::TESTM, 0),
|
2016-01-25 22:43:23 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_ptestnm_b_128, CMP_MASK, X86ISD::TESTNM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_ptestnm_b_256, CMP_MASK, X86ISD::TESTNM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_ptestnm_b_512, CMP_MASK, X86ISD::TESTNM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_ptestnm_d_128, CMP_MASK, X86ISD::TESTNM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_ptestnm_d_256, CMP_MASK, X86ISD::TESTNM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_ptestnm_d_512, CMP_MASK, X86ISD::TESTNM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_ptestnm_q_128, CMP_MASK, X86ISD::TESTNM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_ptestnm_q_256, CMP_MASK, X86ISD::TESTNM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_ptestnm_q_512, CMP_MASK, X86ISD::TESTNM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_ptestnm_w_128, CMP_MASK, X86ISD::TESTNM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_ptestnm_w_256, CMP_MASK, X86ISD::TESTNM, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_ptestnm_w_512, CMP_MASK, X86ISD::TESTNM, 0),
|
2015-12-24 15:11:53 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_rcp14_pd_128, INTR_TYPE_1OP_MASK, X86ISD::FRCP, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_rcp14_pd_256, INTR_TYPE_1OP_MASK, X86ISD::FRCP, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_rcp14_pd_512, INTR_TYPE_1OP_MASK, X86ISD::FRCP, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_rcp14_ps_128, INTR_TYPE_1OP_MASK, X86ISD::FRCP, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_rcp14_ps_256, INTR_TYPE_1OP_MASK, X86ISD::FRCP, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_rcp14_ps_512, INTR_TYPE_1OP_MASK, X86ISD::FRCP, 0),
|
2016-05-21 22:44:18 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_rcp14_sd, INTR_TYPE_SCALAR_MASK, X86ISD::FRCPS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_rcp14_ss, INTR_TYPE_SCALAR_MASK, X86ISD::FRCPS, 0),
|
2015-12-22 19:40:04 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_rcp28_pd, INTR_TYPE_1OP_MASK_RM, X86ISD::RCP28, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_rcp28_ps, INTR_TYPE_1OP_MASK_RM, X86ISD::RCP28, 0),
|
2016-09-23 14:24:35 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_rcp28_sd, INTR_TYPE_SCALAR_MASK_RM, X86ISD::RCP28S, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_rcp28_ss, INTR_TYPE_SCALAR_MASK_RM, X86ISD::RCP28S, 0),
|
2015-12-24 15:11:53 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_rsqrt14_pd_128, INTR_TYPE_1OP_MASK, X86ISD::FRSQRT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_rsqrt14_pd_256, INTR_TYPE_1OP_MASK, X86ISD::FRSQRT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_rsqrt14_pd_512, INTR_TYPE_1OP_MASK, X86ISD::FRSQRT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_rsqrt14_ps_128, INTR_TYPE_1OP_MASK, X86ISD::FRSQRT, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_rsqrt14_ps_256, INTR_TYPE_1OP_MASK, X86ISD::FRSQRT, 0),
|
2015-12-22 19:40:04 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_rsqrt14_ps_512, INTR_TYPE_1OP_MASK, X86ISD::FRSQRT, 0),
|
2016-05-21 22:44:18 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_rsqrt14_sd, INTR_TYPE_SCALAR_MASK, X86ISD::FRSQRTS, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_rsqrt14_ss, INTR_TYPE_SCALAR_MASK, X86ISD::FRSQRTS, 0),
|
2014-11-12 15:31:03 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_rsqrt28_pd, INTR_TYPE_1OP_MASK_RM,X86ISD::RSQRT28, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_rsqrt28_ps, INTR_TYPE_1OP_MASK_RM,X86ISD::RSQRT28, 0),
|
2016-09-23 14:24:35 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_rsqrt28_sd, INTR_TYPE_SCALAR_MASK_RM,X86ISD::RSQRT28S, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_rsqrt28_ss, INTR_TYPE_SCALAR_MASK_RM,X86ISD::RSQRT28S, 0),
|
2015-12-02 16:17:51 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_vcomi_sd, COMI_RM, X86ISD::COMI, X86ISD::UCOMI),
|
|
|
|
X86_INTRINSIC_DATA(avx512_vcomi_ss, COMI_RM, X86ISD::COMI, X86ISD::UCOMI),
|
2016-09-23 14:24:39 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_vcvtsd2si32, INTR_TYPE_2OP, X86ISD::CVTS2SI_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_vcvtsd2si64, INTR_TYPE_2OP, X86ISD::CVTS2SI_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_vcvtsd2usi32, INTR_TYPE_2OP, X86ISD::CVTS2UI_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_vcvtsd2usi64, INTR_TYPE_2OP, X86ISD::CVTS2UI_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_vcvtss2si32, INTR_TYPE_2OP, X86ISD::CVTS2SI_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_vcvtss2si64, INTR_TYPE_2OP, X86ISD::CVTS2SI_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_vcvtss2usi32, INTR_TYPE_2OP, X86ISD::CVTS2UI_RND, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_vcvtss2usi64, INTR_TYPE_2OP, X86ISD::CVTS2UI_RND, 0),
|
2016-12-11 09:26:44 +08:00
|
|
|
X86_INTRINSIC_DATA(avx512_vpermilvar_pd_512, INTR_TYPE_2OP, X86ISD::VPERMILPV, 0),
|
|
|
|
X86_INTRINSIC_DATA(avx512_vpermilvar_ps_512, INTR_TYPE_2OP, X86ISD::VPERMILPV, 0),
|
2015-01-28 18:21:27 +08:00
|
|
|
X86_INTRINSIC_DATA(fma_vfmadd_pd, INTR_TYPE_3OP, X86ISD::FMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfmadd_pd_256, INTR_TYPE_3OP, X86ISD::FMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfmadd_ps, INTR_TYPE_3OP, X86ISD::FMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfmadd_ps_256, INTR_TYPE_3OP, X86ISD::FMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfmaddsub_pd, INTR_TYPE_3OP, X86ISD::FMADDSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfmaddsub_pd_256, INTR_TYPE_3OP, X86ISD::FMADDSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfmaddsub_ps, INTR_TYPE_3OP, X86ISD::FMADDSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfmaddsub_ps_256, INTR_TYPE_3OP, X86ISD::FMADDSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfmsub_pd, INTR_TYPE_3OP, X86ISD::FMSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfmsub_pd_256, INTR_TYPE_3OP, X86ISD::FMSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfmsub_ps, INTR_TYPE_3OP, X86ISD::FMSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfmsub_ps_256, INTR_TYPE_3OP, X86ISD::FMSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfmsubadd_pd, INTR_TYPE_3OP, X86ISD::FMSUBADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfmsubadd_pd_256, INTR_TYPE_3OP, X86ISD::FMSUBADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfmsubadd_ps, INTR_TYPE_3OP, X86ISD::FMSUBADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfmsubadd_ps_256, INTR_TYPE_3OP, X86ISD::FMSUBADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfnmadd_pd, INTR_TYPE_3OP, X86ISD::FNMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfnmadd_pd_256, INTR_TYPE_3OP, X86ISD::FNMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfnmadd_ps, INTR_TYPE_3OP, X86ISD::FNMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfnmadd_ps_256, INTR_TYPE_3OP, X86ISD::FNMADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfnmsub_pd, INTR_TYPE_3OP, X86ISD::FNMSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfnmsub_pd_256, INTR_TYPE_3OP, X86ISD::FNMSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfnmsub_ps, INTR_TYPE_3OP, X86ISD::FNMSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(fma_vfnmsub_ps_256, INTR_TYPE_3OP, X86ISD::FNMSUB, 0),
|
2016-01-26 08:55:00 +08:00
|
|
|
X86_INTRINSIC_DATA(sse_comieq_ss, COMI, X86ISD::COMI, ISD::SETEQ),
|
|
|
|
X86_INTRINSIC_DATA(sse_comige_ss, COMI, X86ISD::COMI, ISD::SETGE),
|
|
|
|
X86_INTRINSIC_DATA(sse_comigt_ss, COMI, X86ISD::COMI, ISD::SETGT),
|
|
|
|
X86_INTRINSIC_DATA(sse_comile_ss, COMI, X86ISD::COMI, ISD::SETLE),
|
|
|
|
X86_INTRINSIC_DATA(sse_comilt_ss, COMI, X86ISD::COMI, ISD::SETLT),
|
|
|
|
X86_INTRINSIC_DATA(sse_comineq_ss, COMI, X86ISD::COMI, ISD::SETNE),
|
|
|
|
X86_INTRINSIC_DATA(sse_max_ps, INTR_TYPE_2OP, X86ISD::FMAX, 0),
|
2017-02-22 14:54:18 +08:00
|
|
|
X86_INTRINSIC_DATA(sse_max_ss, INTR_TYPE_2OP, X86ISD::FMAXS, 0),
|
2016-01-26 08:55:00 +08:00
|
|
|
X86_INTRINSIC_DATA(sse_min_ps, INTR_TYPE_2OP, X86ISD::FMIN, 0),
|
2017-02-22 14:54:18 +08:00
|
|
|
X86_INTRINSIC_DATA(sse_min_ss, INTR_TYPE_2OP, X86ISD::FMINS, 0),
|
2016-04-04 02:22:03 +08:00
|
|
|
X86_INTRINSIC_DATA(sse_movmsk_ps, INTR_TYPE_1OP, X86ISD::MOVMSK, 0),
|
2016-01-26 08:55:00 +08:00
|
|
|
X86_INTRINSIC_DATA(sse_rcp_ps, INTR_TYPE_1OP, X86ISD::FRCP, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse_rsqrt_ps, INTR_TYPE_1OP, X86ISD::FRSQRT, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse_sqrt_ps, INTR_TYPE_1OP, ISD::FSQRT, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse_ucomieq_ss, COMI, X86ISD::UCOMI, ISD::SETEQ),
|
|
|
|
X86_INTRINSIC_DATA(sse_ucomige_ss, COMI, X86ISD::UCOMI, ISD::SETGE),
|
|
|
|
X86_INTRINSIC_DATA(sse_ucomigt_ss, COMI, X86ISD::UCOMI, ISD::SETGT),
|
|
|
|
X86_INTRINSIC_DATA(sse_ucomile_ss, COMI, X86ISD::UCOMI, ISD::SETLE),
|
|
|
|
X86_INTRINSIC_DATA(sse_ucomilt_ss, COMI, X86ISD::UCOMI, ISD::SETLT),
|
|
|
|
X86_INTRINSIC_DATA(sse_ucomineq_ss, COMI, X86ISD::UCOMI, ISD::SETNE),
|
2014-09-04 14:34:34 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_comieq_sd, COMI, X86ISD::COMI, ISD::SETEQ),
|
|
|
|
X86_INTRINSIC_DATA(sse2_comige_sd, COMI, X86ISD::COMI, ISD::SETGE),
|
|
|
|
X86_INTRINSIC_DATA(sse2_comigt_sd, COMI, X86ISD::COMI, ISD::SETGT),
|
|
|
|
X86_INTRINSIC_DATA(sse2_comile_sd, COMI, X86ISD::COMI, ISD::SETLE),
|
|
|
|
X86_INTRINSIC_DATA(sse2_comilt_sd, COMI, X86ISD::COMI, ISD::SETLT),
|
|
|
|
X86_INTRINSIC_DATA(sse2_comineq_sd, COMI, X86ISD::COMI, ISD::SETNE),
|
2016-11-06 12:12:42 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_cvtdq2ps, INTR_TYPE_1OP, ISD::SINT_TO_FP, 0),
|
2016-11-10 15:47:17 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_cvtpd2dq, INTR_TYPE_1OP, X86ISD::CVTP2SI, 0),
|
2016-08-31 23:09:34 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_cvtpd2ps, INTR_TYPE_1OP, X86ISD::VFPROUND, 0),
|
2016-11-24 20:13:46 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_cvttpd2dq, INTR_TYPE_1OP, X86ISD::CVTTP2SI, 0),
|
2016-11-10 15:24:52 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_cvttps2dq, INTR_TYPE_1OP, ISD::FP_TO_SINT, 0),
|
2014-12-08 17:03:08 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_max_pd, INTR_TYPE_2OP, X86ISD::FMAX, 0),
|
2017-02-22 14:54:18 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_max_sd, INTR_TYPE_2OP, X86ISD::FMAXS, 0),
|
2014-12-08 17:03:08 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_min_pd, INTR_TYPE_2OP, X86ISD::FMIN, 0),
|
2017-02-22 14:54:18 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_min_sd, INTR_TYPE_2OP, X86ISD::FMINS, 0),
|
2016-04-04 02:22:03 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_movmsk_pd, INTR_TYPE_1OP, X86ISD::MOVMSK, 0),
|
2014-12-08 17:03:08 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_packssdw_128, INTR_TYPE_2OP, X86ISD::PACKSS, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_packsswb_128, INTR_TYPE_2OP, X86ISD::PACKSS, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_packuswb_128, INTR_TYPE_2OP, X86ISD::PACKUS, 0),
|
2016-05-21 11:52:28 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_padds_b, INTR_TYPE_2OP, X86ISD::ADDS, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_padds_w, INTR_TYPE_2OP, X86ISD::ADDS, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_paddus_b, INTR_TYPE_2OP, X86ISD::ADDUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_paddus_w, INTR_TYPE_2OP, X86ISD::ADDUS, 0),
|
[X86][SSE] Detect AVG pattern during instruction combine for SSE2/AVX2/AVX512BW.
This patch detects the AVG pattern in vectorized code, which is simply
c = (a + b + 1) / 2, where a, b, and c have the same type which are vectors of
either unsigned i8 or unsigned i16. In the IR, i8/i16 will be promoted to
i32 before any arithmetic operations. The following IR shows such an example:
%1 = zext <N x i8> %a to <N x i32>
%2 = zext <N x i8> %b to <N x i32>
%3 = add nuw nsw <N x i32> %1, <i32 1 x N>
%4 = add nuw nsw <N x i32> %3, %2
%5 = lshr <N x i32> %N, <i32 1 x N>
%6 = trunc <N x i32> %5 to <N x i8>
and with this patch it will be converted to a X86ISD::AVG instruction.
The pattern recognition is done when combining instructions just before type
legalization during instruction selection. We do it here because after type
legalization, it is much more difficult to do pattern recognition based
on many instructions that are doing type conversions. Therefore, for
target-specific instructions (like X86ISD::AVG), we need to take care of type
legalization by ourselves. However, as X86ISD::AVG behaves similarly to
ISD::ADD, I am wondering if there is a way to legalize operands and result
types of X86ISD::AVG together with ISD::ADD. It seems that the current design
doesn't support this idea.
Tests are added for SSE2, AVX2, and AVX512BW and both i8 and i16 types of
variant vector sizes.
Differential revision: http://reviews.llvm.org/D14761
llvm-svn: 253952
2015-11-24 13:44:19 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_pavg_b, INTR_TYPE_2OP, X86ISD::AVG, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_pavg_w, INTR_TYPE_2OP, X86ISD::AVG, 0),
|
2016-10-30 14:56:16 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_pmadd_wd, INTR_TYPE_2OP, X86ISD::VPMADDWD, 0),
|
2016-04-04 02:22:03 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_pmovmskb_128, INTR_TYPE_1OP, X86ISD::MOVMSK, 0),
|
2014-12-08 17:03:08 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_pmulh_w, INTR_TYPE_2OP, ISD::MULHS, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_pmulhu_w, INTR_TYPE_2OP, ISD::MULHU, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_pmulu_dq, INTR_TYPE_2OP, X86ISD::PMULUDQ, 0),
|
2015-11-25 03:51:26 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_psad_bw, INTR_TYPE_2OP, X86ISD::PSADBW, 0),
|
2014-09-04 14:34:34 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_psll_d, INTR_TYPE_2OP, X86ISD::VSHL, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_psll_q, INTR_TYPE_2OP, X86ISD::VSHL, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_psll_w, INTR_TYPE_2OP, X86ISD::VSHL, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_pslli_d, VSHIFT, X86ISD::VSHLI, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_pslli_q, VSHIFT, X86ISD::VSHLI, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_pslli_w, VSHIFT, X86ISD::VSHLI, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_psra_d, INTR_TYPE_2OP, X86ISD::VSRA, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_psra_w, INTR_TYPE_2OP, X86ISD::VSRA, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_psrai_d, VSHIFT, X86ISD::VSRAI, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_psrai_w, VSHIFT, X86ISD::VSRAI, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_psrl_d, INTR_TYPE_2OP, X86ISD::VSRL, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_psrl_q, INTR_TYPE_2OP, X86ISD::VSRL, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_psrl_w, INTR_TYPE_2OP, X86ISD::VSRL, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_psrli_d, VSHIFT, X86ISD::VSRLI, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_psrli_q, VSHIFT, X86ISD::VSRLI, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_psrli_w, VSHIFT, X86ISD::VSRLI, 0),
|
2016-05-21 11:52:28 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_psubs_b, INTR_TYPE_2OP, X86ISD::SUBS, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_psubs_w, INTR_TYPE_2OP, X86ISD::SUBS, 0),
|
2014-09-04 14:34:34 +08:00
|
|
|
X86_INTRINSIC_DATA(sse2_psubus_b, INTR_TYPE_2OP, X86ISD::SUBUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_psubus_w, INTR_TYPE_2OP, X86ISD::SUBUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_sqrt_pd, INTR_TYPE_1OP, ISD::FSQRT, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse2_ucomieq_sd, COMI, X86ISD::UCOMI, ISD::SETEQ),
|
|
|
|
X86_INTRINSIC_DATA(sse2_ucomige_sd, COMI, X86ISD::UCOMI, ISD::SETGE),
|
|
|
|
X86_INTRINSIC_DATA(sse2_ucomigt_sd, COMI, X86ISD::UCOMI, ISD::SETGT),
|
|
|
|
X86_INTRINSIC_DATA(sse2_ucomile_sd, COMI, X86ISD::UCOMI, ISD::SETLE),
|
|
|
|
X86_INTRINSIC_DATA(sse2_ucomilt_sd, COMI, X86ISD::UCOMI, ISD::SETLT),
|
|
|
|
X86_INTRINSIC_DATA(sse2_ucomineq_sd, COMI, X86ISD::UCOMI, ISD::SETNE),
|
|
|
|
X86_INTRINSIC_DATA(sse3_hadd_pd, INTR_TYPE_2OP, X86ISD::FHADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse3_hadd_ps, INTR_TYPE_2OP, X86ISD::FHADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse3_hsub_pd, INTR_TYPE_2OP, X86ISD::FHSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse3_hsub_ps, INTR_TYPE_2OP, X86ISD::FHSUB, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse41_insertps, INTR_TYPE_3OP, X86ISD::INSERTPS, 0),
|
2014-12-08 17:03:08 +08:00
|
|
|
X86_INTRINSIC_DATA(sse41_packusdw, INTR_TYPE_2OP, X86ISD::PACKUS, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse41_pmuldq, INTR_TYPE_2OP, X86ISD::PMULDQ, 0),
|
2015-07-07 04:46:41 +08:00
|
|
|
X86_INTRINSIC_DATA(sse4a_extrqi, INTR_TYPE_3OP, X86ISD::EXTRQI, 0),
|
|
|
|
X86_INTRINSIC_DATA(sse4a_insertqi, INTR_TYPE_4OP, X86ISD::INSERTQI, 0),
|
2016-06-04 12:32:15 +08:00
|
|
|
X86_INTRINSIC_DATA(ssse3_pabs_b_128, INTR_TYPE_1OP, X86ISD::ABS, 0),
|
|
|
|
X86_INTRINSIC_DATA(ssse3_pabs_d_128, INTR_TYPE_1OP, X86ISD::ABS, 0),
|
|
|
|
X86_INTRINSIC_DATA(ssse3_pabs_w_128, INTR_TYPE_1OP, X86ISD::ABS, 0),
|
2014-09-04 14:34:34 +08:00
|
|
|
X86_INTRINSIC_DATA(ssse3_phadd_d_128, INTR_TYPE_2OP, X86ISD::HADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(ssse3_phadd_w_128, INTR_TYPE_2OP, X86ISD::HADD, 0),
|
|
|
|
X86_INTRINSIC_DATA(ssse3_phsub_d_128, INTR_TYPE_2OP, X86ISD::HSUB, 0),
|
2014-12-08 17:03:08 +08:00
|
|
|
X86_INTRINSIC_DATA(ssse3_phsub_w_128, INTR_TYPE_2OP, X86ISD::HSUB, 0),
|
2016-10-30 14:56:16 +08:00
|
|
|
X86_INTRINSIC_DATA(ssse3_pmadd_ub_sw_128, INTR_TYPE_2OP, X86ISD::VPMADDUBSW, 0),
|
2016-10-30 02:41:45 +08:00
|
|
|
X86_INTRINSIC_DATA(ssse3_pmul_hr_sw_128, INTR_TYPE_2OP, X86ISD::MULHRS, 0),
|
2014-12-08 17:03:08 +08:00
|
|
|
X86_INTRINSIC_DATA(ssse3_pshuf_b_128, INTR_TYPE_2OP, X86ISD::PSHUFB, 0),
|
2015-10-11 22:15:17 +08:00
|
|
|
X86_INTRINSIC_DATA(xop_vpcomb, INTR_TYPE_3OP, X86ISD::VPCOM, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vpcomd, INTR_TYPE_3OP, X86ISD::VPCOM, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vpcomq, INTR_TYPE_3OP, X86ISD::VPCOM, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vpcomub, INTR_TYPE_3OP, X86ISD::VPCOMU, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vpcomud, INTR_TYPE_3OP, X86ISD::VPCOMU, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vpcomuq, INTR_TYPE_3OP, X86ISD::VPCOMU, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vpcomuw, INTR_TYPE_3OP, X86ISD::VPCOMU, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vpcomw, INTR_TYPE_3OP, X86ISD::VPCOM, 0),
|
2016-06-03 16:06:03 +08:00
|
|
|
X86_INTRINSIC_DATA(xop_vpermil2pd, INTR_TYPE_4OP, X86ISD::VPERMIL2, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vpermil2pd_256, INTR_TYPE_4OP, X86ISD::VPERMIL2, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vpermil2ps, INTR_TYPE_4OP, X86ISD::VPERMIL2, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vpermil2ps_256, INTR_TYPE_4OP, X86ISD::VPERMIL2, 0),
|
2016-03-24 19:52:43 +08:00
|
|
|
X86_INTRINSIC_DATA(xop_vpperm, INTR_TYPE_3OP, X86ISD::VPPERM, 0),
|
2015-10-18 03:04:24 +08:00
|
|
|
X86_INTRINSIC_DATA(xop_vprotb, INTR_TYPE_2OP, X86ISD::VPROT, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vprotbi, INTR_TYPE_2OP, X86ISD::VPROTI, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vprotd, INTR_TYPE_2OP, X86ISD::VPROT, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vprotdi, INTR_TYPE_2OP, X86ISD::VPROTI, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vprotq, INTR_TYPE_2OP, X86ISD::VPROT, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vprotqi, INTR_TYPE_2OP, X86ISD::VPROTI, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vprotw, INTR_TYPE_2OP, X86ISD::VPROT, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vprotwi, INTR_TYPE_2OP, X86ISD::VPROTI, 0),
|
2015-09-30 16:17:50 +08:00
|
|
|
X86_INTRINSIC_DATA(xop_vpshab, INTR_TYPE_2OP, X86ISD::VPSHA, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vpshad, INTR_TYPE_2OP, X86ISD::VPSHA, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vpshaq, INTR_TYPE_2OP, X86ISD::VPSHA, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vpshaw, INTR_TYPE_2OP, X86ISD::VPSHA, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vpshlb, INTR_TYPE_2OP, X86ISD::VPSHL, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vpshld, INTR_TYPE_2OP, X86ISD::VPSHL, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vpshlq, INTR_TYPE_2OP, X86ISD::VPSHL, 0),
|
|
|
|
X86_INTRINSIC_DATA(xop_vpshlw, INTR_TYPE_2OP, X86ISD::VPSHL, 0)
|
2014-09-04 14:34:34 +08:00
|
|
|
};
|
2014-08-24 17:19:56 +08:00
|
|
|
|
2014-09-04 14:34:34 +08:00
|
|
|
/*
|
|
|
|
* Retrieve data for Intrinsic without chain.
|
|
|
|
* Return nullptr if intrinsic is not defined in the table.
|
|
|
|
*/
|
2016-06-04 12:32:17 +08:00
|
|
|
static const IntrinsicData* getIntrinsicWithoutChain(uint16_t IntNo) {
|
2014-09-04 15:20:39 +08:00
|
|
|
IntrinsicData IntrinsicToFind = { IntNo, INTR_NO_TYPE, 0, 0 };
|
2014-09-04 14:34:34 +08:00
|
|
|
const IntrinsicData *Data = std::lower_bound(std::begin(IntrinsicsWithoutChain),
|
|
|
|
std::end(IntrinsicsWithoutChain),
|
|
|
|
IntrinsicToFind);
|
|
|
|
if (Data != std::end(IntrinsicsWithoutChain) && *Data == IntrinsicToFind)
|
|
|
|
return Data;
|
|
|
|
return nullptr;
|
2014-08-24 17:19:56 +08:00
|
|
|
}
|
|
|
|
|
2014-09-04 14:34:34 +08:00
|
|
|
static void verifyIntrinsicTables() {
|
|
|
|
assert(std::is_sorted(std::begin(IntrinsicsWithoutChain),
|
|
|
|
std::end(IntrinsicsWithoutChain)) &&
|
|
|
|
std::is_sorted(std::begin(IntrinsicsWithChain),
|
|
|
|
std::end(IntrinsicsWithChain)) &&
|
|
|
|
"Intrinsic data tables should be sorted by Intrinsic ID");
|
2015-11-30 07:18:32 +08:00
|
|
|
assert((std::adjacent_find(std::begin(IntrinsicsWithoutChain),
|
|
|
|
std::end(IntrinsicsWithoutChain)) ==
|
|
|
|
std::end(IntrinsicsWithoutChain)) &&
|
|
|
|
(std::adjacent_find(std::begin(IntrinsicsWithChain),
|
|
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std::end(IntrinsicsWithChain)) ==
|
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std::end(IntrinsicsWithChain)) &&
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|
|
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"Intrinsic data tables should have unique entries");
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2014-08-24 17:19:56 +08:00
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}
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2014-09-04 14:34:34 +08:00
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} // End llvm namespace
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2014-08-24 17:19:56 +08:00
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#endif
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