2017-01-19 04:40:48 +08:00
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// Test host codegen.
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// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64
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// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
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// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64
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// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32
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// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
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// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32
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2017-12-30 02:07:07 +08:00
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// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
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// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
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// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
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// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
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// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
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// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
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// SIMD-ONLY0-NOT: {{__kmpc|__tgt}}
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2017-01-19 04:40:48 +08:00
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// Test target codegen - host bc file has to be created first.
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// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
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// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64
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// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
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// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64
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// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
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// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32
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// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
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// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32
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2017-12-30 02:07:07 +08:00
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// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
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// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck --check-prefix SIMD-ONLY1 %s
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// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
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// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s
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// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
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// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck --check-prefix SIMD-ONLY1 %s
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// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
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// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s
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// SIMD-ONLY1-NOT: {{__kmpc|__tgt}}
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2017-01-19 04:40:48 +08:00
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// expected-no-diagnostics
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#ifndef HEADER
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#define HEADER
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2018-04-17 01:59:34 +08:00
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// CHECK-DAG: %struct.ident_t = type { i32, i32, i32, i32, i8* }
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2017-01-19 04:40:48 +08:00
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// CHECK-DAG: [[STR:@.+]] = private unnamed_addr constant [23 x i8] c";unknown;unknown;0;0;;\00"
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2018-08-29 23:45:11 +08:00
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// CHECK-DAG: [[DEF_LOC:@.+]] = private unnamed_addr global %struct.ident_t { i32 0, i32 2, i32 0, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* [[STR]], i32 0, i32 0) }
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2017-01-19 04:40:48 +08:00
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// CHECK-DAG: [[S1:%.+]] = type { double }
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// CHECK-DAG: [[ENTTY:%.+]] = type { i8*, i8*, i[[SZ:32|64]], i32, i32 }
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// TCHECK: [[ENTTY:%.+]] = type { i8*, i8*, i{{32|64}}, i32, i32 }
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// We have 6 target regions
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2018-05-08 22:16:57 +08:00
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// CHECK-DAG: @{{.*}} = weak constant i8 0
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// CHECK-DAG: @{{.*}} = weak constant i8 0
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// CHECK-DAG: @{{.*}} = weak constant i8 0
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// CHECK-DAG: @{{.*}} = weak constant i8 0
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// CHECK-DAG: @{{.*}} = weak constant i8 0
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// CHECK-DAG: @{{.*}} = weak constant i8 0
|
2017-01-19 04:40:48 +08:00
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|
2018-03-31 02:31:07 +08:00
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// TCHECK: @{{.+}} = weak constant [[ENTTY]]
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// TCHECK: @{{.+}} = weak constant [[ENTTY]]
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// TCHECK: @{{.+}} = weak constant [[ENTTY]]
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// TCHECK: @{{.+}} = weak constant [[ENTTY]]
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// TCHECK: @{{.+}} = weak constant [[ENTTY]]
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// TCHECK: @{{.+}} = weak constant [[ENTTY]]
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2017-01-19 04:40:48 +08:00
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// Check target registration is registered as a Ctor.
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2019-10-16 02:42:47 +08:00
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// CHECK: appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 0, void ()* @.omp_offloading.requires_reg, i8* null }]
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2017-01-19 04:40:48 +08:00
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template<typename tx>
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tx ftemplate(int n) {
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tx a = 0;
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#pragma omp target parallel if(parallel: 0)
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{
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a += 1;
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}
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short b = 1;
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#pragma omp target parallel if(parallel: 1)
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{
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a += b;
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}
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return a;
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}
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static
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int fstatic(int n) {
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#pragma omp target parallel if(n>1)
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{
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}
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#pragma omp target parallel if(target: n-2>2)
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{
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}
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return n+1;
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}
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struct S1 {
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double a;
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int r1(int n){
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int b = 1;
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#pragma omp target parallel if(parallel: n>3)
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{
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|
this->a = (double)b + 1.5;
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}
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#pragma omp target parallel if(target: n>4) if(parallel: n>5)
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{
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this->a = 2.5;
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}
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return (int)a;
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}
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};
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// CHECK: define {{.*}}@{{.*}}bar{{.*}}
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int bar(int n){
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int a = 0;
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S1 S;
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// CHECK: call {{.*}}i32 [[FS1:@.+]]([[S1]]* {{.*}}, i32 {{.*}})
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a += S.r1(n);
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// CHECK: call {{.*}}i32 [[FSTATIC:@.+]](i32 {{.*}})
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a += fstatic(n);
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// CHECK: call {{.*}}i32 [[FTEMPLATE:@.+]](i32 {{.*}})
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a += ftemplate<int>(n);
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return a;
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}
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//
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// CHECK: define {{.*}}[[FS1]]([[S1]]* {{%.+}}, i32 {{[^%]*}}[[PARM:%.+]])
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//
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// CHECK-DAG: store i32 [[PARM]], i32* [[N_ADDR:%.+]], align
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// CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align
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// CHECK: [[CMP:%.+]] = icmp sgt i32 [[NV]], 3
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// CHECK: [[FB:%.+]] = zext i1 [[CMP]] to i8
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// CHECK: store i8 [[FB]], i8* [[CAPE_ADDR:%.+]], align
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// CHECK: [[CAPE:%.+]] = load i8, i8* [[CAPE_ADDR]], align
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// CHECK: [[TB:%.+]] = trunc i8 [[CAPE]] to i1
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// CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i8*
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// CHECK: [[FB:%.+]] = zext i1 [[TB]] to i8
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// CHECK: store i8 [[FB]], i8* [[CONV]], align
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// CHECK: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align
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//
|
2019-04-18 00:53:08 +08:00
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// CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 4, {{.*}}, i32 1, i32 [[NT:%.+]])
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// CHECK-DAG: [[NT]] = select i1 %{{.+}}, i32 0, i32 1
|
2017-10-02 22:20:58 +08:00
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// CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
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2017-01-19 04:40:48 +08:00
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// CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
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//
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// CHECK: [[FAIL]]
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// CHECK: call void [[HVT1:@.+]]([[S1]]* {{%.+}}, i[[SZ]] {{%.+}}, i[[SZ]] [[ARG]])
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// CHECK: br label {{%?}}[[END]]
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// CHECK: [[END]]
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//
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//
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//
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// CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align
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// CHECK: [[CMP:%.+]] = icmp sgt i32 [[NV]], 5
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// CHECK: [[FB:%.+]] = zext i1 [[CMP]] to i8
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// CHECK: store i8 [[FB]], i8* [[CAPE_ADDR:%.+]], align
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// CHECK: [[CAPE:%.+]] = load i8, i8* [[CAPE_ADDR]], align
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// CHECK: [[TB:%.+]] = trunc i8 [[CAPE]] to i1
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// CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i8*
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// CHECK: [[FB:%.+]] = zext i1 [[TB]] to i8
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// CHECK: store i8 [[FB]], i8* [[CONV]], align
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// CHECK: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align
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// CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align
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// CHECK: [[CMP:%.+]] = icmp sgt i32 [[NV]], 4
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|
// CHECK: br i1 [[CMP]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]]
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//
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// CHECK: [[IF_THEN]]
|
2019-04-18 00:53:08 +08:00
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// CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, {{.*}}, i32 1, i32 [[NT:%.+]])
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|
// CHECK-DAG: [[NT]] = select i1 %{{.+}}, i32 0, i32 1
|
2017-10-02 22:20:58 +08:00
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|
// CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
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|
// CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
|
2017-01-19 04:40:48 +08:00
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|
// CHECK: [[FAIL]]
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|
// CHECK: call void [[HVT2:@.+]]([[S1]]* {{%.+}}, i[[SZ]] [[ARG]])
|
2017-10-02 22:20:58 +08:00
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|
// CHECK-NEXT: br label %[[END]]
|
2017-01-19 04:40:48 +08:00
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|
|
// CHECK: [[END]]
|
2017-10-02 22:20:58 +08:00
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|
|
// CHECK-NEXT: br label %[[IFEND:.+]]
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|
// CHECK: [[IF_ELSE]]
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|
|
// CHECK: call void [[HVT2]]([[S1]]* {{%.+}}, i[[SZ]] [[ARG]])
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|
// CHECK-NEXT: br label %[[IFEND]]
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|
// CHECK: [[IFEND]]
|
2017-01-19 04:40:48 +08:00
|
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|
|
//
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|
|
// CHECK: define {{.*}}[[FSTATIC]](i32 {{[^%]*}}[[PARM:%.+]])
|
|
|
|
//
|
|
|
|
// CHECK-DAG: store i32 [[PARM]], i32* [[N_ADDR:%.+]], align
|
|
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|
// CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align
|
|
|
|
// CHECK: [[CMP:%.+]] = icmp sgt i32 [[NV]], 1
|
|
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|
// CHECK: [[FB:%.+]] = zext i1 [[CMP]] to i8
|
|
|
|
// CHECK: store i8 [[FB]], i8* [[CAPE_ADDR:%.+]], align
|
|
|
|
// CHECK: [[CAPE:%.+]] = load i8, i8* [[CAPE_ADDR]], align
|
|
|
|
// CHECK: [[TB:%.+]] = trunc i8 [[CAPE]] to i1
|
|
|
|
// CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i8*
|
|
|
|
// CHECK: [[FB:%.+]] = zext i1 [[TB]] to i8
|
|
|
|
// CHECK: store i8 [[FB]], i8* [[CONV]], align
|
|
|
|
// CHECK: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align
|
|
|
|
// CHECK: [[CAPE2:%.+]] = load i8, i8* [[CAPE_ADDR]], align
|
|
|
|
// CHECK: [[TB:%.+]] = trunc i8 [[CAPE2]] to i1
|
|
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// CHECK: br i1 [[TB]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]]
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//
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// CHECK: [[IF_THEN]]
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2019-04-18 00:53:08 +08:00
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// CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, {{.*}}, i32 1, i32 [[NT:%.+]])
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// CHECK-DAG: [[NT]] = select i1 %{{.+}}, i32 0, i32 1
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2017-10-02 22:20:58 +08:00
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// CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
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// CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
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2017-01-19 04:40:48 +08:00
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// CHECK: [[FAIL]]
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// CHECK: call void [[HVT3:@.+]](i[[SZ]] [[ARG]])
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2017-10-02 22:20:58 +08:00
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// CHECK-NEXT: br label %[[END]]
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2017-01-19 04:40:48 +08:00
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// CHECK: [[END]]
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2017-10-02 22:20:58 +08:00
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// CHECK-NEXT: br label %[[IFEND:.+]]
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// CHECK: [[IF_ELSE]]
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// CHECK: call void [[HVT3]](i[[SZ]] [[ARG]])
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// CHECK-NEXT: br label %[[IFEND]]
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// CHECK: [[IFEND]]
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2017-01-19 04:40:48 +08:00
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//
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//
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//
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// CHECK-DAG: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align
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// CHECK: [[SUB:%.+]] = sub nsw i32 [[NV]], 2
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// CHECK: [[CMP:%.+]] = icmp sgt i32 [[SUB]], 2
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// CHECK: br i1 [[CMP]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]]
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//
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// CHECK: [[IF_THEN]]
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2017-11-22 02:25:12 +08:00
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// CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 0, {{.*}}, i32 1, i32 0)
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2017-10-02 22:20:58 +08:00
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// CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
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// CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
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2017-01-19 04:40:48 +08:00
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// CHECK: [[FAIL]]
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// CHECK: call void [[HVT4:@.+]]()
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2017-10-02 22:20:58 +08:00
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// CHECK-NEXT: br label %[[END]]
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2017-01-19 04:40:48 +08:00
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// CHECK: [[END]]
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2017-10-02 22:20:58 +08:00
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// CHECK-NEXT: br label %[[IFEND:.+]]
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// CHECK: [[IF_ELSE]]
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// CHECK: call void [[HVT4]]()
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// CHECK-NEXT: br label %[[IFEND]]
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// CHECK: [[IFEND]]
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2017-01-19 04:40:48 +08:00
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//
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// CHECK: define {{.*}}[[FTEMPLATE]]
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//
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2019-04-18 00:53:08 +08:00
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// CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, {{.*}}, i32 1, i32 1)
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2017-10-02 22:20:58 +08:00
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// CHECK-NEXT: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
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2017-01-19 04:40:48 +08:00
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// CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
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//
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// CHECK: [[FAIL]]
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// CHECK: call void [[HVT5:@.+]]({{[^,]+}})
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// CHECK: br label {{%?}}[[END]]
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//
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// CHECK: [[END]]
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//
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//
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//
|
2017-11-22 02:25:12 +08:00
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// CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 2, {{.*}}, i32 1, i32 0)
|
2017-10-02 22:20:58 +08:00
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// CHECK-NEXT: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
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2017-01-19 04:40:48 +08:00
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// CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
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//
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// CHECK: [[FAIL]]
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// CHECK: call void [[HVT6:@.+]]({{[^,]+}}, {{[^,]+}})
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// CHECK: br label {{%?}}[[END]]
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// CHECK: [[END]]
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// Check that the offloading functions are emitted and that the parallel function
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// is appropriately guarded.
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// CHECK: define internal void [[HVT1]]([[S1]]* {{%.+}}, i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]])
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// CHECK-DAG: store i[[SZ]] [[PARM1]], i[[SZ]]* [[B_ADDR:%.+]], align
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// CHECK-DAG: store i[[SZ]] [[PARM2]], i[[SZ]]* [[CAPE_ADDR:%.+]], align
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// CHECK-64: [[CONVB:%.+]] = bitcast i[[SZ]]* [[B_ADDR]] to i32*
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// CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i8*
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// CHECK-64: [[BV:%.+]] = load i32, i32* [[CONVB]], align
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// CHECK-32: [[BV:%.+]] = load i32, i32* [[B_ADDR]], align
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// CHECK-64: [[BC:%.+]] = bitcast i64* [[ARGA:%.+]] to i32*
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// CHECK-64: store i32 [[BV]], i32* [[BC]], align
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// CHECK-64: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[ARGA]], align
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// CHECK-32: store i32 [[BV]], i32* [[ARGA:%.+]], align
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// CHECK-32: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[ARGA]], align
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// CHECK: [[IFC:%.+]] = load i8, i8* [[CONV]], align
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// CHECK: [[TB:%.+]] = trunc i8 [[IFC]] to i1
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// CHECK: br i1 [[TB]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]]
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//
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// CHECK: [[IF_THEN]]
|
2018-04-17 01:59:34 +08:00
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|
// CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [[S1]]*, i[[SZ]])* [[OMP_OUTLINED3:@.+]] to void (i32*, i32*, ...)*), [[S1]]* {{.+}}, i[[SZ]] [[ARG]])
|
2017-01-19 04:40:48 +08:00
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|
// CHECK: br label {{%?}}[[END:.+]]
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//
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|
// CHECK: [[IF_ELSE]]
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|
// CHECK: call void @__kmpc_serialized_parallel(
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|
// CHECK: call void [[OMP_OUTLINED3]](i32* {{%.+}}, i32* {{%.+}}, [[S1]]* {{.+}}, i[[SZ]] [[ARG]])
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|
// CHECK: call void @__kmpc_end_serialized_parallel(
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|
|
// CHECK: br label {{%?}}[[END]]
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|
//
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|
// CHECK: [[END]]
|
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//
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//
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// CHECK: define internal void [[HVT2]]([[S1]]* {{%.+}}, i[[SZ]] [[PARM:%.+]])
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|
|
// CHECK-DAG: store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align
|
|
|
|
// CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i8*
|
|
|
|
// CHECK: [[IFC:%.+]] = load i8, i8* [[CONV]], align
|
|
|
|
// CHECK: [[TB:%.+]] = trunc i8 [[IFC]] to i1
|
|
|
|
// CHECK: br i1 [[TB]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]]
|
|
|
|
//
|
|
|
|
// CHECK: [[IF_THEN]]
|
2018-04-17 01:59:34 +08:00
|
|
|
// CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [[S1]]*)* [[OMP_OUTLINED4:@.+]] to void (i32*, i32*, ...)*), [[S1]]* {{.+}})
|
2017-01-19 04:40:48 +08:00
|
|
|
// CHECK: br label {{%?}}[[END:.+]]
|
|
|
|
//
|
|
|
|
// CHECK: [[IF_ELSE]]
|
|
|
|
// CHECK: call void @__kmpc_serialized_parallel(
|
|
|
|
// CHECK: call void [[OMP_OUTLINED4]](i32* {{%.+}}, i32* {{%.+}}, [[S1]]* {{.+}})
|
|
|
|
// CHECK: call void @__kmpc_end_serialized_parallel(
|
|
|
|
// CHECK: br label {{%?}}[[END]]
|
|
|
|
//
|
|
|
|
// CHECK: [[END]]
|
|
|
|
//
|
|
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|
//
|
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|
// CHECK: define internal void [[HVT3]](i[[SZ]] [[PARM:%.+]])
|
|
|
|
// CHECK-DAG: store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align
|
|
|
|
// CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i8*
|
|
|
|
// CHECK: [[IFC:%.+]] = load i8, i8* [[CONV]], align
|
|
|
|
// CHECK: [[TB:%.+]] = trunc i8 [[IFC]] to i1
|
|
|
|
// CHECK: br i1 [[TB]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]]
|
|
|
|
//
|
|
|
|
// CHECK: [[IF_THEN]]
|
2018-04-17 01:59:34 +08:00
|
|
|
// CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* [[OMP_OUTLINED1:@.+]] to void (i32*, i32*, ...)*))
|
2017-01-19 04:40:48 +08:00
|
|
|
// CHECK: br label {{%?}}[[END:.+]]
|
|
|
|
//
|
|
|
|
// CHECK: [[IF_ELSE]]
|
|
|
|
// CHECK: call void @__kmpc_serialized_parallel(
|
|
|
|
// CHECK: call void [[OMP_OUTLINED1]](i32* {{%.+}}, i32* {{%.+}})
|
|
|
|
// CHECK: call void @__kmpc_end_serialized_parallel(
|
|
|
|
// CHECK: br label {{%?}}[[END]]
|
|
|
|
//
|
|
|
|
// CHECK: [[END]]
|
|
|
|
//
|
|
|
|
//
|
|
|
|
// CHECK: define internal void [[HVT4]]()
|
2018-04-17 01:59:34 +08:00
|
|
|
// CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* [[OMP_OUTLINED2:@.+]] to void (i32*, i32*, ...)*))
|
2017-01-19 04:40:48 +08:00
|
|
|
// CHECK-NEXT: ret
|
|
|
|
//
|
|
|
|
//
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
// CHECK: define internal void [[HVT5]](
|
|
|
|
// CHECK-NOT: @__kmpc_fork_call
|
|
|
|
// CHECK: call void @__kmpc_serialized_parallel(
|
|
|
|
// CHECK: call void [[OMP_OUTLINED5:@.+]](i32* {{%.+}}, i32* {{%.+}}, i[[SZ]] {{.+}})
|
|
|
|
// CHECK: call void @__kmpc_end_serialized_parallel(
|
|
|
|
// CHECK: ret
|
|
|
|
//
|
|
|
|
//
|
|
|
|
|
|
|
|
|
|
|
|
// CHECK: define internal void [[HVT6]](
|
|
|
|
// CHECK-NOT: call void @__kmpc_serialized_parallel(
|
|
|
|
// CHECK-NOT: call void [[OMP_OUTLINED5:@.+]](i32* {{%.+}}, i32* {{%.+}}, i[[SZ]] {{.+}})
|
|
|
|
// CHECK-NOT: call void @__kmpc_end_serialized_parallel(
|
2018-04-17 01:59:34 +08:00
|
|
|
// CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]])* [[OMP_OUTLINED5:@.+]] to void (i32*, i32*, ...)*),
|
2017-01-19 04:40:48 +08:00
|
|
|
// CHECK: ret
|
|
|
|
//
|
|
|
|
//
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#endif
|