2019-02-21 01:42:57 +08:00
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// RUN: %clang_cc1 -fopenmp -x c -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc
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2019-07-09 22:09:53 +08:00
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// RUN: %clang_cc1 -verify -fopenmp -x c -triple nvptx-unknown-unknown -aux-triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -fsyntax-only -Wuninitialized
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// RUN: %clang_cc1 -verify -DDIAGS -DIMMEDIATE -fopenmp -x c -triple nvptx-unknown-unknown -aux-triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -fsyntax-only -Wuninitialized
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// RUN: %clang_cc1 -verify -DDIAGS -DDELAYED -fopenmp -x c -triple nvptx-unknown-unknown -aux-triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -fsyntax-only -Wuninitialized
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2019-08-24 00:11:14 +08:00
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// RUN: %clang_cc1 -fopenmp -x c -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -fopenmp-version=50 -emit-llvm-bc %s -o %t-x86-host.bc
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// RUN: %clang_cc1 -verify=expected,omp5 -fopenmp -x c -triple nvptx-unknown-unknown -aux-triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -fopenmp-version=50 %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -fsyntax-only -Wuninitialized
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// RUN: %clang_cc1 -verify=expected,omp5 -DDIAGS -DOMP5 -DIMMEDIATE -fopenmp -fopenmp-version=50 -x c -triple nvptx-unknown-unknown -aux-triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -fsyntax-only -Wuninitialized
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// RUN: %clang_cc1 -verify=expected,omp5 -DDIAGS -DOMP5 -DDELAYED -fopenmp -fopenmp-version=50 -x c -triple nvptx-unknown-unknown -aux-triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -fsyntax-only -Wuninitialized
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2019-02-21 01:42:57 +08:00
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// REQUIRES: x86-registered-target
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// REQUIRES: nvptx-registered-target
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#ifndef DIAGS
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// expected-no-diagnostics
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#endif // DIAGS
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2019-08-24 00:11:14 +08:00
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#ifdef OMP5
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void bar(int r) {
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#ifdef IMMEDIATE
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// omp5-error@+4 {{invalid input constraint 'mx' in asm}}
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#endif // IMMEDIATE
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__asm__("PR3908 %[lf] %[xx] %[li] %[r]"
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: [ r ] "+r"(r)
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: [ lf ] "mx"(0), [ li ] "mr"(0), [ xx ] "x"((double)(0)));
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}
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#ifdef IMMEDIATE
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#pragma omp declare target to(bar) device_type(nohost)
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#else
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#pragma omp declare target to(bar) device_type(host)
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#endif // IMMEDIATE
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#endif // OMP5
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2019-08-21 03:50:13 +08:00
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void foo(int r) {
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#ifdef IMMEDIATE
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// expected-error@+4 {{invalid input constraint 'mx' in asm}}
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#endif // IMMEDIATE
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__asm__("PR3908 %[lf] %[xx] %[li] %[r]"
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: [ r ] "+r"(r)
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: [ lf ] "mx"(0), [ li ] "mr"(0), [ xx ] "x"((double)(0)));
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}
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#ifdef IMMEDIATE
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#pragma omp declare target to(foo)
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#endif //IMMEDIATE
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2019-02-21 01:42:57 +08:00
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#ifdef IMMEDIATE
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#pragma omp declare target
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#endif //IMMEDIATE
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void t1(int r) {
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#ifdef DIAGS
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// expected-error@+4 {{invalid input constraint 'mx' in asm}}
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#endif // DIAGS
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__asm__("PR3908 %[lf] %[xx] %[li] %[r]"
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: [ r ] "+r"(r)
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: [ lf ] "mx"(0), [ li ] "mr"(0), [ xx ] "x"((double)(0)));
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}
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unsigned t2(signed char input) {
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unsigned output;
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#ifdef DIAGS
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// expected-error@+3 {{invalid output constraint '=a' in asm}}
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#endif // DIAGS
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__asm__("xyz"
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: "=a"(output)
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: "0"(input));
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return output;
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}
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double t3(double x) {
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register long double result;
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#ifdef DIAGS
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// expected-error@+3 {{invalid output constraint '=t' in asm}}
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#endif // DIAGS
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__asm __volatile("frndint"
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: "=t"(result)
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: "0"(x));
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return result;
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}
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unsigned char t4(unsigned char a, unsigned char b) {
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unsigned int la = a;
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unsigned int lb = b;
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unsigned int bigres;
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unsigned char res;
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#ifdef DIAGS
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// expected-error@+3 {{invalid output constraint '=la' in asm}}
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#endif // DIAGS
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__asm__("0:\n1:\n"
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: [ bigres ] "=la"(bigres)
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: [ la ] "0"(la), [ lb ] "c"(lb)
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: "edx", "cc");
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res = bigres;
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return res;
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}
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void t5(void) {
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#ifdef DIAGS
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// expected-error@+6 {{unknown register name 'st' in asm}}
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#endif // DIAGS
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__asm__ __volatile__(
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"finit"
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:
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:
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: "st", "st(1)", "st(2)", "st(3)",
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"st(4)", "st(5)", "st(6)", "st(7)",
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"fpsr", "fpcr");
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}
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typedef long long __m256i __attribute__((__vector_size__(32)));
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void t6(__m256i *p) {
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#ifdef DIAGS
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// expected-error@+3 {{unknown register name 'ymm0' in asm}}
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#endif // DIAGS
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__asm__ volatile("vmovaps %0, %%ymm0" ::"m"(*(__m256i *)p)
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: "ymm0");
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}
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#ifdef IMMEDIATE
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#pragma omp end declare target
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#endif //IMMEDIATE
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int main() {
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#ifdef DELAYED
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#pragma omp target
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#endif // DELAYED
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{
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#ifdef DELAYED
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// expected-note@+2 {{called by 'main'}}
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#endif // DELAYED
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t1(0);
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#ifdef DELAYED
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// expected-note@+2 {{called by 'main'}}
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#endif // DELAYED
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t2(0);
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#ifdef DELAYED
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// expected-note@+2 {{called by 'main'}}
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#endif // DELAYED
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t3(0);
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#ifdef DELAYED
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// expected-note@+2 {{called by 'main'}}
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#endif // DELAYED
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t4(0, 0);
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#ifdef DELAYED
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// expected-note@+2 {{called by 'main'}}
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#endif // DELAYED
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t5();
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#ifdef DELAYED
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// expected-note@+2 {{called by 'main'}}
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#endif // DELAYED
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t6(0);
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}
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return 0;
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}
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