2015-02-02 00:15:07 +08:00
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//===-- X86TargetFrameLowering.h - Define frame lowering for X86 -*- C++ -*-==//
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//
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2019-01-19 16:50:56 +08:00
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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2015-02-02 00:15:07 +08:00
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//
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//===----------------------------------------------------------------------===//
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//
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// This class implements X86-specific bits of TargetFrameLowering class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_X86_X86FRAMELOWERING_H
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#define LLVM_LIB_TARGET_X86_X86FRAMELOWERING_H
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2017-11-04 06:32:11 +08:00
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#include "llvm/CodeGen/TargetFrameLowering.h"
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2020-11-04 16:56:54 +08:00
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#include "llvm/Support/TypeSize.h"
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2015-02-02 00:15:07 +08:00
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namespace llvm {
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2015-06-19 04:22:12 +08:00
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class MachineInstrBuilder;
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2015-06-19 02:03:25 +08:00
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class MCCFIInstruction;
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2017-04-13 22:10:52 +08:00
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class X86InstrInfo;
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2015-06-18 05:50:02 +08:00
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class X86Subtarget;
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class X86RegisterInfo;
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2015-02-02 00:15:07 +08:00
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class X86FrameLowering : public TargetFrameLowering {
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public:
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[Alignment][NFC] Use Align for TargetFrameLowering/Subtarget
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: jholewinski, arsenm, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, nhaehnle, sbc100, jgravelle-google, hiraditya, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, Jim, lenary, s.egerton, pzheng, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68993
llvm-svn: 375084
2019-10-17 15:49:39 +08:00
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X86FrameLowering(const X86Subtarget &STI, MaybeAlign StackAlignOverride);
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2015-06-18 05:50:02 +08:00
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// Cached subtarget predicates.
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const X86Subtarget &STI;
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2017-04-13 22:10:52 +08:00
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const X86InstrInfo &TII;
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2015-06-19 04:32:02 +08:00
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const X86RegisterInfo *TRI;
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2015-06-18 05:50:02 +08:00
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unsigned SlotSize;
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/// Is64Bit implies that x86_64 instructions are available.
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bool Is64Bit;
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bool IsLP64;
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/// True if the 64-bit frame or stack pointer should be used. True for most
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/// 64-bit targets with the exception of x32. If this is false, 32-bit
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/// instruction operands should be used to manipulate StackPtr and FramePtr.
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bool Uses64BitFramePtr;
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2015-02-02 00:15:07 +08:00
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2015-06-19 02:03:25 +08:00
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unsigned StackPtr;
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2015-11-10 09:50:49 +08:00
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/// Emit target stack probe code. This is required for all
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2015-02-02 00:15:07 +08:00
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/// large stack allocations on Windows. The caller is required to materialize
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2016-10-13 23:48:48 +08:00
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/// the number of bytes to probe in RAX/EAX.
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void emitStackProbe(MachineFunction &MF, MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI, const DebugLoc &DL,
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bool InProlog) const;
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2015-11-10 09:50:49 +08:00
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/// Replace a StackProbe inline-stub with the actual probe code inline.
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void inlineStackProbe(MachineFunction &MF,
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MachineBasicBlock &PrologMBB) const override;
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2015-02-02 00:15:07 +08:00
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Call Frame Information (CFI) Handling for Basic Block Sections
This patch handles CFI with basic block sections, which unlike DebugInfo does
not support ranges. The DWARF standard explicitly requires emitting separate
CFI Frame Descriptor Entries for each contiguous fragment of a function. Thus,
the CFI information for all callee-saved registers (possibly including the
frame pointer, if necessary) have to be emitted along with redefining the
Call Frame Address (CFA), viz. where the current frame starts.
CFI directives are emitted in FDE’s in the object file with a low_pc, high_pc
specification. So, a single FDE must point to a contiguous code region unlike
debug info which has the support for ranges. This is what complicates CFI for
basic block sections.
Now, what happens when we start placing individual basic blocks in unique
sections:
* Basic block sections allow the linker to randomly reorder basic blocks in the
address space such that a given basic block can become non-contiguous with the
original function.
* The different basic block sections can no longer share the cfi_startproc and
cfi_endproc directives. So, each basic block section should emit this
independently.
* Each (cfi_startproc, cfi_endproc) directive will result in a new FDE that
caters to that basic block section.
* Now, this basic block section needs to duplicate the information from the
entry block to compute the CFA as it is an independent entity. It cannot refer
to the FDE of the original function and hence must duplicate all the stuff that
is needed to compute the CFA on its own.
* We are working on a de-duplication patch that can share common information in
FDEs in a CIE (Common Information Entry) and we will present this as a follow up
patch. This can significantly reduce the duplication overhead and is
particularly useful when several basic block sections are created.
* The CFI directives are emitted similarly for registers that are pushed onto
the stack, like callee saved registers in the prologue. There are cfi
directives that emit how to retrieve the value of the register at that point
when the push happened. This has to be duplicated too in a basic block that is
floated as a separate section.
Differential Revision: https://reviews.llvm.org/D79978
2020-07-15 02:55:41 +08:00
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void
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emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI) const override;
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2015-02-02 00:15:07 +08:00
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void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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Call Frame Information (CFI) Handling for Basic Block Sections
This patch handles CFI with basic block sections, which unlike DebugInfo does
not support ranges. The DWARF standard explicitly requires emitting separate
CFI Frame Descriptor Entries for each contiguous fragment of a function. Thus,
the CFI information for all callee-saved registers (possibly including the
frame pointer, if necessary) have to be emitted along with redefining the
Call Frame Address (CFA), viz. where the current frame starts.
CFI directives are emitted in FDE’s in the object file with a low_pc, high_pc
specification. So, a single FDE must point to a contiguous code region unlike
debug info which has the support for ranges. This is what complicates CFI for
basic block sections.
Now, what happens when we start placing individual basic blocks in unique
sections:
* Basic block sections allow the linker to randomly reorder basic blocks in the
address space such that a given basic block can become non-contiguous with the
original function.
* The different basic block sections can no longer share the cfi_startproc and
cfi_endproc directives. So, each basic block section should emit this
independently.
* Each (cfi_startproc, cfi_endproc) directive will result in a new FDE that
caters to that basic block section.
* Now, this basic block section needs to duplicate the information from the
entry block to compute the CFA as it is an independent entity. It cannot refer
to the FDE of the original function and hence must duplicate all the stuff that
is needed to compute the CFA on its own.
* We are working on a de-duplication patch that can share common information in
FDEs in a CIE (Common Information Entry) and we will present this as a follow up
patch. This can significantly reduce the duplication overhead and is
particularly useful when several basic block sections are created.
* The CFI directives are emitted similarly for registers that are pushed onto
the stack, like callee saved registers in the prologue. There are cfi
directives that emit how to retrieve the value of the register at that point
when the push happened. This has to be duplicated too in a basic block that is
floated as a separate section.
Differential Revision: https://reviews.llvm.org/D79978
2020-07-15 02:55:41 +08:00
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const DebugLoc &DL,
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bool IsPrologue) const override;
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2015-02-02 00:15:07 +08:00
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/// emitProlog/emitEpilog - These methods insert prolog and epilog code into
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/// the function.
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[ShrinkWrap] Add (a simplified version) of shrink-wrapping.
This patch introduces a new pass that computes the safe point to insert the
prologue and epilogue of the function.
The interest is to find safe points that are cheaper than the entry and exits
blocks.
As an example and to avoid regressions to be introduce, this patch also
implements the required bits to enable the shrink-wrapping pass for AArch64.
** Context **
Currently we insert the prologue and epilogue of the method/function in the
entry and exits blocks. Although this is correct, we can do a better job when
those are not immediately required and insert them at less frequently executed
places.
The job of the shrink-wrapping pass is to identify such places.
** Motivating example **
Let us consider the following function that perform a call only in one branch of
a if:
define i32 @f(i32 %a, i32 %b) {
%tmp = alloca i32, align 4
%tmp2 = icmp slt i32 %a, %b
br i1 %tmp2, label %true, label %false
true:
store i32 %a, i32* %tmp, align 4
%tmp4 = call i32 @doSomething(i32 0, i32* %tmp)
br label %false
false:
%tmp.0 = phi i32 [ %tmp4, %true ], [ %a, %0 ]
ret i32 %tmp.0
}
On AArch64 this code generates (removing the cfi directives to ease
readabilities):
_f: ; @f
; BB#0:
stp x29, x30, [sp, #-16]!
mov x29, sp
sub sp, sp, #16 ; =16
cmp w0, w1
b.ge LBB0_2
; BB#1: ; %true
stur w0, [x29, #-4]
sub x1, x29, #4 ; =4
mov w0, wzr
bl _doSomething
LBB0_2: ; %false
mov sp, x29
ldp x29, x30, [sp], #16
ret
With shrink-wrapping we could generate:
_f: ; @f
; BB#0:
cmp w0, w1
b.ge LBB0_2
; BB#1: ; %true
stp x29, x30, [sp, #-16]!
mov x29, sp
sub sp, sp, #16 ; =16
stur w0, [x29, #-4]
sub x1, x29, #4 ; =4
mov w0, wzr
bl _doSomething
add sp, x29, #16 ; =16
ldp x29, x30, [sp], #16
LBB0_2: ; %false
ret
Therefore, we would pay the overhead of setting up/destroying the frame only if
we actually do the call.
** Proposed Solution **
This patch introduces a new machine pass that perform the shrink-wrapping
analysis (See the comments at the beginning of ShrinkWrap.cpp for more details).
It then stores the safe save and restore point into the MachineFrameInfo
attached to the MachineFunction.
This information is then used by the PrologEpilogInserter (PEI) to place the
related code at the right place. This pass runs right before the PEI.
Unlike the original paper of Chow from PLDI’88, this implementation of
shrink-wrapping does not use expensive data-flow analysis and does not need hack
to properly avoid frequently executed point. Instead, it relies on dominance and
loop properties.
The pass is off by default and each target can opt-in by setting the
EnableShrinkWrap boolean to true in their derived class of TargetPassConfig.
This setting can also be overwritten on the command line by using
-enable-shrink-wrap.
Before you try out the pass for your target, make sure you properly fix your
emitProlog/emitEpilog/adjustForXXX method to cope with basic blocks that are not
necessarily the entry block.
** Design Decisions **
1. ShrinkWrap is its own pass right now. It could frankly be merged into PEI but
for debugging and clarity I thought it was best to have its own file.
2. Right now, we only support one save point and one restore point. At some
point we can expand this to several save point and restore point, the impacted
component would then be:
- The pass itself: New algorithm needed.
- MachineFrameInfo: Hold a list or set of Save/Restore point instead of one
pointer.
- PEI: Should loop over the save point and restore point.
Anyhow, at least for this first iteration, I do not believe this is interesting
to support the complex cases. We should revisit that when we motivating
examples.
Differential Revision: http://reviews.llvm.org/D9210
<rdar://problem/3201744>
llvm-svn: 236507
2015-05-06 01:38:16 +08:00
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void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
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2015-02-02 00:15:07 +08:00
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void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
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[ShrinkWrap] Add (a simplified version) of shrink-wrapping.
This patch introduces a new pass that computes the safe point to insert the
prologue and epilogue of the function.
The interest is to find safe points that are cheaper than the entry and exits
blocks.
As an example and to avoid regressions to be introduce, this patch also
implements the required bits to enable the shrink-wrapping pass for AArch64.
** Context **
Currently we insert the prologue and epilogue of the method/function in the
entry and exits blocks. Although this is correct, we can do a better job when
those are not immediately required and insert them at less frequently executed
places.
The job of the shrink-wrapping pass is to identify such places.
** Motivating example **
Let us consider the following function that perform a call only in one branch of
a if:
define i32 @f(i32 %a, i32 %b) {
%tmp = alloca i32, align 4
%tmp2 = icmp slt i32 %a, %b
br i1 %tmp2, label %true, label %false
true:
store i32 %a, i32* %tmp, align 4
%tmp4 = call i32 @doSomething(i32 0, i32* %tmp)
br label %false
false:
%tmp.0 = phi i32 [ %tmp4, %true ], [ %a, %0 ]
ret i32 %tmp.0
}
On AArch64 this code generates (removing the cfi directives to ease
readabilities):
_f: ; @f
; BB#0:
stp x29, x30, [sp, #-16]!
mov x29, sp
sub sp, sp, #16 ; =16
cmp w0, w1
b.ge LBB0_2
; BB#1: ; %true
stur w0, [x29, #-4]
sub x1, x29, #4 ; =4
mov w0, wzr
bl _doSomething
LBB0_2: ; %false
mov sp, x29
ldp x29, x30, [sp], #16
ret
With shrink-wrapping we could generate:
_f: ; @f
; BB#0:
cmp w0, w1
b.ge LBB0_2
; BB#1: ; %true
stp x29, x30, [sp, #-16]!
mov x29, sp
sub sp, sp, #16 ; =16
stur w0, [x29, #-4]
sub x1, x29, #4 ; =4
mov w0, wzr
bl _doSomething
add sp, x29, #16 ; =16
ldp x29, x30, [sp], #16
LBB0_2: ; %false
ret
Therefore, we would pay the overhead of setting up/destroying the frame only if
we actually do the call.
** Proposed Solution **
This patch introduces a new machine pass that perform the shrink-wrapping
analysis (See the comments at the beginning of ShrinkWrap.cpp for more details).
It then stores the safe save and restore point into the MachineFrameInfo
attached to the MachineFunction.
This information is then used by the PrologEpilogInserter (PEI) to place the
related code at the right place. This pass runs right before the PEI.
Unlike the original paper of Chow from PLDI’88, this implementation of
shrink-wrapping does not use expensive data-flow analysis and does not need hack
to properly avoid frequently executed point. Instead, it relies on dominance and
loop properties.
The pass is off by default and each target can opt-in by setting the
EnableShrinkWrap boolean to true in their derived class of TargetPassConfig.
This setting can also be overwritten on the command line by using
-enable-shrink-wrap.
Before you try out the pass for your target, make sure you properly fix your
emitProlog/emitEpilog/adjustForXXX method to cope with basic blocks that are not
necessarily the entry block.
** Design Decisions **
1. ShrinkWrap is its own pass right now. It could frankly be merged into PEI but
for debugging and clarity I thought it was best to have its own file.
2. Right now, we only support one save point and one restore point. At some
point we can expand this to several save point and restore point, the impacted
component would then be:
- The pass itself: New algorithm needed.
- MachineFrameInfo: Hold a list or set of Save/Restore point instead of one
pointer.
- PEI: Should loop over the save point and restore point.
Anyhow, at least for this first iteration, I do not believe this is interesting
to support the complex cases. We should revisit that when we motivating
examples.
Differential Revision: http://reviews.llvm.org/D9210
<rdar://problem/3201744>
llvm-svn: 236507
2015-05-06 01:38:16 +08:00
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void adjustForSegmentedStacks(MachineFunction &MF,
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MachineBasicBlock &PrologueMBB) const override;
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2015-02-02 00:15:07 +08:00
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[ShrinkWrap] Add (a simplified version) of shrink-wrapping.
This patch introduces a new pass that computes the safe point to insert the
prologue and epilogue of the function.
The interest is to find safe points that are cheaper than the entry and exits
blocks.
As an example and to avoid regressions to be introduce, this patch also
implements the required bits to enable the shrink-wrapping pass for AArch64.
** Context **
Currently we insert the prologue and epilogue of the method/function in the
entry and exits blocks. Although this is correct, we can do a better job when
those are not immediately required and insert them at less frequently executed
places.
The job of the shrink-wrapping pass is to identify such places.
** Motivating example **
Let us consider the following function that perform a call only in one branch of
a if:
define i32 @f(i32 %a, i32 %b) {
%tmp = alloca i32, align 4
%tmp2 = icmp slt i32 %a, %b
br i1 %tmp2, label %true, label %false
true:
store i32 %a, i32* %tmp, align 4
%tmp4 = call i32 @doSomething(i32 0, i32* %tmp)
br label %false
false:
%tmp.0 = phi i32 [ %tmp4, %true ], [ %a, %0 ]
ret i32 %tmp.0
}
On AArch64 this code generates (removing the cfi directives to ease
readabilities):
_f: ; @f
; BB#0:
stp x29, x30, [sp, #-16]!
mov x29, sp
sub sp, sp, #16 ; =16
cmp w0, w1
b.ge LBB0_2
; BB#1: ; %true
stur w0, [x29, #-4]
sub x1, x29, #4 ; =4
mov w0, wzr
bl _doSomething
LBB0_2: ; %false
mov sp, x29
ldp x29, x30, [sp], #16
ret
With shrink-wrapping we could generate:
_f: ; @f
; BB#0:
cmp w0, w1
b.ge LBB0_2
; BB#1: ; %true
stp x29, x30, [sp, #-16]!
mov x29, sp
sub sp, sp, #16 ; =16
stur w0, [x29, #-4]
sub x1, x29, #4 ; =4
mov w0, wzr
bl _doSomething
add sp, x29, #16 ; =16
ldp x29, x30, [sp], #16
LBB0_2: ; %false
ret
Therefore, we would pay the overhead of setting up/destroying the frame only if
we actually do the call.
** Proposed Solution **
This patch introduces a new machine pass that perform the shrink-wrapping
analysis (See the comments at the beginning of ShrinkWrap.cpp for more details).
It then stores the safe save and restore point into the MachineFrameInfo
attached to the MachineFunction.
This information is then used by the PrologEpilogInserter (PEI) to place the
related code at the right place. This pass runs right before the PEI.
Unlike the original paper of Chow from PLDI’88, this implementation of
shrink-wrapping does not use expensive data-flow analysis and does not need hack
to properly avoid frequently executed point. Instead, it relies on dominance and
loop properties.
The pass is off by default and each target can opt-in by setting the
EnableShrinkWrap boolean to true in their derived class of TargetPassConfig.
This setting can also be overwritten on the command line by using
-enable-shrink-wrap.
Before you try out the pass for your target, make sure you properly fix your
emitProlog/emitEpilog/adjustForXXX method to cope with basic blocks that are not
necessarily the entry block.
** Design Decisions **
1. ShrinkWrap is its own pass right now. It could frankly be merged into PEI but
for debugging and clarity I thought it was best to have its own file.
2. Right now, we only support one save point and one restore point. At some
point we can expand this to several save point and restore point, the impacted
component would then be:
- The pass itself: New algorithm needed.
- MachineFrameInfo: Hold a list or set of Save/Restore point instead of one
pointer.
- PEI: Should loop over the save point and restore point.
Anyhow, at least for this first iteration, I do not believe this is interesting
to support the complex cases. We should revisit that when we motivating
examples.
Differential Revision: http://reviews.llvm.org/D9210
<rdar://problem/3201744>
llvm-svn: 236507
2015-05-06 01:38:16 +08:00
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void adjustForHiPEPrologue(MachineFunction &MF,
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MachineBasicBlock &PrologueMBB) const override;
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2015-02-02 00:15:07 +08:00
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2015-07-15 01:17:13 +08:00
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void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
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RegScavenger *RS = nullptr) const override;
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2015-02-02 00:15:07 +08:00
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bool
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assignCalleeSavedSpillSlots(MachineFunction &MF,
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const TargetRegisterInfo *TRI,
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std::vector<CalleeSavedInfo> &CSI) const override;
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bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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2020-02-08 19:14:37 +08:00
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ArrayRef<CalleeSavedInfo> CSI,
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2015-02-02 00:15:07 +08:00
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const TargetRegisterInfo *TRI) const override;
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2020-02-29 16:50:23 +08:00
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bool
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restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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MutableArrayRef<CalleeSavedInfo> CSI,
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|
|
|
|
const TargetRegisterInfo *TRI) const override;
|
2015-02-02 00:15:07 +08:00
|
|
|
|
|
|
|
|
bool hasFP(const MachineFunction &MF) const override;
|
|
|
|
|
bool hasReservedCallFrame(const MachineFunction &MF) const override;
|
2015-02-02 00:56:04 +08:00
|
|
|
bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override;
|
|
|
|
|
bool needsFrameIndexResolution(const MachineFunction &MF) const override;
|
2015-02-02 00:15:07 +08:00
|
|
|
|
2020-11-04 16:56:54 +08:00
|
|
|
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
|
|
|
|
|
Register &FrameReg) const override;
|
2015-02-02 00:15:07 +08:00
|
|
|
|
2020-04-08 04:33:58 +08:00
|
|
|
int getWin64EHFrameIndexRef(const MachineFunction &MF, int FI,
|
|
|
|
|
Register &SPReg) const;
|
2020-11-04 16:56:54 +08:00
|
|
|
StackOffset getFrameIndexReferenceSP(const MachineFunction &MF, int FI,
|
|
|
|
|
Register &SPReg, int Adjustment) const;
|
|
|
|
|
StackOffset
|
|
|
|
|
getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI,
|
|
|
|
|
Register &FrameReg,
|
|
|
|
|
bool IgnoreSPUpdates) const override;
|
2015-02-02 00:15:07 +08:00
|
|
|
|
2016-04-01 02:33:38 +08:00
|
|
|
MachineBasicBlock::iterator
|
|
|
|
|
eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
|
|
|
|
|
MachineBasicBlock::iterator MI) const override;
|
2015-02-02 00:15:07 +08:00
|
|
|
|
2015-10-17 07:43:27 +08:00
|
|
|
unsigned getWinEHParentFrameOffset(const MachineFunction &MF) const override;
|
|
|
|
|
|
2015-11-14 03:06:01 +08:00
|
|
|
void processFunctionBeforeFrameFinalized(MachineFunction &MF,
|
|
|
|
|
RegScavenger *RS) const override;
|
|
|
|
|
|
2020-01-31 07:15:57 +08:00
|
|
|
void
|
|
|
|
|
processFunctionBeforeFrameIndicesReplaced(MachineFunction &MF,
|
|
|
|
|
RegScavenger *RS) const override;
|
|
|
|
|
|
2015-05-23 02:10:47 +08:00
|
|
|
/// Check the instruction before/after the passed instruction. If
|
|
|
|
|
/// it is an ADD/SUB/LEA instruction it is deleted argument and the
|
|
|
|
|
/// stack adjustment is returned as a positive value for ADD/LEA and
|
|
|
|
|
/// a negative for SUB.
|
2015-06-18 05:50:02 +08:00
|
|
|
int mergeSPUpdates(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
|
2015-06-19 02:03:25 +08:00
|
|
|
bool doMergeWithPrevious) const;
|
2015-05-23 02:10:47 +08:00
|
|
|
|
|
|
|
|
/// Emit a series of instructions to increment / decrement the stack
|
|
|
|
|
/// pointer by a constant value.
|
2015-06-18 05:50:02 +08:00
|
|
|
void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
|
2018-02-15 01:35:52 +08:00
|
|
|
const DebugLoc &DL, int64_t NumBytes, bool InEpilogue) const;
|
2015-05-23 02:10:47 +08:00
|
|
|
|
2015-05-27 14:28:41 +08:00
|
|
|
/// Check that LEA can be used on SP in an epilogue sequence for \p MF.
|
|
|
|
|
bool canUseLEAForSPInEpilogue(const MachineFunction &MF) const;
|
|
|
|
|
|
2016-04-27 07:44:14 +08:00
|
|
|
/// Check whether or not the given \p MBB can be used as a prologue
|
|
|
|
|
/// for the target.
|
|
|
|
|
/// The prologue will be inserted first in this basic block.
|
|
|
|
|
/// This method is used by the shrink-wrapping pass to decide if
|
|
|
|
|
/// \p MBB will be correctly handled by the target.
|
|
|
|
|
/// As soon as the target enable shrink-wrapping without overriding
|
|
|
|
|
/// this method, we assume that each basic block is a valid
|
|
|
|
|
/// prologue.
|
|
|
|
|
bool canUseAsPrologue(const MachineBasicBlock &MBB) const override;
|
|
|
|
|
|
2015-05-27 14:28:41 +08:00
|
|
|
/// Check whether or not the given \p MBB can be used as a epilogue
|
|
|
|
|
/// for the target.
|
|
|
|
|
/// The epilogue will be inserted before the first terminator of that block.
|
|
|
|
|
/// This method is used by the shrink-wrapping pass to decide if
|
|
|
|
|
/// \p MBB will be correctly handled by the target.
|
|
|
|
|
bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override;
|
2015-12-10 07:08:18 +08:00
|
|
|
|
|
|
|
|
/// Returns true if the target will correctly handle shrink wrapping.
|
|
|
|
|
bool enableShrinkWrapping(const MachineFunction &MF) const override;
|
2016-02-16 07:44:13 +08:00
|
|
|
|
|
|
|
|
/// Order the symbols in the local stack.
|
|
|
|
|
/// We want to place the local stack objects in some sort of sensible order.
|
|
|
|
|
/// The heuristic we use is to try and pack them according to static number
|
|
|
|
|
/// of uses and size in order to minimize code size.
|
|
|
|
|
void orderFrameObjects(const MachineFunction &MF,
|
|
|
|
|
SmallVectorImpl<int> &ObjectsToAllocate) const override;
|
2015-05-23 02:10:47 +08:00
|
|
|
|
2015-06-19 02:03:25 +08:00
|
|
|
/// Wraps up getting a CFI index and building a MachineInstr for it.
|
|
|
|
|
void BuildCFI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
|
2016-06-12 23:39:02 +08:00
|
|
|
const DebugLoc &DL, const MCCFIInstruction &CFIInst) const;
|
2015-06-19 02:03:25 +08:00
|
|
|
|
2015-11-06 09:49:05 +08:00
|
|
|
/// Sets up EBP and optionally ESI based on the incoming EBP value. Only
|
|
|
|
|
/// needed for 32-bit. Used in funclet prologues and at catchret destinations.
|
|
|
|
|
MachineBasicBlock::iterator
|
|
|
|
|
restoreWin32EHStackPointers(MachineBasicBlock &MBB,
|
2016-06-12 23:39:02 +08:00
|
|
|
MachineBasicBlock::iterator MBBI,
|
|
|
|
|
const DebugLoc &DL, bool RestoreSP = false) const;
|
2015-11-06 09:49:05 +08:00
|
|
|
|
2020-01-31 07:15:57 +08:00
|
|
|
void restoreWinEHStackPointersInParent(MachineFunction &MF) const;
|
|
|
|
|
|
2018-04-24 18:32:08 +08:00
|
|
|
int getInitialCFAOffset(const MachineFunction &MF) const override;
|
|
|
|
|
|
2020-04-08 04:33:58 +08:00
|
|
|
Register getInitialCFARegister(const MachineFunction &MF) const override;
|
2018-04-24 18:32:08 +08:00
|
|
|
|
2019-05-11 06:55:42 +08:00
|
|
|
/// Return true if the function has a redzone (accessible bytes past the
|
2020-04-08 04:33:58 +08:00
|
|
|
/// frame of the top of stack function) as part of it's ABI.
|
2019-05-11 06:55:42 +08:00
|
|
|
bool has128ByteRedZone(const MachineFunction& MF) const;
|
|
|
|
|
|
2015-11-03 16:17:25 +08:00
|
|
|
private:
|
|
|
|
|
uint64_t calculateMaxStackAlign(const MachineFunction &MF) const;
|
|
|
|
|
|
2015-11-10 09:50:49 +08:00
|
|
|
/// Emit target stack probe as a call to a helper function
|
2016-10-13 23:48:48 +08:00
|
|
|
void emitStackProbeCall(MachineFunction &MF, MachineBasicBlock &MBB,
|
|
|
|
|
MachineBasicBlock::iterator MBBI, const DebugLoc &DL,
|
|
|
|
|
bool InProlog) const;
|
2015-11-10 09:50:49 +08:00
|
|
|
|
|
|
|
|
/// Emit target stack probe as an inline sequence.
|
2016-10-13 23:48:48 +08:00
|
|
|
void emitStackProbeInline(MachineFunction &MF, MachineBasicBlock &MBB,
|
|
|
|
|
MachineBasicBlock::iterator MBBI,
|
|
|
|
|
const DebugLoc &DL, bool InProlog) const;
|
2019-09-09 22:59:34 +08:00
|
|
|
void emitStackProbeInlineWindowsCoreCLR64(MachineFunction &MF,
|
|
|
|
|
MachineBasicBlock &MBB,
|
|
|
|
|
MachineBasicBlock::iterator MBBI,
|
|
|
|
|
const DebugLoc &DL,
|
|
|
|
|
bool InProlog) const;
|
|
|
|
|
void emitStackProbeInlineGeneric(MachineFunction &MF, MachineBasicBlock &MBB,
|
|
|
|
|
MachineBasicBlock::iterator MBBI,
|
|
|
|
|
const DebugLoc &DL, bool InProlog) const;
|
|
|
|
|
|
|
|
|
|
void emitStackProbeInlineGenericBlock(MachineFunction &MF,
|
|
|
|
|
MachineBasicBlock &MBB,
|
|
|
|
|
MachineBasicBlock::iterator MBBI,
|
2020-07-23 22:22:48 +08:00
|
|
|
const DebugLoc &DL, uint64_t Offset,
|
|
|
|
|
uint64_t Align) const;
|
2019-09-09 22:59:34 +08:00
|
|
|
|
|
|
|
|
void emitStackProbeInlineGenericLoop(MachineFunction &MF,
|
|
|
|
|
MachineBasicBlock &MBB,
|
|
|
|
|
MachineBasicBlock::iterator MBBI,
|
2020-07-23 22:22:48 +08:00
|
|
|
const DebugLoc &DL, uint64_t Offset,
|
|
|
|
|
uint64_t Align) const;
|
2015-11-10 09:50:49 +08:00
|
|
|
|
|
|
|
|
/// Emit a stub to later inline the target stack probe.
|
2019-09-09 22:59:34 +08:00
|
|
|
MachineInstr *emitStackProbeInlineStub(MachineFunction &MF,
|
|
|
|
|
MachineBasicBlock &MBB,
|
|
|
|
|
MachineBasicBlock::iterator MBBI,
|
|
|
|
|
const DebugLoc &DL,
|
|
|
|
|
bool InProlog) const;
|
2015-11-10 09:50:49 +08:00
|
|
|
|
2015-06-19 02:03:25 +08:00
|
|
|
/// Aligns the stack pointer by ANDing it with -MaxAlign.
|
|
|
|
|
void BuildStackAlignAND(MachineBasicBlock &MBB,
|
2016-06-12 23:39:02 +08:00
|
|
|
MachineBasicBlock::iterator MBBI, const DebugLoc &DL,
|
2015-11-06 05:09:49 +08:00
|
|
|
unsigned Reg, uint64_t MaxAlign) const;
|
2015-06-19 04:22:12 +08:00
|
|
|
|
2015-08-11 16:48:48 +08:00
|
|
|
/// Make small positive stack adjustments using POPs.
|
|
|
|
|
bool adjustStackWithPops(MachineBasicBlock &MBB,
|
2016-06-12 23:39:02 +08:00
|
|
|
MachineBasicBlock::iterator MBBI, const DebugLoc &DL,
|
2015-08-11 16:48:48 +08:00
|
|
|
int Offset) const;
|
|
|
|
|
|
2015-06-19 04:22:12 +08:00
|
|
|
/// Adjusts the stack pointer using LEA, SUB, or ADD.
|
|
|
|
|
MachineInstrBuilder BuildStackAdjustment(MachineBasicBlock &MBB,
|
|
|
|
|
MachineBasicBlock::iterator MBBI,
|
2016-06-12 23:39:02 +08:00
|
|
|
const DebugLoc &DL, int64_t Offset,
|
2015-06-19 04:22:12 +08:00
|
|
|
bool InEpilogue) const;
|
2015-09-09 06:44:41 +08:00
|
|
|
|
[WinEH] Find root frame correctly in CLR funclets
Summary:
The value that the CoreCLR personality passes to a funclet for the
establisher frame may be the root function's frame or may be the parent
funclet's (mostly empty) frame in the case of nested funclets. Each
funclet stores a pointer to the root frame in its own (mostly empty)
frame, as does the root function itself. All frames allocate this slot at
the same offset, measured from the post-prolog stack pointer, so that the
same sequence can accept any ancestor as an establisher frame parameter
value, and so that a single offset can be reported to the GC, which also
looks at this slot.
This change allocate the slot when processing function entry, and records
its frame index on the WinEHFuncInfo object, then inserts the code to
set/copy it during prolog emission.
Reviewers: majnemer, AndyAyers, pgavlin, rnk
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D14614
llvm-svn: 252983
2015-11-13 08:39:23 +08:00
|
|
|
unsigned getPSPSlotOffsetFromSP(const MachineFunction &MF) const;
|
|
|
|
|
|
2015-10-17 07:43:27 +08:00
|
|
|
unsigned getWinEHFuncletFrameSize(const MachineFunction &MF) const;
|
2017-10-06 05:37:39 +08:00
|
|
|
|
|
|
|
|
/// Materialize the catchret target MBB in RAX.
|
|
|
|
|
void emitCatchRetReturnValue(MachineBasicBlock &MBB,
|
|
|
|
|
MachineBasicBlock::iterator MBBI,
|
|
|
|
|
MachineInstr *CatchRet) const;
|
2015-02-02 00:15:07 +08:00
|
|
|
};
|
|
|
|
|
|
2015-06-23 17:49:53 +08:00
|
|
|
} // End llvm namespace
|
2015-02-02 00:15:07 +08:00
|
|
|
|
|
|
|
|
#endif
|