[AArch64][SVE2] Asm: support SVE2 Narrowing Group
Summary:
Patch adds support for the following instructions:
SVE2 bitwise shift right narrow:
* SQSHRUNB, SQSHRUNT, SQRSHRUNB, SQRSHRUNT, SHRNB, SHRNT, RSHRNB, RSHRNT,
SQSHRNB, SQSHRNT, SQRSHRNB, SQRSHRNT, UQSHRNB, UQSHRNT, UQRSHRNB,
UQRSHRNT
SVE2 integer add/subtract narrow high part:
* ADDHNB, ADDHNT, RADDHNB, RADDHNT, SUBHNB, SUBHNT, RSUBHNB, RSUBHNT
SVE2 saturating extract narrow:
* SQXTNB, SQXTNT, UQXTNB, UQXTNT, SQXTUNB, SQXTUNT
The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D62205
llvm-svn: 361624
2019-05-24 18:22:30 +08:00
|
|
|
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
|
|
|
|
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
|
|
|
|
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
|
|
|
|
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
|
|
|
|
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
|
2020-03-16 07:17:52 +08:00
|
|
|
// RUN: | llvm-objdump -d --mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
|
[AArch64][SVE2] Asm: support SVE2 Narrowing Group
Summary:
Patch adds support for the following instructions:
SVE2 bitwise shift right narrow:
* SQSHRUNB, SQSHRUNT, SQRSHRUNB, SQRSHRUNT, SHRNB, SHRNT, RSHRNB, RSHRNT,
SQSHRNB, SQSHRNT, SQRSHRNB, SQRSHRNT, UQSHRNB, UQSHRNT, UQRSHRNB,
UQRSHRNT
SVE2 integer add/subtract narrow high part:
* ADDHNB, ADDHNT, RADDHNB, RADDHNT, SUBHNB, SUBHNT, RSUBHNB, RSUBHNT
SVE2 saturating extract narrow:
* SQXTNB, SQXTNT, UQXTNB, UQXTNT, SQXTUNB, SQXTUNT
The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D62205
llvm-svn: 361624
2019-05-24 18:22:30 +08:00
|
|
|
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
|
|
|
|
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
|
|
|
|
|
|
|
|
uqshrnb z0.b, z0.h, #1
|
|
|
|
// CHECK-INST: uqshrnb z0.b, z0.h, #1
|
|
|
|
// CHECK-ENCODING: [0x00,0x30,0x2f,0x45]
|
|
|
|
// CHECK-ERROR: instruction requires: sve2
|
|
|
|
// CHECK-UNKNOWN: 00 30 2f 45 <unknown>
|
|
|
|
|
|
|
|
uqshrnb z31.b, z31.h, #8
|
|
|
|
// CHECK-INST: uqshrnb z31.b, z31.h, #8
|
|
|
|
// CHECK-ENCODING: [0xff,0x33,0x28,0x45]
|
|
|
|
// CHECK-ERROR: instruction requires: sve2
|
|
|
|
// CHECK-UNKNOWN: ff 33 28 45 <unknown>
|
|
|
|
|
|
|
|
uqshrnb z0.h, z0.s, #1
|
|
|
|
// CHECK-INST: uqshrnb z0.h, z0.s, #1
|
|
|
|
// CHECK-ENCODING: [0x00,0x30,0x3f,0x45]
|
|
|
|
// CHECK-ERROR: instruction requires: sve2
|
|
|
|
// CHECK-UNKNOWN: 00 30 3f 45 <unknown>
|
|
|
|
|
|
|
|
uqshrnb z31.h, z31.s, #16
|
|
|
|
// CHECK-INST: uqshrnb z31.h, z31.s, #16
|
|
|
|
// CHECK-ENCODING: [0xff,0x33,0x30,0x45]
|
|
|
|
// CHECK-ERROR: instruction requires: sve2
|
|
|
|
// CHECK-UNKNOWN: ff 33 30 45 <unknown>
|
|
|
|
|
|
|
|
uqshrnb z0.s, z0.d, #1
|
|
|
|
// CHECK-INST: uqshrnb z0.s, z0.d, #1
|
|
|
|
// CHECK-ENCODING: [0x00,0x30,0x7f,0x45]
|
|
|
|
// CHECK-ERROR: instruction requires: sve2
|
|
|
|
// CHECK-UNKNOWN: 00 30 7f 45 <unknown>
|
|
|
|
|
|
|
|
uqshrnb z31.s, z31.d, #32
|
|
|
|
// CHECK-INST: uqshrnb z31.s, z31.d, #32
|
|
|
|
// CHECK-ENCODING: [0xff,0x33,0x60,0x45]
|
|
|
|
// CHECK-ERROR: instruction requires: sve2
|
|
|
|
// CHECK-UNKNOWN: ff 33 60 45 <unknown>
|