2017-12-21 06:25:39 +08:00
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; RUN: llc < %s -mtriple=arm-eabi -mcpu=generic | FileCheck %s
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define i32 @sadd(i32 %a, i32 %b) local_unnamed_addr #0 {
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; CHECK-LABEL: sadd:
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2018-01-18 03:19:05 +08:00
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; CHECK: adds r0, r0, r1
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2017-12-21 06:25:39 +08:00
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; CHECK-NEXT: movvc pc, lr
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entry:
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%0 = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
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%1 = extractvalue { i32, i1 } %0, 1
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br i1 %1, label %trap, label %cont
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trap:
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tail call void @llvm.trap() #2
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unreachable
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cont:
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%2 = extractvalue { i32, i1 } %0, 0
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ret i32 %2
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}
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define i32 @uadd(i32 %a, i32 %b) local_unnamed_addr #0 {
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; CHECK-LABEL: uadd:
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2018-01-18 03:19:05 +08:00
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; CHECK: adds r0, r0, r1
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; CHECK-NEXT: movlo pc, lr
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2017-12-21 06:25:39 +08:00
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entry:
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%0 = tail call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
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%1 = extractvalue { i32, i1 } %0, 1
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br i1 %1, label %trap, label %cont
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trap:
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tail call void @llvm.trap() #2
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unreachable
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cont:
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%2 = extractvalue { i32, i1 } %0, 0
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ret i32 %2
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}
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define i32 @ssub(i32 %a, i32 %b) local_unnamed_addr #0 {
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; CHECK-LABEL: ssub:
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2018-01-18 03:19:05 +08:00
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; CHECK: subs r0, r0, r1
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2017-12-21 06:25:39 +08:00
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; CHECK-NEXT: movvc pc, lr
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entry:
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%0 = tail call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %a, i32 %b)
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%1 = extractvalue { i32, i1 } %0, 1
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br i1 %1, label %trap, label %cont
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trap:
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tail call void @llvm.trap() #2
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unreachable
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cont:
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%2 = extractvalue { i32, i1 } %0, 0
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ret i32 %2
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}
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define i32 @usub(i32 %a, i32 %b) local_unnamed_addr #0 {
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; CHECK-LABEL: usub:
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2018-01-18 03:19:05 +08:00
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; CHECK: subs r0, r0, r1
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2017-12-21 06:25:39 +08:00
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; CHECK-NEXT: movhs pc, lr
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entry:
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%0 = tail call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
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%1 = extractvalue { i32, i1 } %0, 1
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br i1 %1, label %trap, label %cont
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trap:
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tail call void @llvm.trap() #2
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unreachable
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cont:
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%2 = extractvalue { i32, i1 } %0, 0
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ret i32 %2
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}
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2018-01-18 03:19:05 +08:00
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define i32 @smul(i32 %a, i32 %b) local_unnamed_addr #0 {
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; CHECK-LABEL: smul:
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; CHECK: smull r0, r[[RHI:[0-9]+]], {{r[0-9]+}}, {{r[0-9]+}}
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; CHECK-NEXT: cmp r[[RHI]], r0, asr #31
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; CHECK-NEXT: moveq pc, lr
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entry:
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%0 = tail call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %a, i32 %b)
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%1 = extractvalue { i32, i1 } %0, 1
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br i1 %1, label %trap, label %cont
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trap:
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tail call void @llvm.trap() #2
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unreachable
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cont:
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%2 = extractvalue { i32, i1 } %0, 0
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ret i32 %2
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}
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define i32 @umul(i32 %a, i32 %b) local_unnamed_addr #0 {
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; CHECK-LABEL: umul:
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; CHECK: umull r0, r[[RHI:[0-9]+]], {{r[0-9]+}}, {{r[0-9]+}}
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; CHECK-NEXT: cmp r[[RHI]], #0
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; CHECK-NEXT: moveq pc, lr
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entry:
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%0 = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %a, i32 %b)
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%1 = extractvalue { i32, i1 } %0, 1
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br i1 %1, label %trap, label %cont
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trap:
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tail call void @llvm.trap() #2
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unreachable
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cont:
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%2 = extractvalue { i32, i1 } %0, 0
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ret i32 %2
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}
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2017-12-21 06:25:39 +08:00
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define void @sum(i32* %a, i32* %b, i32 %n) local_unnamed_addr #0 {
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; CHECK-LABEL: sum:
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; CHECK: ldr [[R0:r[0-9]+]],
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; CHECK-NEXT: ldr [[R1:r[0-9]+|lr]],
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2018-01-18 03:19:05 +08:00
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; CHECK-NEXT: adds [[R2:r[0-9]+]], [[R1]], [[R0]]
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2017-12-21 06:25:39 +08:00
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; CHECK-NEXT: strvc [[R2]],
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2018-01-18 03:19:05 +08:00
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; CHECK-NEXT: addsvc
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2017-12-21 06:25:39 +08:00
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; CHECK-NEXT: bvs
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entry:
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%cmp7 = icmp eq i32 %n, 0
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br i1 %cmp7, label %for.cond.cleanup, label %for.body
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for.cond.cleanup:
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ret void
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for.body:
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%i.08 = phi i32 [ %7, %cont2 ], [ 0, %entry ]
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%arrayidx = getelementptr inbounds i32, i32* %b, i32 %i.08
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%0 = load i32, i32* %arrayidx, align 4
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%arrayidx1 = getelementptr inbounds i32, i32* %a, i32 %i.08
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%1 = load i32, i32* %arrayidx1, align 4
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%2 = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %1, i32 %0)
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%3 = extractvalue { i32, i1 } %2, 1
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br i1 %3, label %trap, label %cont
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trap:
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tail call void @llvm.trap() #2
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unreachable
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cont:
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%4 = extractvalue { i32, i1 } %2, 0
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store i32 %4, i32* %arrayidx1, align 4
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%5 = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %i.08, i32 1)
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%6 = extractvalue { i32, i1 } %5, 1
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br i1 %6, label %trap, label %cont2
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cont2:
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%7 = extractvalue { i32, i1 } %5, 0
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%cmp = icmp eq i32 %7, %n
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br i1 %cmp, label %for.cond.cleanup, label %for.body
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}
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2018-01-18 03:19:05 +08:00
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define void @extern_loop(i32 %n) local_unnamed_addr #0 {
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; Do not replace the compare around the clobbering call.
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; CHECK: add {{r[0-9]+}}, {{r[0-9]+}}, #1
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; CHECK-NEXT: bl external_fn
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; CHECK: cmp
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entry:
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%0 = tail call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %n, i32 1)
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%1 = extractvalue { i32, i1 } %0, 1
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br i1 %1, label %trap, label %cont.lr.ph
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cont.lr.ph:
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%2 = extractvalue { i32, i1 } %0, 0
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%cmp5 = icmp sgt i32 %2, 0
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br i1 %cmp5, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader:
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br label %for.body
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trap:
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tail call void @llvm.trap() #2
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unreachable
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for.cond.cleanup:
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ret void
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for.body:
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%i.046 = phi i32 [ %5, %cont1 ], [ 0, %for.body.preheader ]
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tail call void bitcast (void (...)* @external_fn to void ()*)() #4
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%3 = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %i.046, i32 1)
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%4 = extractvalue { i32, i1 } %3, 1
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br i1 %4, label %trap, label %cont1
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cont1:
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%5 = extractvalue { i32, i1 } %3, 0
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%cmp = icmp slt i32 %5, %2
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br i1 %cmp, label %for.body, label %for.cond.cleanup
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}
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declare void @external_fn(...) local_unnamed_addr #0
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2018-01-20 01:46:27 +08:00
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define i32 @are_equal(i32* nocapture readonly %a1, i32* nocapture readonly %a2, i32 %n) local_unnamed_addr #0 {
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; CHECK-LABEL: are_equal
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; CHECK: subs r{{[0-9]+}}, r{{[0-9]+}}, #1
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; CHECK-NEXT: bne
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entry:
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%tobool7 = icmp eq i32 %n, 0
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br i1 %tobool7, label %while.end, label %land.rhs.preheader
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land.rhs.preheader:
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br label %land.rhs
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while.cond:
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%tobool = icmp eq i32 %dec9, 0
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br i1 %tobool, label %while.end, label %land.rhs
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land.rhs:
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%dec9.in = phi i32 [ %dec9, %while.cond ], [ %n, %land.rhs.preheader ]
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%dec9 = add nsw i32 %dec9.in, -1
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%arrayidx = getelementptr inbounds i32, i32* %a1, i32 %dec9
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%0 = load i32, i32* %arrayidx, align 4
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%arrayidx1 = getelementptr inbounds i32, i32* %a2, i32 %dec9
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%1 = load i32, i32* %arrayidx1, align 4
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%cmp = icmp eq i32 %0, %1
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br i1 %cmp, label %while.cond, label %while.end
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while.end:
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%n.addr.0.lcssa = phi i32 [ 0, %entry ], [ 0, %while.cond ], [ %dec9.in, %land.rhs ]
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%cmp2 = icmp slt i32 %n.addr.0.lcssa, 1
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%conv = zext i1 %cmp2 to i32
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ret i32 %conv
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}
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2017-12-21 06:25:39 +08:00
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declare void @llvm.trap() #2
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declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) #1
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declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) #1
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declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #1
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declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #1
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2018-01-18 03:19:05 +08:00
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declare { i32, i1 } @llvm.smul.with.overflow.i32(i32, i32) #1
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declare { i32, i1 } @llvm.umul.with.overflow.i32(i32, i32) #1
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