maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/lldb/source/Core/EmulateInstruction.cpp

673 lines
21 KiB
C++
Raw Normal View History

Added the start of opcode emulation for ARM instructions. This class is designed to be fed 4 callbacks: read/write memory, and read/write registers. After this, you can tell the object to read an instruction. This will cause the class to read the PC, and read and instruction. Then you can emulate the instruction by calling EvaluateInstruction. This will cause the class to figure out exactly what an opcode does, and call the read/write mem/regs functions with actual values which allows one to emulate an instruction without running a process, or it allows one to watch the context information (the memory write is a pushing register 3 onto the stack at offset 12) so it can be used for generating call frame information. This way, in the future, we will have one class that can be used to emulate instructions and generate our unwind info from assembly. llvm-svn: 123998
2011-01-22 06:02:52 +08:00
//===-- EmulateInstruction.h ------------------------------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
Header patch, virtual dtor patch and missed UUID patch from Kirk Beitz. llvm-svn: 124931
2011-02-05 10:56:16 +08:00
#include "lldb/Core/EmulateInstruction.h"
Added the start of opcode emulation for ARM instructions. This class is designed to be fed 4 callbacks: read/write memory, and read/write registers. After this, you can tell the object to read an instruction. This will cause the class to read the PC, and read and instruction. Then you can emulate the instruction by calling EvaluateInstruction. This will cause the class to figure out exactly what an opcode does, and call the read/write mem/regs functions with actual values which allows one to emulate an instruction without running a process, or it allows one to watch the context information (the memory write is a pushing register 3 onto the stack at offset 12) so it can be used for generating call frame information. This way, in the future, we will have one class that can be used to emulate instructions and generate our unwind info from assembly. llvm-svn: 123998
2011-01-22 06:02:52 +08:00
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
#include "lldb/Core/Address.h"
Added the start of opcode emulation for ARM instructions. This class is designed to be fed 4 callbacks: read/write memory, and read/write registers. After this, you can tell the object to read an instruction. This will cause the class to read the PC, and read and instruction. Then you can emulate the instruction by calling EvaluateInstruction. This will cause the class to figure out exactly what an opcode does, and call the read/write mem/regs functions with actual values which allows one to emulate an instruction without running a process, or it allows one to watch the context information (the memory write is a pushing register 3 onto the stack at offset 12) so it can be used for generating call frame information. This way, in the future, we will have one class that can be used to emulate instructions and generate our unwind info from assembly. llvm-svn: 123998
2011-01-22 06:02:52 +08:00
#include "lldb/Core/DataExtractor.h"
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
#include "lldb/Core/Error.h"
Modified the PluginManager to be ready for loading plug-ins from a system LLDB plugin directory and a user LLDB plugin directory. We currently still need to work out at what layer the plug-ins will be, but at least we are prepared for plug-ins. Plug-ins will attempt to be loaded from the "/Developer/Library/PrivateFrameworks/LLDB.framework/Resources/Plugins" folder, and from the "~/Library/Application Support/LLDB/Plugins" folder on MacOSX. Each plugin will be scanned for: extern "C" bool LLDBPluginInitialize(void); extern "C" void LLDBPluginTerminate(void); If at least LLDBPluginInitialize is found, the plug-in will be loaded. The LLDBPluginInitialize function returns a bool that indicates if the plug-in should stay loaded or not (plug-ins might check the current OS, current hardware, or anything else and determine they don't want to run on the current host). The plug-in is uniqued by path and added to a static loaded plug-in map. The plug-in scanning happens during "lldb_private::Initialize()" which calls to the PluginManager::Initialize() function. Likewise with termination lldb_private::Terminate() calls PluginManager::Terminate(). The paths for the plug-in directories is fetched through new Host calls: bool Host::GetLLDBPath (ePathTypeLLDBSystemPlugins, dir_spec); bool Host::GetLLDBPath (ePathTypeLLDBUserPlugins, dir_spec); This way linux and other systems can define their own appropriate locations for plug-ins to be loaded. To allow dynamic shared library loading, the Host layer has also been modified to include shared library open, close and get symbol: static void * Host::DynamicLibraryOpen (const FileSpec &file_spec, Error &error); static Error Host::DynamicLibraryClose (void *dynamic_library_handle); static void * Host::DynamicLibraryGetSymbol (void *dynamic_library_handle, const char *symbol_name, Error &error); lldb_private::FileSpec also has been modified to support directory enumeration in an attempt to abstract the directory enumeration into one spot in the code. The directory enumertion function is static and takes a callback: typedef enum EnumerateDirectoryResult { eEnumerateDirectoryResultNext, // Enumerate next entry in the current directory eEnumerateDirectoryResultEnter, // Recurse into the current entry if it is a directory or symlink, or next if not eEnumerateDirectoryResultExit, // Exit from the current directory at the current level. eEnumerateDirectoryResultQuit // Stop directory enumerations at any level }; typedef FileSpec::EnumerateDirectoryResult (*EnumerateDirectoryCallbackType) (void *baton, FileSpec::FileType file_type, const FileSpec &spec); static FileSpec::EnumerateDirectoryResult FileSpec::EnumerateDirectory (const char *dir_path, bool find_directories, bool find_files, bool find_other, EnumerateDirectoryCallbackType callback, void *callback_baton); This allow clients to specify the directory to search, and specifies if only files, directories or other (pipe, symlink, fifo, etc) files will cause the callback to be called. The callback also gets to return with the action that should be performed after this directory entry. eEnumerateDirectoryResultNext specifies to continue enumerating through a directory with the next entry. eEnumerateDirectoryResultEnter specifies to recurse down into a directory entry, or if the file is not a directory or symlink/alias to a directory, then just iterate to the next entry. eEnumerateDirectoryResultExit specifies to exit the current directory and skip any entries that might be remaining, yet continue enumerating to the next entry in the parent directory. And finally eEnumerateDirectoryResultQuit means to abort all directory enumerations at all levels. Modified the Declaration class to not include column information currently since we don't have any compilers that currently support column based declaration information. Columns support can be re-enabled with the additions of a #define. Added the ability to find an EmulateInstruction plug-in given a target triple and optional plug-in name in the plug-in manager. Fixed a few cases where opendir/readdir was being used, but yet not closedir was being used. Soon these will be deprecated in favor of the new directory enumeration call that was added to the FileSpec class. llvm-svn: 124716
2011-02-02 10:24:04 +08:00
#include "lldb/Core/PluginManager.h"
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
#include "lldb/Core/RegisterValue.h"
#include "lldb/Core/StreamFile.h"
Added the start of opcode emulation for ARM instructions. This class is designed to be fed 4 callbacks: read/write memory, and read/write registers. After this, you can tell the object to read an instruction. This will cause the class to read the PC, and read and instruction. Then you can emulate the instruction by calling EvaluateInstruction. This will cause the class to figure out exactly what an opcode does, and call the read/write mem/regs functions with actual values which allows one to emulate an instruction without running a process, or it allows one to watch the context information (the memory write is a pushing register 3 onto the stack at offset 12) so it can be used for generating call frame information. This way, in the future, we will have one class that can be used to emulate instructions and generate our unwind info from assembly. llvm-svn: 123998
2011-01-22 06:02:52 +08:00
#include "lldb/Core/StreamString.h"
Endian patch from Kirk Beitz that allows better cross platform building. llvm-svn: 124643
2011-02-01 09:31:41 +08:00
#include "lldb/Host/Endian.h"
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
#include "lldb/Symbol/UnwindPlan.h"
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
#include "lldb/Target/Process.h"
#include "lldb/Target/RegisterContext.h"
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
#include "lldb/Target/Target.h"
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
#include "lldb/Target/Thread.h"
Added the start of opcode emulation for ARM instructions. This class is designed to be fed 4 callbacks: read/write memory, and read/write registers. After this, you can tell the object to read an instruction. This will cause the class to read the PC, and read and instruction. Then you can emulate the instruction by calling EvaluateInstruction. This will cause the class to figure out exactly what an opcode does, and call the read/write mem/regs functions with actual values which allows one to emulate an instruction without running a process, or it allows one to watch the context information (the memory write is a pushing register 3 onto the stack at offset 12) so it can be used for generating call frame information. This way, in the future, we will have one class that can be used to emulate instructions and generate our unwind info from assembly. llvm-svn: 123998
2011-01-22 06:02:52 +08:00
using namespace lldb;
using namespace lldb_private;
Modified the PluginManager to be ready for loading plug-ins from a system LLDB plugin directory and a user LLDB plugin directory. We currently still need to work out at what layer the plug-ins will be, but at least we are prepared for plug-ins. Plug-ins will attempt to be loaded from the "/Developer/Library/PrivateFrameworks/LLDB.framework/Resources/Plugins" folder, and from the "~/Library/Application Support/LLDB/Plugins" folder on MacOSX. Each plugin will be scanned for: extern "C" bool LLDBPluginInitialize(void); extern "C" void LLDBPluginTerminate(void); If at least LLDBPluginInitialize is found, the plug-in will be loaded. The LLDBPluginInitialize function returns a bool that indicates if the plug-in should stay loaded or not (plug-ins might check the current OS, current hardware, or anything else and determine they don't want to run on the current host). The plug-in is uniqued by path and added to a static loaded plug-in map. The plug-in scanning happens during "lldb_private::Initialize()" which calls to the PluginManager::Initialize() function. Likewise with termination lldb_private::Terminate() calls PluginManager::Terminate(). The paths for the plug-in directories is fetched through new Host calls: bool Host::GetLLDBPath (ePathTypeLLDBSystemPlugins, dir_spec); bool Host::GetLLDBPath (ePathTypeLLDBUserPlugins, dir_spec); This way linux and other systems can define their own appropriate locations for plug-ins to be loaded. To allow dynamic shared library loading, the Host layer has also been modified to include shared library open, close and get symbol: static void * Host::DynamicLibraryOpen (const FileSpec &file_spec, Error &error); static Error Host::DynamicLibraryClose (void *dynamic_library_handle); static void * Host::DynamicLibraryGetSymbol (void *dynamic_library_handle, const char *symbol_name, Error &error); lldb_private::FileSpec also has been modified to support directory enumeration in an attempt to abstract the directory enumeration into one spot in the code. The directory enumertion function is static and takes a callback: typedef enum EnumerateDirectoryResult { eEnumerateDirectoryResultNext, // Enumerate next entry in the current directory eEnumerateDirectoryResultEnter, // Recurse into the current entry if it is a directory or symlink, or next if not eEnumerateDirectoryResultExit, // Exit from the current directory at the current level. eEnumerateDirectoryResultQuit // Stop directory enumerations at any level }; typedef FileSpec::EnumerateDirectoryResult (*EnumerateDirectoryCallbackType) (void *baton, FileSpec::FileType file_type, const FileSpec &spec); static FileSpec::EnumerateDirectoryResult FileSpec::EnumerateDirectory (const char *dir_path, bool find_directories, bool find_files, bool find_other, EnumerateDirectoryCallbackType callback, void *callback_baton); This allow clients to specify the directory to search, and specifies if only files, directories or other (pipe, symlink, fifo, etc) files will cause the callback to be called. The callback also gets to return with the action that should be performed after this directory entry. eEnumerateDirectoryResultNext specifies to continue enumerating through a directory with the next entry. eEnumerateDirectoryResultEnter specifies to recurse down into a directory entry, or if the file is not a directory or symlink/alias to a directory, then just iterate to the next entry. eEnumerateDirectoryResultExit specifies to exit the current directory and skip any entries that might be remaining, yet continue enumerating to the next entry in the parent directory. And finally eEnumerateDirectoryResultQuit means to abort all directory enumerations at all levels. Modified the Declaration class to not include column information currently since we don't have any compilers that currently support column based declaration information. Columns support can be re-enabled with the additions of a #define. Added the ability to find an EmulateInstruction plug-in given a target triple and optional plug-in name in the plug-in manager. Fixed a few cases where opendir/readdir was being used, but yet not closedir was being used. Soon these will be deprecated in favor of the new directory enumeration call that was added to the FileSpec class. llvm-svn: 124716
2011-02-02 10:24:04 +08:00
EmulateInstruction*
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
EmulateInstruction::FindPlugin (const ArchSpec &arch, InstructionType supported_inst_type, const char *plugin_name)
Modified the PluginManager to be ready for loading plug-ins from a system LLDB plugin directory and a user LLDB plugin directory. We currently still need to work out at what layer the plug-ins will be, but at least we are prepared for plug-ins. Plug-ins will attempt to be loaded from the "/Developer/Library/PrivateFrameworks/LLDB.framework/Resources/Plugins" folder, and from the "~/Library/Application Support/LLDB/Plugins" folder on MacOSX. Each plugin will be scanned for: extern "C" bool LLDBPluginInitialize(void); extern "C" void LLDBPluginTerminate(void); If at least LLDBPluginInitialize is found, the plug-in will be loaded. The LLDBPluginInitialize function returns a bool that indicates if the plug-in should stay loaded or not (plug-ins might check the current OS, current hardware, or anything else and determine they don't want to run on the current host). The plug-in is uniqued by path and added to a static loaded plug-in map. The plug-in scanning happens during "lldb_private::Initialize()" which calls to the PluginManager::Initialize() function. Likewise with termination lldb_private::Terminate() calls PluginManager::Terminate(). The paths for the plug-in directories is fetched through new Host calls: bool Host::GetLLDBPath (ePathTypeLLDBSystemPlugins, dir_spec); bool Host::GetLLDBPath (ePathTypeLLDBUserPlugins, dir_spec); This way linux and other systems can define their own appropriate locations for plug-ins to be loaded. To allow dynamic shared library loading, the Host layer has also been modified to include shared library open, close and get symbol: static void * Host::DynamicLibraryOpen (const FileSpec &file_spec, Error &error); static Error Host::DynamicLibraryClose (void *dynamic_library_handle); static void * Host::DynamicLibraryGetSymbol (void *dynamic_library_handle, const char *symbol_name, Error &error); lldb_private::FileSpec also has been modified to support directory enumeration in an attempt to abstract the directory enumeration into one spot in the code. The directory enumertion function is static and takes a callback: typedef enum EnumerateDirectoryResult { eEnumerateDirectoryResultNext, // Enumerate next entry in the current directory eEnumerateDirectoryResultEnter, // Recurse into the current entry if it is a directory or symlink, or next if not eEnumerateDirectoryResultExit, // Exit from the current directory at the current level. eEnumerateDirectoryResultQuit // Stop directory enumerations at any level }; typedef FileSpec::EnumerateDirectoryResult (*EnumerateDirectoryCallbackType) (void *baton, FileSpec::FileType file_type, const FileSpec &spec); static FileSpec::EnumerateDirectoryResult FileSpec::EnumerateDirectory (const char *dir_path, bool find_directories, bool find_files, bool find_other, EnumerateDirectoryCallbackType callback, void *callback_baton); This allow clients to specify the directory to search, and specifies if only files, directories or other (pipe, symlink, fifo, etc) files will cause the callback to be called. The callback also gets to return with the action that should be performed after this directory entry. eEnumerateDirectoryResultNext specifies to continue enumerating through a directory with the next entry. eEnumerateDirectoryResultEnter specifies to recurse down into a directory entry, or if the file is not a directory or symlink/alias to a directory, then just iterate to the next entry. eEnumerateDirectoryResultExit specifies to exit the current directory and skip any entries that might be remaining, yet continue enumerating to the next entry in the parent directory. And finally eEnumerateDirectoryResultQuit means to abort all directory enumerations at all levels. Modified the Declaration class to not include column information currently since we don't have any compilers that currently support column based declaration information. Columns support can be re-enabled with the additions of a #define. Added the ability to find an EmulateInstruction plug-in given a target triple and optional plug-in name in the plug-in manager. Fixed a few cases where opendir/readdir was being used, but yet not closedir was being used. Soon these will be deprecated in favor of the new directory enumeration call that was added to the FileSpec class. llvm-svn: 124716
2011-02-02 10:24:04 +08:00
{
EmulateInstructionCreateInstance create_callback = NULL;
if (plugin_name)
{
<rdar://problem/13854277> <rdar://problem/13594769> Main changes in this patch include: - cleanup plug-in interface and use ConstStrings for plug-in names - Modfiied the BSD Archive plug-in to be able to pick out the correct .o file when .a files contain multiple .o files with the same name by using the timestamp - Modified SymbolFileDWARFDebugMap to properly verify the timestamp on .o files it loads to ensure we don't load updated .o files and cause problems when debugging The plug-in interface changes: Modified the lldb_private::PluginInterface class that all plug-ins inherit from: Changed: virtual const char * GetPluginName() = 0; To: virtual ConstString GetPluginName() = 0; Removed: virtual const char * GetShortPluginName() = 0; - Fixed up all plug-in to adhere to the new interface and to return lldb_private::ConstString values for the plug-in names. - Fixed all plug-ins to return simple names with no prefixes. Some plug-ins had prefixes and most ones didn't, so now they all don't have prefixed names, just simple names like "linux", "gdb-remote", etc. llvm-svn: 181631
2013-05-11 05:47:16 +08:00
ConstString const_plugin_name (plugin_name);
create_callback = PluginManager::GetEmulateInstructionCreateCallbackForPluginName (const_plugin_name);
Modified the PluginManager to be ready for loading plug-ins from a system LLDB plugin directory and a user LLDB plugin directory. We currently still need to work out at what layer the plug-ins will be, but at least we are prepared for plug-ins. Plug-ins will attempt to be loaded from the "/Developer/Library/PrivateFrameworks/LLDB.framework/Resources/Plugins" folder, and from the "~/Library/Application Support/LLDB/Plugins" folder on MacOSX. Each plugin will be scanned for: extern "C" bool LLDBPluginInitialize(void); extern "C" void LLDBPluginTerminate(void); If at least LLDBPluginInitialize is found, the plug-in will be loaded. The LLDBPluginInitialize function returns a bool that indicates if the plug-in should stay loaded or not (plug-ins might check the current OS, current hardware, or anything else and determine they don't want to run on the current host). The plug-in is uniqued by path and added to a static loaded plug-in map. The plug-in scanning happens during "lldb_private::Initialize()" which calls to the PluginManager::Initialize() function. Likewise with termination lldb_private::Terminate() calls PluginManager::Terminate(). The paths for the plug-in directories is fetched through new Host calls: bool Host::GetLLDBPath (ePathTypeLLDBSystemPlugins, dir_spec); bool Host::GetLLDBPath (ePathTypeLLDBUserPlugins, dir_spec); This way linux and other systems can define their own appropriate locations for plug-ins to be loaded. To allow dynamic shared library loading, the Host layer has also been modified to include shared library open, close and get symbol: static void * Host::DynamicLibraryOpen (const FileSpec &file_spec, Error &error); static Error Host::DynamicLibraryClose (void *dynamic_library_handle); static void * Host::DynamicLibraryGetSymbol (void *dynamic_library_handle, const char *symbol_name, Error &error); lldb_private::FileSpec also has been modified to support directory enumeration in an attempt to abstract the directory enumeration into one spot in the code. The directory enumertion function is static and takes a callback: typedef enum EnumerateDirectoryResult { eEnumerateDirectoryResultNext, // Enumerate next entry in the current directory eEnumerateDirectoryResultEnter, // Recurse into the current entry if it is a directory or symlink, or next if not eEnumerateDirectoryResultExit, // Exit from the current directory at the current level. eEnumerateDirectoryResultQuit // Stop directory enumerations at any level }; typedef FileSpec::EnumerateDirectoryResult (*EnumerateDirectoryCallbackType) (void *baton, FileSpec::FileType file_type, const FileSpec &spec); static FileSpec::EnumerateDirectoryResult FileSpec::EnumerateDirectory (const char *dir_path, bool find_directories, bool find_files, bool find_other, EnumerateDirectoryCallbackType callback, void *callback_baton); This allow clients to specify the directory to search, and specifies if only files, directories or other (pipe, symlink, fifo, etc) files will cause the callback to be called. The callback also gets to return with the action that should be performed after this directory entry. eEnumerateDirectoryResultNext specifies to continue enumerating through a directory with the next entry. eEnumerateDirectoryResultEnter specifies to recurse down into a directory entry, or if the file is not a directory or symlink/alias to a directory, then just iterate to the next entry. eEnumerateDirectoryResultExit specifies to exit the current directory and skip any entries that might be remaining, yet continue enumerating to the next entry in the parent directory. And finally eEnumerateDirectoryResultQuit means to abort all directory enumerations at all levels. Modified the Declaration class to not include column information currently since we don't have any compilers that currently support column based declaration information. Columns support can be re-enabled with the additions of a #define. Added the ability to find an EmulateInstruction plug-in given a target triple and optional plug-in name in the plug-in manager. Fixed a few cases where opendir/readdir was being used, but yet not closedir was being used. Soon these will be deprecated in favor of the new directory enumeration call that was added to the FileSpec class. llvm-svn: 124716
2011-02-02 10:24:04 +08:00
if (create_callback)
{
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
EmulateInstruction *emulate_insn_ptr = create_callback(arch, supported_inst_type);
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
if (emulate_insn_ptr)
return emulate_insn_ptr;
Modified the PluginManager to be ready for loading plug-ins from a system LLDB plugin directory and a user LLDB plugin directory. We currently still need to work out at what layer the plug-ins will be, but at least we are prepared for plug-ins. Plug-ins will attempt to be loaded from the "/Developer/Library/PrivateFrameworks/LLDB.framework/Resources/Plugins" folder, and from the "~/Library/Application Support/LLDB/Plugins" folder on MacOSX. Each plugin will be scanned for: extern "C" bool LLDBPluginInitialize(void); extern "C" void LLDBPluginTerminate(void); If at least LLDBPluginInitialize is found, the plug-in will be loaded. The LLDBPluginInitialize function returns a bool that indicates if the plug-in should stay loaded or not (plug-ins might check the current OS, current hardware, or anything else and determine they don't want to run on the current host). The plug-in is uniqued by path and added to a static loaded plug-in map. The plug-in scanning happens during "lldb_private::Initialize()" which calls to the PluginManager::Initialize() function. Likewise with termination lldb_private::Terminate() calls PluginManager::Terminate(). The paths for the plug-in directories is fetched through new Host calls: bool Host::GetLLDBPath (ePathTypeLLDBSystemPlugins, dir_spec); bool Host::GetLLDBPath (ePathTypeLLDBUserPlugins, dir_spec); This way linux and other systems can define their own appropriate locations for plug-ins to be loaded. To allow dynamic shared library loading, the Host layer has also been modified to include shared library open, close and get symbol: static void * Host::DynamicLibraryOpen (const FileSpec &file_spec, Error &error); static Error Host::DynamicLibraryClose (void *dynamic_library_handle); static void * Host::DynamicLibraryGetSymbol (void *dynamic_library_handle, const char *symbol_name, Error &error); lldb_private::FileSpec also has been modified to support directory enumeration in an attempt to abstract the directory enumeration into one spot in the code. The directory enumertion function is static and takes a callback: typedef enum EnumerateDirectoryResult { eEnumerateDirectoryResultNext, // Enumerate next entry in the current directory eEnumerateDirectoryResultEnter, // Recurse into the current entry if it is a directory or symlink, or next if not eEnumerateDirectoryResultExit, // Exit from the current directory at the current level. eEnumerateDirectoryResultQuit // Stop directory enumerations at any level }; typedef FileSpec::EnumerateDirectoryResult (*EnumerateDirectoryCallbackType) (void *baton, FileSpec::FileType file_type, const FileSpec &spec); static FileSpec::EnumerateDirectoryResult FileSpec::EnumerateDirectory (const char *dir_path, bool find_directories, bool find_files, bool find_other, EnumerateDirectoryCallbackType callback, void *callback_baton); This allow clients to specify the directory to search, and specifies if only files, directories or other (pipe, symlink, fifo, etc) files will cause the callback to be called. The callback also gets to return with the action that should be performed after this directory entry. eEnumerateDirectoryResultNext specifies to continue enumerating through a directory with the next entry. eEnumerateDirectoryResultEnter specifies to recurse down into a directory entry, or if the file is not a directory or symlink/alias to a directory, then just iterate to the next entry. eEnumerateDirectoryResultExit specifies to exit the current directory and skip any entries that might be remaining, yet continue enumerating to the next entry in the parent directory. And finally eEnumerateDirectoryResultQuit means to abort all directory enumerations at all levels. Modified the Declaration class to not include column information currently since we don't have any compilers that currently support column based declaration information. Columns support can be re-enabled with the additions of a #define. Added the ability to find an EmulateInstruction plug-in given a target triple and optional plug-in name in the plug-in manager. Fixed a few cases where opendir/readdir was being used, but yet not closedir was being used. Soon these will be deprecated in favor of the new directory enumeration call that was added to the FileSpec class. llvm-svn: 124716
2011-02-02 10:24:04 +08:00
}
}
else
{
for (uint32_t idx = 0; (create_callback = PluginManager::GetEmulateInstructionCreateCallbackAtIndex(idx)) != NULL; ++idx)
{
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
EmulateInstruction *emulate_insn_ptr = create_callback(arch, supported_inst_type);
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
if (emulate_insn_ptr)
return emulate_insn_ptr;
Modified the PluginManager to be ready for loading plug-ins from a system LLDB plugin directory and a user LLDB plugin directory. We currently still need to work out at what layer the plug-ins will be, but at least we are prepared for plug-ins. Plug-ins will attempt to be loaded from the "/Developer/Library/PrivateFrameworks/LLDB.framework/Resources/Plugins" folder, and from the "~/Library/Application Support/LLDB/Plugins" folder on MacOSX. Each plugin will be scanned for: extern "C" bool LLDBPluginInitialize(void); extern "C" void LLDBPluginTerminate(void); If at least LLDBPluginInitialize is found, the plug-in will be loaded. The LLDBPluginInitialize function returns a bool that indicates if the plug-in should stay loaded or not (plug-ins might check the current OS, current hardware, or anything else and determine they don't want to run on the current host). The plug-in is uniqued by path and added to a static loaded plug-in map. The plug-in scanning happens during "lldb_private::Initialize()" which calls to the PluginManager::Initialize() function. Likewise with termination lldb_private::Terminate() calls PluginManager::Terminate(). The paths for the plug-in directories is fetched through new Host calls: bool Host::GetLLDBPath (ePathTypeLLDBSystemPlugins, dir_spec); bool Host::GetLLDBPath (ePathTypeLLDBUserPlugins, dir_spec); This way linux and other systems can define their own appropriate locations for plug-ins to be loaded. To allow dynamic shared library loading, the Host layer has also been modified to include shared library open, close and get symbol: static void * Host::DynamicLibraryOpen (const FileSpec &file_spec, Error &error); static Error Host::DynamicLibraryClose (void *dynamic_library_handle); static void * Host::DynamicLibraryGetSymbol (void *dynamic_library_handle, const char *symbol_name, Error &error); lldb_private::FileSpec also has been modified to support directory enumeration in an attempt to abstract the directory enumeration into one spot in the code. The directory enumertion function is static and takes a callback: typedef enum EnumerateDirectoryResult { eEnumerateDirectoryResultNext, // Enumerate next entry in the current directory eEnumerateDirectoryResultEnter, // Recurse into the current entry if it is a directory or symlink, or next if not eEnumerateDirectoryResultExit, // Exit from the current directory at the current level. eEnumerateDirectoryResultQuit // Stop directory enumerations at any level }; typedef FileSpec::EnumerateDirectoryResult (*EnumerateDirectoryCallbackType) (void *baton, FileSpec::FileType file_type, const FileSpec &spec); static FileSpec::EnumerateDirectoryResult FileSpec::EnumerateDirectory (const char *dir_path, bool find_directories, bool find_files, bool find_other, EnumerateDirectoryCallbackType callback, void *callback_baton); This allow clients to specify the directory to search, and specifies if only files, directories or other (pipe, symlink, fifo, etc) files will cause the callback to be called. The callback also gets to return with the action that should be performed after this directory entry. eEnumerateDirectoryResultNext specifies to continue enumerating through a directory with the next entry. eEnumerateDirectoryResultEnter specifies to recurse down into a directory entry, or if the file is not a directory or symlink/alias to a directory, then just iterate to the next entry. eEnumerateDirectoryResultExit specifies to exit the current directory and skip any entries that might be remaining, yet continue enumerating to the next entry in the parent directory. And finally eEnumerateDirectoryResultQuit means to abort all directory enumerations at all levels. Modified the Declaration class to not include column information currently since we don't have any compilers that currently support column based declaration information. Columns support can be re-enabled with the additions of a #define. Added the ability to find an EmulateInstruction plug-in given a target triple and optional plug-in name in the plug-in manager. Fixed a few cases where opendir/readdir was being used, but yet not closedir was being used. Soon these will be deprecated in favor of the new directory enumeration call that was added to the FileSpec class. llvm-svn: 124716
2011-02-02 10:24:04 +08:00
}
}
return NULL;
}
Added the start of opcode emulation for ARM instructions. This class is designed to be fed 4 callbacks: read/write memory, and read/write registers. After this, you can tell the object to read an instruction. This will cause the class to read the PC, and read and instruction. Then you can emulate the instruction by calling EvaluateInstruction. This will cause the class to figure out exactly what an opcode does, and call the read/write mem/regs functions with actual values which allows one to emulate an instruction without running a process, or it allows one to watch the context information (the memory write is a pushing register 3 onto the stack at offset 12) so it can be used for generating call frame information. This way, in the future, we will have one class that can be used to emulate instructions and generate our unwind info from assembly. llvm-svn: 123998
2011-01-22 06:02:52 +08:00
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
EmulateInstruction::EmulateInstruction (const ArchSpec &arch) :
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
m_arch (arch),
m_baton (NULL),
m_read_mem_callback (&ReadMemoryDefault),
m_write_mem_callback (&WriteMemoryDefault),
m_read_reg_callback (&ReadRegisterDefault),
m_write_reg_callback (&WriteRegisterDefault),
Added the start of the CFI row production using the emulate instruction classes. llvm-svn: 130556
2011-04-30 06:50:31 +08:00
m_addr (LLDB_INVALID_ADDRESS)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
::memset (&m_opcode, 0, sizeof (m_opcode));
}
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
bool
EmulateInstruction::ReadRegister (const RegisterInfo *reg_info, RegisterValue& reg_value)
{
if (m_read_reg_callback)
return m_read_reg_callback (this, m_baton, reg_info, reg_value);
return false;
}
bool
Replace uint32_t by lldb::RegisterKing in register context API. llvm-svn: 212172
2014-07-02 17:51:28 +08:00
EmulateInstruction::ReadRegister (lldb::RegisterKind reg_kind, uint32_t reg_num, RegisterValue& reg_value)
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
{
RegisterInfo reg_info;
if (GetRegisterInfo(reg_kind, reg_num, reg_info))
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
return ReadRegister (&reg_info, reg_value);
return false;
}
uint64_t
Replace uint32_t by lldb::RegisterKing in register context API. llvm-svn: 212172
2014-07-02 17:51:28 +08:00
EmulateInstruction::ReadRegisterUnsigned (lldb::RegisterKind reg_kind,
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
uint32_t reg_num,
uint64_t fail_value,
bool *success_ptr)
{
RegisterValue reg_value;
if (ReadRegister (reg_kind, reg_num, reg_value))
return reg_value.GetAsUInt64(fail_value, success_ptr);
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
if (success_ptr)
*success_ptr = false;
return fail_value;
}
uint64_t
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
EmulateInstruction::ReadRegisterUnsigned (const RegisterInfo *reg_info,
uint64_t fail_value,
bool *success_ptr)
Added the start of opcode emulation for ARM instructions. This class is designed to be fed 4 callbacks: read/write memory, and read/write registers. After this, you can tell the object to read an instruction. This will cause the class to read the PC, and read and instruction. Then you can emulate the instruction by calling EvaluateInstruction. This will cause the class to figure out exactly what an opcode does, and call the read/write mem/regs functions with actual values which allows one to emulate an instruction without running a process, or it allows one to watch the context information (the memory write is a pushing register 3 onto the stack at offset 12) so it can be used for generating call frame information. This way, in the future, we will have one class that can be used to emulate instructions and generate our unwind info from assembly. llvm-svn: 123998
2011-01-22 06:02:52 +08:00
{
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
RegisterValue reg_value;
if (ReadRegister (reg_info, reg_value))
return reg_value.GetAsUInt64(fail_value, success_ptr);
Added the start of opcode emulation for ARM instructions. This class is designed to be fed 4 callbacks: read/write memory, and read/write registers. After this, you can tell the object to read an instruction. This will cause the class to read the PC, and read and instruction. Then you can emulate the instruction by calling EvaluateInstruction. This will cause the class to figure out exactly what an opcode does, and call the read/write mem/regs functions with actual values which allows one to emulate an instruction without running a process, or it allows one to watch the context information (the memory write is a pushing register 3 onto the stack at offset 12) so it can be used for generating call frame information. This way, in the future, we will have one class that can be used to emulate instructions and generate our unwind info from assembly. llvm-svn: 123998
2011-01-22 06:02:52 +08:00
if (success_ptr)
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
*success_ptr = false;
return fail_value;
}
bool
EmulateInstruction::WriteRegister (const Context &context,
const RegisterInfo *reg_info,
const RegisterValue& reg_value)
{
if (m_write_reg_callback)
return m_write_reg_callback (this, m_baton, context, reg_info, reg_value);
return false;
}
bool
EmulateInstruction::WriteRegister (const Context &context,
Replace uint32_t by lldb::RegisterKing in register context API. llvm-svn: 212172
2014-07-02 17:51:28 +08:00
lldb::RegisterKind reg_kind,
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
uint32_t reg_num,
const RegisterValue& reg_value)
{
RegisterInfo reg_info;
if (GetRegisterInfo(reg_kind, reg_num, reg_info))
return WriteRegister (context, &reg_info, reg_value);
return false;
Added the start of opcode emulation for ARM instructions. This class is designed to be fed 4 callbacks: read/write memory, and read/write registers. After this, you can tell the object to read an instruction. This will cause the class to read the PC, and read and instruction. Then you can emulate the instruction by calling EvaluateInstruction. This will cause the class to figure out exactly what an opcode does, and call the read/write mem/regs functions with actual values which allows one to emulate an instruction without running a process, or it allows one to watch the context information (the memory write is a pushing register 3 onto the stack at offset 12) so it can be used for generating call frame information. This way, in the future, we will have one class that can be used to emulate instructions and generate our unwind info from assembly. llvm-svn: 123998
2011-01-22 06:02:52 +08:00
}
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
Added the start of opcode emulation for ARM instructions. This class is designed to be fed 4 callbacks: read/write memory, and read/write registers. After this, you can tell the object to read an instruction. This will cause the class to read the PC, and read and instruction. Then you can emulate the instruction by calling EvaluateInstruction. This will cause the class to figure out exactly what an opcode does, and call the read/write mem/regs functions with actual values which allows one to emulate an instruction without running a process, or it allows one to watch the context information (the memory write is a pushing register 3 onto the stack at offset 12) so it can be used for generating call frame information. This way, in the future, we will have one class that can be used to emulate instructions and generate our unwind info from assembly. llvm-svn: 123998
2011-01-22 06:02:52 +08:00
bool
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
EmulateInstruction::WriteRegisterUnsigned (const Context &context,
Replace uint32_t by lldb::RegisterKing in register context API. llvm-svn: 212172
2014-07-02 17:51:28 +08:00
lldb::RegisterKind reg_kind,
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
uint32_t reg_num,
uint64_t uint_value)
Added the start of opcode emulation for ARM instructions. This class is designed to be fed 4 callbacks: read/write memory, and read/write registers. After this, you can tell the object to read an instruction. This will cause the class to read the PC, and read and instruction. Then you can emulate the instruction by calling EvaluateInstruction. This will cause the class to figure out exactly what an opcode does, and call the read/write mem/regs functions with actual values which allows one to emulate an instruction without running a process, or it allows one to watch the context information (the memory write is a pushing register 3 onto the stack at offset 12) so it can be used for generating call frame information. This way, in the future, we will have one class that can be used to emulate instructions and generate our unwind info from assembly. llvm-svn: 123998
2011-01-22 06:02:52 +08:00
{
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
RegisterInfo reg_info;
if (GetRegisterInfo(reg_kind, reg_num, reg_info))
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
{
RegisterValue reg_value;
if (reg_value.SetUInt(uint_value, reg_info.byte_size))
return WriteRegister (context, &reg_info, reg_value);
}
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
return false;
}
bool
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
EmulateInstruction::WriteRegisterUnsigned (const Context &context,
const RegisterInfo *reg_info,
uint64_t uint_value)
{
if (reg_info)
{
RegisterValue reg_value;
if (reg_value.SetUInt(uint_value, reg_info->byte_size))
return WriteRegister (context, reg_info, reg_value);
}
return false;
}
size_t
EmulateInstruction::ReadMemory (const Context &context,
lldb::addr_t addr,
void *dst,
size_t dst_len)
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
{
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
if (m_read_mem_callback)
return m_read_mem_callback (this, m_baton, context, addr, dst, dst_len) == dst_len;
return false;
Added the start of opcode emulation for ARM instructions. This class is designed to be fed 4 callbacks: read/write memory, and read/write registers. After this, you can tell the object to read an instruction. This will cause the class to read the PC, and read and instruction. Then you can emulate the instruction by calling EvaluateInstruction. This will cause the class to figure out exactly what an opcode does, and call the read/write mem/regs functions with actual values which allows one to emulate an instruction without running a process, or it allows one to watch the context information (the memory write is a pushing register 3 onto the stack at offset 12) so it can be used for generating call frame information. This way, in the future, we will have one class that can be used to emulate instructions and generate our unwind info from assembly. llvm-svn: 123998
2011-01-22 06:02:52 +08:00
}
uint64_t
EmulateInstruction::ReadMemoryUnsigned (const Context &context, lldb::addr_t addr, size_t byte_size, uint64_t fail_value, bool *success_ptr)
{
uint64_t uval64 = 0;
bool success = false;
if (byte_size <= 8)
{
uint8_t buf[sizeof(uint64_t)];
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
size_t bytes_read = m_read_mem_callback (this, m_baton, context, addr, buf, byte_size);
Added the start of opcode emulation for ARM instructions. This class is designed to be fed 4 callbacks: read/write memory, and read/write registers. After this, you can tell the object to read an instruction. This will cause the class to read the PC, and read and instruction. Then you can emulate the instruction by calling EvaluateInstruction. This will cause the class to figure out exactly what an opcode does, and call the read/write mem/regs functions with actual values which allows one to emulate an instruction without running a process, or it allows one to watch the context information (the memory write is a pushing register 3 onto the stack at offset 12) so it can be used for generating call frame information. This way, in the future, we will have one class that can be used to emulate instructions and generate our unwind info from assembly. llvm-svn: 123998
2011-01-22 06:02:52 +08:00
if (bytes_read == byte_size)
{
<rdar://problem/13069948> Major fixed to allow reading files that are over 4GB. The main problems were that the DataExtractor was using 32 bit offsets as a data cursor, and since we mmap all of our object files we could run into cases where if we had a very large core file that was over 4GB, we were running into the 4GB boundary. So I defined a new "lldb::offset_t" which should be used for all file offsets. After making this change, I enabled warnings for data loss and for enexpected implicit conversions temporarily and found a ton of things that I fixed. Any functions that take an index internally, should use "size_t" for any indexes and also should return "size_t" for any sizes of collections. llvm-svn: 173463
2013-01-26 02:06:21 +08:00
lldb::offset_t offset = 0;
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
DataExtractor data (buf, byte_size, GetByteOrder(), GetAddressByteSize());
Added the start of opcode emulation for ARM instructions. This class is designed to be fed 4 callbacks: read/write memory, and read/write registers. After this, you can tell the object to read an instruction. This will cause the class to read the PC, and read and instruction. Then you can emulate the instruction by calling EvaluateInstruction. This will cause the class to figure out exactly what an opcode does, and call the read/write mem/regs functions with actual values which allows one to emulate an instruction without running a process, or it allows one to watch the context information (the memory write is a pushing register 3 onto the stack at offset 12) so it can be used for generating call frame information. This way, in the future, we will have one class that can be used to emulate instructions and generate our unwind info from assembly. llvm-svn: 123998
2011-01-22 06:02:52 +08:00
uval64 = data.GetMaxU64 (&offset, byte_size);
success = true;
}
}
if (success_ptr)
*success_ptr = success;
if (!success)
uval64 = fail_value;
return uval64;
}
bool
EmulateInstruction::WriteMemoryUnsigned (const Context &context,
lldb::addr_t addr,
uint64_t uval,
size_t uval_byte_size)
{
StreamString strm(Stream::eBinary, GetAddressByteSize(), GetByteOrder());
strm.PutMaxHex64 (uval, uval_byte_size);
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
size_t bytes_written = m_write_mem_callback (this, m_baton, context, addr, strm.GetData(), uval_byte_size);
Added the start of opcode emulation for ARM instructions. This class is designed to be fed 4 callbacks: read/write memory, and read/write registers. After this, you can tell the object to read an instruction. This will cause the class to read the PC, and read and instruction. Then you can emulate the instruction by calling EvaluateInstruction. This will cause the class to figure out exactly what an opcode does, and call the read/write mem/regs functions with actual values which allows one to emulate an instruction without running a process, or it allows one to watch the context information (the memory write is a pushing register 3 onto the stack at offset 12) so it can be used for generating call frame information. This way, in the future, we will have one class that can be used to emulate instructions and generate our unwind info from assembly. llvm-svn: 123998
2011-01-22 06:02:52 +08:00
if (bytes_written == uval_byte_size)
return true;
return false;
}
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
bool
EmulateInstruction::WriteMemory (const Context &context,
lldb::addr_t addr,
const void *src,
size_t src_len)
{
if (m_write_mem_callback)
return m_write_mem_callback (this, m_baton, context, addr, src, src_len) == src_len;
return false;
}
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
void
EmulateInstruction::SetBaton (void *baton)
{
m_baton = baton;
}
void
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
EmulateInstruction::SetCallbacks (ReadMemoryCallback read_mem_callback,
WriteMemoryCallback write_mem_callback,
ReadRegisterCallback read_reg_callback,
WriteRegisterCallback write_reg_callback)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
m_read_mem_callback = read_mem_callback;
m_write_mem_callback = write_mem_callback;
m_read_reg_callback = read_reg_callback;
m_write_reg_callback = write_reg_callback;
}
void
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
EmulateInstruction::SetReadMemCallback (ReadMemoryCallback read_mem_callback)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
m_read_mem_callback = read_mem_callback;
}
void
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
EmulateInstruction::SetWriteMemCallback (WriteMemoryCallback write_mem_callback)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
m_write_mem_callback = write_mem_callback;
}
void
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
EmulateInstruction::SetReadRegCallback (ReadRegisterCallback read_reg_callback)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
m_read_reg_callback = read_reg_callback;
}
void
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
EmulateInstruction::SetWriteRegCallback (WriteRegisterCallback write_reg_callback)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
m_write_reg_callback = write_reg_callback;
}
//
// Read & Write Memory and Registers callback functions.
//
size_t
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
EmulateInstruction::ReadMemoryFrame (EmulateInstruction *instruction,
void *baton,
Convert "process" read/write callback functions to "frame" read/write callback functions. llvm-svn: 128917
2011-04-06 04:18:48 +08:00
const Context &context,
lldb::addr_t addr,
void *dst,
The second part in thread hardening the internals of LLDB where we make the lldb_private::StackFrame objects hold onto a weak pointer to the thread object. The lldb_private::StackFrame objects the the most volatile objects we have as when we are doing single stepping, frames can often get lost or thrown away, only to be re-created as another object that still refers to the same frame. We have another bug tracking that. But we need to be able to have frames no longer be able to get the thread when they are not part of a thread anymore, and this is the first step (this fix makes that possible but doesn't implement it yet). Also changed lldb_private::ExecutionContextScope to return shared pointers to all objects in the execution context to further thread harden the internals. llvm-svn: 150871
2012-02-18 13:35:26 +08:00
size_t dst_len)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
The second part in thread hardening the internals of LLDB where we make the lldb_private::StackFrame objects hold onto a weak pointer to the thread object. The lldb_private::StackFrame objects the the most volatile objects we have as when we are doing single stepping, frames can often get lost or thrown away, only to be re-created as another object that still refers to the same frame. We have another bug tracking that. But we need to be able to have frames no longer be able to get the thread when they are not part of a thread anymore, and this is the first step (this fix makes that possible but doesn't implement it yet). Also changed lldb_private::ExecutionContextScope to return shared pointers to all objects in the execution context to further thread harden the internals. llvm-svn: 150871
2012-02-18 13:35:26 +08:00
if (!baton || dst == NULL || dst_len == 0)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
return 0;
The second part in thread hardening the internals of LLDB where we make the lldb_private::StackFrame objects hold onto a weak pointer to the thread object. The lldb_private::StackFrame objects the the most volatile objects we have as when we are doing single stepping, frames can often get lost or thrown away, only to be re-created as another object that still refers to the same frame. We have another bug tracking that. But we need to be able to have frames no longer be able to get the thread when they are not part of a thread anymore, and this is the first step (this fix makes that possible but doesn't implement it yet). Also changed lldb_private::ExecutionContextScope to return shared pointers to all objects in the execution context to further thread harden the internals. llvm-svn: 150871
2012-02-18 13:35:26 +08:00
Roll back the changes I made in r193907 which created a new Frame pure virtual base class and made StackFrame a subclass of that. As I started to build on top of that arrangement today, I found that it wasn't working out like I intended. Instead I'll try sticking with the single StackFrame class -- there's too much code duplication to make a more complicated class hierarchy sensible I think. llvm-svn: 193983
2013-11-04 17:33:30 +08:00
StackFrame *frame = (StackFrame *) baton;
Convert "process" read/write callback functions to "frame" read/write callback functions. llvm-svn: 128917
2011-04-06 04:18:48 +08:00
The second part in thread hardening the internals of LLDB where we make the lldb_private::StackFrame objects hold onto a weak pointer to the thread object. The lldb_private::StackFrame objects the the most volatile objects we have as when we are doing single stepping, frames can often get lost or thrown away, only to be re-created as another object that still refers to the same frame. We have another bug tracking that. But we need to be able to have frames no longer be able to get the thread when they are not part of a thread anymore, and this is the first step (this fix makes that possible but doesn't implement it yet). Also changed lldb_private::ExecutionContextScope to return shared pointers to all objects in the execution context to further thread harden the internals. llvm-svn: 150871
2012-02-18 13:35:26 +08:00
ProcessSP process_sp (frame->CalculateProcess());
if (process_sp)
{
Error error;
return process_sp->ReadMemory (addr, dst, dst_len, error);
}
return 0;
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
}
size_t
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
EmulateInstruction::WriteMemoryFrame (EmulateInstruction *instruction,
void *baton,
Convert "process" read/write callback functions to "frame" read/write callback functions. llvm-svn: 128917
2011-04-06 04:18:48 +08:00
const Context &context,
lldb::addr_t addr,
The second part in thread hardening the internals of LLDB where we make the lldb_private::StackFrame objects hold onto a weak pointer to the thread object. The lldb_private::StackFrame objects the the most volatile objects we have as when we are doing single stepping, frames can often get lost or thrown away, only to be re-created as another object that still refers to the same frame. We have another bug tracking that. But we need to be able to have frames no longer be able to get the thread when they are not part of a thread anymore, and this is the first step (this fix makes that possible but doesn't implement it yet). Also changed lldb_private::ExecutionContextScope to return shared pointers to all objects in the execution context to further thread harden the internals. llvm-svn: 150871
2012-02-18 13:35:26 +08:00
const void *src,
size_t src_len)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
The second part in thread hardening the internals of LLDB where we make the lldb_private::StackFrame objects hold onto a weak pointer to the thread object. The lldb_private::StackFrame objects the the most volatile objects we have as when we are doing single stepping, frames can often get lost or thrown away, only to be re-created as another object that still refers to the same frame. We have another bug tracking that. But we need to be able to have frames no longer be able to get the thread when they are not part of a thread anymore, and this is the first step (this fix makes that possible but doesn't implement it yet). Also changed lldb_private::ExecutionContextScope to return shared pointers to all objects in the execution context to further thread harden the internals. llvm-svn: 150871
2012-02-18 13:35:26 +08:00
if (!baton || src == NULL || src_len == 0)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
return 0;
Roll back the changes I made in r193907 which created a new Frame pure virtual base class and made StackFrame a subclass of that. As I started to build on top of that arrangement today, I found that it wasn't working out like I intended. Instead I'll try sticking with the single StackFrame class -- there's too much code duplication to make a more complicated class hierarchy sensible I think. llvm-svn: 193983
2013-11-04 17:33:30 +08:00
StackFrame *frame = (StackFrame *) baton;
Convert "process" read/write callback functions to "frame" read/write callback functions. llvm-svn: 128917
2011-04-06 04:18:48 +08:00
The second part in thread hardening the internals of LLDB where we make the lldb_private::StackFrame objects hold onto a weak pointer to the thread object. The lldb_private::StackFrame objects the the most volatile objects we have as when we are doing single stepping, frames can often get lost or thrown away, only to be re-created as another object that still refers to the same frame. We have another bug tracking that. But we need to be able to have frames no longer be able to get the thread when they are not part of a thread anymore, and this is the first step (this fix makes that possible but doesn't implement it yet). Also changed lldb_private::ExecutionContextScope to return shared pointers to all objects in the execution context to further thread harden the internals. llvm-svn: 150871
2012-02-18 13:35:26 +08:00
ProcessSP process_sp (frame->CalculateProcess());
if (process_sp)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
The second part in thread hardening the internals of LLDB where we make the lldb_private::StackFrame objects hold onto a weak pointer to the thread object. The lldb_private::StackFrame objects the the most volatile objects we have as when we are doing single stepping, frames can often get lost or thrown away, only to be re-created as another object that still refers to the same frame. We have another bug tracking that. But we need to be able to have frames no longer be able to get the thread when they are not part of a thread anymore, and this is the first step (this fix makes that possible but doesn't implement it yet). Also changed lldb_private::ExecutionContextScope to return shared pointers to all objects in the execution context to further thread harden the internals. llvm-svn: 150871
2012-02-18 13:35:26 +08:00
Error error;
return process_sp->WriteMemory (addr, src, src_len, error);
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
}
return 0;
}
bool
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
EmulateInstruction::ReadRegisterFrame (EmulateInstruction *instruction,
void *baton,
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
const RegisterInfo *reg_info,
RegisterValue &reg_value)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
Convert "process" read/write callback functions to "frame" read/write callback functions. llvm-svn: 128917
2011-04-06 04:18:48 +08:00
if (!baton)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
return false;
Roll back the changes I made in r193907 which created a new Frame pure virtual base class and made StackFrame a subclass of that. As I started to build on top of that arrangement today, I found that it wasn't working out like I intended. Instead I'll try sticking with the single StackFrame class -- there's too much code duplication to make a more complicated class hierarchy sensible I think. llvm-svn: 193983
2013-11-04 17:33:30 +08:00
StackFrame *frame = (StackFrame *) baton;
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
return frame->GetRegisterContext()->ReadRegister (reg_info, reg_value);
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
}
bool
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
EmulateInstruction::WriteRegisterFrame (EmulateInstruction *instruction,
void *baton,
Convert "process" read/write callback functions to "frame" read/write callback functions. llvm-svn: 128917
2011-04-06 04:18:48 +08:00
const Context &context,
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
const RegisterInfo *reg_info,
const RegisterValue &reg_value)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
Convert "process" read/write callback functions to "frame" read/write callback functions. llvm-svn: 128917
2011-04-06 04:18:48 +08:00
if (!baton)
return false;
Roll back the changes I made in r193907 which created a new Frame pure virtual base class and made StackFrame a subclass of that. As I started to build on top of that arrangement today, I found that it wasn't working out like I intended. Instead I'll try sticking with the single StackFrame class -- there's too much code duplication to make a more complicated class hierarchy sensible I think. llvm-svn: 193983
2013-11-04 17:33:30 +08:00
StackFrame *frame = (StackFrame *) baton;
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
return frame->GetRegisterContext()->WriteRegister (reg_info, reg_value);
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
}
size_t
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
EmulateInstruction::ReadMemoryDefault (EmulateInstruction *instruction,
void *baton,
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
const Context &context,
lldb::addr_t addr,
void *dst,
size_t length)
{
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
StreamFile strm (stdout, false);
Resolve printf formatting warnings on Linux: - use macros from inttypes.h for format strings instead of OS-specific types Patch from Matt Kopec! llvm-svn: 168945
2012-11-30 05:49:15 +08:00
strm.Printf (" Read from Memory (address = 0x%" PRIx64 ", length = %" PRIu64 ", context = ", addr, (uint64_t)length);
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
context.Dump (strm, instruction);
strm.EOL();
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
*((uint64_t *) dst) = 0xdeadbeef;
return length;
}
size_t
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
EmulateInstruction::WriteMemoryDefault (EmulateInstruction *instruction,
void *baton,
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
const Context &context,
lldb::addr_t addr,
const void *dst,
size_t length)
{
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
StreamFile strm (stdout, false);
Resolve printf formatting warnings on Linux: - use macros from inttypes.h for format strings instead of OS-specific types Patch from Matt Kopec! llvm-svn: 168945
2012-11-30 05:49:15 +08:00
strm.Printf (" Write to Memory (address = 0x%" PRIx64 ", length = %" PRIu64 ", context = ", addr, (uint64_t)length);
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
context.Dump (strm, instruction);
strm.EOL();
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
return length;
}
bool
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
EmulateInstruction::ReadRegisterDefault (EmulateInstruction *instruction,
void *baton,
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
const RegisterInfo *reg_info,
RegisterValue &reg_value)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
StreamFile strm (stdout, false);
strm.Printf (" Read Register (%s)\n", reg_info->name);
Replace uint32_t by lldb::RegisterKing in register context API. llvm-svn: 212172
2014-07-02 17:51:28 +08:00
lldb::RegisterKind reg_kind;
uint32_t reg_num;
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
if (GetBestRegisterKindAndNumber (reg_info, reg_kind, reg_num))
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
reg_value.SetUInt64((uint64_t)reg_kind << 24 | reg_num);
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
else
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
reg_value.SetUInt64(0);
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
return true;
}
bool
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
EmulateInstruction::WriteRegisterDefault (EmulateInstruction *instruction,
void *baton,
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
const Context &context,
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
const RegisterInfo *reg_info,
const RegisterValue &reg_value)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
StreamFile strm (stdout, false);
strm.Printf (" Write to Register (name = %s, value = " , reg_info->name);
Added generic register numbers for simple ABI argument registers and defined the appropriate registers for arm and x86_64. The register names for the arguments that are the size of a pointer or less are all named "arg1", "arg2", etc. This allows you to read these registers by name: (lldb) register read arg1 arg2 arg3 ... You can also now specify you want to see alternate register names when executing the read register command: (lldb) register read --alternate (lldb) register read -A llvm-svn: 131376
2011-05-15 12:12:07 +08:00
reg_value.Dump(&strm, reg_info, false, false, eFormatDefault);
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
strm.PutCString (", context = ");
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
context.Dump (strm, instruction);
strm.EOL();
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
return true;
}
void
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
EmulateInstruction::Context::Dump (Stream &strm,
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
EmulateInstruction *instruction) const
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
switch (type)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
case eContextReadOpcode:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.PutCString ("reading opcode");
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
break;
case eContextImmediate:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.PutCString ("immediate");
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
break;
case eContextPushRegisterOnStack:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.PutCString ("push register");
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
break;
case eContextPopRegisterOffStack:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.PutCString ("pop register");
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
break;
case eContextAdjustStackPointer:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.PutCString ("adjust sp");
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
break;
Created a std::string in the base StopInfo class for the description and cleaned up all base classes that had their own copy. Added a SetDescription accessor to the StopInfo class. llvm-svn: 132615
2011-06-04 09:26:29 +08:00
case eContextSetFramePointer:
strm.PutCString ("set frame pointer");
break;
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
case eContextAdjustBaseRegister:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.PutCString ("adjusting (writing value back to) a base register");
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
break;
case eContextRegisterPlusOffset:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.PutCString ("register + offset");
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
break;
case eContextRegisterStore:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.PutCString ("store register");
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
break;
case eContextRegisterLoad:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.PutCString ("load register");
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
break;
case eContextRelativeBranchImmediate:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.PutCString ("relative branch immediate");
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
break;
case eContextAbsoluteBranchRegister:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.PutCString ("absolute branch register");
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
break;
case eContextSupervisorCall:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.PutCString ("supervisor call");
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
break;
case eContextTableBranchReadMemory:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.PutCString ("table branch read memory");
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
break;
case eContextWriteRegisterRandomBits:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.PutCString ("write random bits to a register");
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
break;
case eContextWriteMemoryRandomBits:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.PutCString ("write random bits to a memory address");
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
break;
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
case eContextArithmetic:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.PutCString ("arithmetic");
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
break;
case eContextReturnFromException:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.PutCString ("return from exception");
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
break;
default:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.PutCString ("unrecognized context.");
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
break;
}
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
switch (info_type)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
case eInfoTypeRegisterPlusOffset:
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
Resolve printf formatting warnings on Linux: - use macros from inttypes.h for format strings instead of OS-specific types Patch from Matt Kopec! llvm-svn: 168945
2012-11-30 05:49:15 +08:00
strm.Printf (" (reg_plus_offset = %s%+" PRId64 ")",
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
info.RegisterPlusOffset.reg.name,
info.RegisterPlusOffset.signed_offset);
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
}
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
break;
case eInfoTypeRegisterPlusIndirectOffset:
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.Printf (" (reg_plus_reg = %s + %s)",
info.RegisterPlusIndirectOffset.base_reg.name,
info.RegisterPlusIndirectOffset.offset_reg.name);
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
}
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
break;
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
case eInfoTypeRegisterToRegisterPlusOffset:
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
Resolve printf formatting warnings on Linux: - use macros from inttypes.h for format strings instead of OS-specific types Patch from Matt Kopec! llvm-svn: 168945
2012-11-30 05:49:15 +08:00
strm.Printf (" (base_and_imm_offset = %s%+" PRId64 ", data_reg = %s)",
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
info.RegisterToRegisterPlusOffset.base_reg.name,
info.RegisterToRegisterPlusOffset.offset,
info.RegisterToRegisterPlusOffset.data_reg.name);
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
}
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
break;
case eInfoTypeRegisterToRegisterPlusIndirectOffset:
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.Printf (" (base_and_reg_offset = %s + %s, data_reg = %s)",
info.RegisterToRegisterPlusIndirectOffset.base_reg.name,
info.RegisterToRegisterPlusIndirectOffset.offset_reg.name,
info.RegisterToRegisterPlusIndirectOffset.data_reg.name);
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
}
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
break;
case eInfoTypeRegisterRegisterOperands:
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.Printf (" (register to register binary op: %s and %s)",
info.RegisterRegisterOperands.operand1.name,
info.RegisterRegisterOperands.operand2.name);
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
}
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
break;
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
case eInfoTypeOffset:
Resolve printf formatting warnings on Linux: - use macros from inttypes.h for format strings instead of OS-specific types Patch from Matt Kopec! llvm-svn: 168945
2012-11-30 05:49:15 +08:00
strm.Printf (" (signed_offset = %+" PRId64 ")", info.signed_offset);
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
break;
case eInfoTypeRegister:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.Printf (" (reg = %s)", info.reg.name);
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
break;
case eInfoTypeImmediate:
Resolve printf formatting warnings on Linux: - use macros from inttypes.h for format strings instead of OS-specific types Patch from Matt Kopec! llvm-svn: 168945
2012-11-30 05:49:15 +08:00
strm.Printf (" (unsigned_immediate = %" PRIu64 " (0x%16.16" PRIx64 "))",
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
info.unsigned_immediate,
info.unsigned_immediate);
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
break;
case eInfoTypeImmediateSigned:
Resolve printf formatting warnings on Linux: - use macros from inttypes.h for format strings instead of OS-specific types Patch from Matt Kopec! llvm-svn: 168945
2012-11-30 05:49:15 +08:00
strm.Printf (" (signed_immediate = %+" PRId64 " (0x%16.16" PRIx64 "))",
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
info.signed_immediate,
info.signed_immediate);
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
break;
case eInfoTypeAddress:
Resolve printf formatting warnings on Linux: - use macros from inttypes.h for format strings instead of OS-specific types Patch from Matt Kopec! llvm-svn: 168945
2012-11-30 05:49:15 +08:00
strm.Printf (" (address = 0x%" PRIx64 ")", info.address);
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
break;
case eInfoTypeISAAndImmediate:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.Printf (" (isa = %u, unsigned_immediate = %u (0x%8.8x))",
info.ISAAndImmediate.isa,
info.ISAAndImmediate.unsigned_data32,
info.ISAAndImmediate.unsigned_data32);
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
break;
case eInfoTypeISAAndImmediateSigned:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.Printf (" (isa = %u, signed_immediate = %i (0x%8.8x))",
info.ISAAndImmediateSigned.isa,
info.ISAAndImmediateSigned.signed_data32,
info.ISAAndImmediateSigned.signed_data32);
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
break;
case eInfoTypeISA:
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their respective ABI plugins as they were plug-ins that supplied ABI specfic info. Also hookep up the UnwindAssemblyInstEmulation so that it can generate the unwind plans for ARM. Changed the way ABI plug-ins are handed out when you get an instance from the plug-in manager. They used to return pointers that would be mananged individually by each client that requested them, but now they are handed out as shared pointers since there is no state in the ABI objects, they can be shared. llvm-svn: 131193
2011-05-12 02:39:18 +08:00
strm.Printf (" (isa = %u)", info.isa);
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
break;
case eInfoTypeNoArgs:
break;
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
}
}
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
bool
EmulateInstruction::SetInstruction (const Opcode &opcode, const Address &inst_addr, Target *target)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
m_opcode = opcode;
Added the start of the CFI row production using the emulate instruction classes. llvm-svn: 130556
2011-04-30 06:50:31 +08:00
m_addr = LLDB_INVALID_ADDRESS;
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
if (inst_addr.IsValid())
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
if (target)
Added the start of the CFI row production using the emulate instruction classes. llvm-svn: 130556
2011-04-30 06:50:31 +08:00
m_addr = inst_addr.GetLoadAddress (target);
if (m_addr == LLDB_INVALID_ADDRESS)
m_addr = inst_addr.GetFileAddress ();
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
}
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
return true;
}
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
bool
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
EmulateInstruction::GetBestRegisterKindAndNumber (const RegisterInfo *reg_info,
Replace uint32_t by lldb::RegisterKing in register context API. llvm-svn: 212172
2014-07-02 17:51:28 +08:00
lldb::RegisterKind &reg_kind,
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
uint32_t &reg_num)
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
{
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
// Generic and DWARF should be the two most popular register kinds when
// emulating instructions since they are the most platform agnostic...
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
reg_num = reg_info->kinds[eRegisterKindGeneric];
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
if (reg_num != LLDB_INVALID_REGNUM)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
reg_kind = eRegisterKindGeneric;
return true;
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
}
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
reg_num = reg_info->kinds[eRegisterKindDWARF];
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
if (reg_num != LLDB_INVALID_REGNUM)
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
{
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
reg_kind = eRegisterKindDWARF;
return true;
}
Changed the emulate instruction function to take emulate options which are defined as enumerations. Current bits include: eEmulateInstructionOptionAutoAdvancePC eEmulateInstructionOptionIgnoreConditions Modified the EmulateInstruction class to have a few more pure virtuals that can help clients understand how many instructions the emulator can handle: virtual bool SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0; Where instruction types are defined as: //------------------------------------------------------------------ /// Instruction types //------------------------------------------------------------------ typedef enum InstructionType { eInstructionTypeAny, // Support for any instructions at all (at least one) eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer eInstructionTypeAll // All instructions of any kind } InstructionType; This allows use to tell what an emulator can do and also allows us to request these abilities when we are finding the plug-in interface. Added the ability for an EmulateInstruction class to get the register names for any registers that are part of the emulation. This helps with being able to dump and log effectively. The UnwindAssembly class now stores the architecture it was created with in case it is needed later in the unwinding process. Added a function that can tell us DWARF register names for ARM that goes along with the source/Utility/ARM_DWARF_Registers.h file: source/Utility/ARM_DWARF_Registers.c Took some of plug-ins out of the lldb_private namespace. llvm-svn: 130189
2011-04-26 12:39:08 +08:00
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
reg_num = reg_info->kinds[eRegisterKindLLDB];
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
if (reg_num != LLDB_INVALID_REGNUM)
{
reg_kind = eRegisterKindLLDB;
return true;
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
}
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
A messy bit of cleanup: Move towards more descriptive names for eh_frame and stabs register numberings. This is not complete but it's a step in the right direction. It's almost entirely mechanical. lldb informally uses "gcc register numbering" to mean eh_frame. Why? Probably because there's a notorious bug with gcc on i386 darwin where the register numbers in eh_frame were incorrect. In all other cases, eh_frame register numbering is identical to dwarf. lldb informally uses "gdb register numbering" to mean stabs. There are no official definitions of stabs register numbers for different architectures, so the implementations of gdb and gcc are the de facto reference source. There were some incorrect uses of these register number types in lldb already. I fixed the ones that I saw as I made this change. This commit changes all references to "gcc" and "gdb" register numbers in lldb to "eh_frame" and "stabs" to make it clear what is actually being represented. lldb cannot parse the stabs debug format, and given that no one is using stabs any more, it is unlikely that it ever will. A more comprehensive cleanup would remove the stabs register numbers altogether - it's unnecessary cruft / complication to all of our register structures. In ProcessGDBRemote, when we get register definitions from the gdb-remote stub, we expect to see "gcc:" (qRegisterInfo) or "gcc_regnum" (qXfer:features:read: packet to get xml payload). This patch changes ProcessGDBRemote to also accept "ehframe:" and "ehframe_regnum" from these remotes. I did not change GDBRemoteCommunicationServerLLGS or debugserver to send these new packets. I don't know what kind of interoperability constraints we might be working under. At some point in the future we should transition to using the more descriptive names. Throughout lldb we're still using enum names like "gcc_r0" and "gdb_r0", for eh_frame and stabs register numberings. These should be cleaned up eventually too. The sources link cleanly on macosx native with xcode build. I don't think we'll see problems on other platforms but please let me know if I broke anyone. llvm-svn: 245141
2015-08-15 09:21:01 +08:00
reg_num = reg_info->kinds[eRegisterKindEHFrame];
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
if (reg_num != LLDB_INVALID_REGNUM)
{
A messy bit of cleanup: Move towards more descriptive names for eh_frame and stabs register numberings. This is not complete but it's a step in the right direction. It's almost entirely mechanical. lldb informally uses "gcc register numbering" to mean eh_frame. Why? Probably because there's a notorious bug with gcc on i386 darwin where the register numbers in eh_frame were incorrect. In all other cases, eh_frame register numbering is identical to dwarf. lldb informally uses "gdb register numbering" to mean stabs. There are no official definitions of stabs register numbers for different architectures, so the implementations of gdb and gcc are the de facto reference source. There were some incorrect uses of these register number types in lldb already. I fixed the ones that I saw as I made this change. This commit changes all references to "gcc" and "gdb" register numbers in lldb to "eh_frame" and "stabs" to make it clear what is actually being represented. lldb cannot parse the stabs debug format, and given that no one is using stabs any more, it is unlikely that it ever will. A more comprehensive cleanup would remove the stabs register numbers altogether - it's unnecessary cruft / complication to all of our register structures. In ProcessGDBRemote, when we get register definitions from the gdb-remote stub, we expect to see "gcc:" (qRegisterInfo) or "gcc_regnum" (qXfer:features:read: packet to get xml payload). This patch changes ProcessGDBRemote to also accept "ehframe:" and "ehframe_regnum" from these remotes. I did not change GDBRemoteCommunicationServerLLGS or debugserver to send these new packets. I don't know what kind of interoperability constraints we might be working under. At some point in the future we should transition to using the more descriptive names. Throughout lldb we're still using enum names like "gcc_r0" and "gdb_r0", for eh_frame and stabs register numberings. These should be cleaned up eventually too. The sources link cleanly on macosx native with xcode build. I don't think we'll see problems on other platforms but please let me know if I broke anyone. llvm-svn: 245141
2015-08-15 09:21:01 +08:00
reg_kind = eRegisterKindEHFrame;
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
return true;
}
A messy bit of cleanup: Move towards more descriptive names for eh_frame and stabs register numberings. This is not complete but it's a step in the right direction. It's almost entirely mechanical. lldb informally uses "gcc register numbering" to mean eh_frame. Why? Probably because there's a notorious bug with gcc on i386 darwin where the register numbers in eh_frame were incorrect. In all other cases, eh_frame register numbering is identical to dwarf. lldb informally uses "gdb register numbering" to mean stabs. There are no official definitions of stabs register numbers for different architectures, so the implementations of gdb and gcc are the de facto reference source. There were some incorrect uses of these register number types in lldb already. I fixed the ones that I saw as I made this change. This commit changes all references to "gcc" and "gdb" register numbers in lldb to "eh_frame" and "stabs" to make it clear what is actually being represented. lldb cannot parse the stabs debug format, and given that no one is using stabs any more, it is unlikely that it ever will. A more comprehensive cleanup would remove the stabs register numbers altogether - it's unnecessary cruft / complication to all of our register structures. In ProcessGDBRemote, when we get register definitions from the gdb-remote stub, we expect to see "gcc:" (qRegisterInfo) or "gcc_regnum" (qXfer:features:read: packet to get xml payload). This patch changes ProcessGDBRemote to also accept "ehframe:" and "ehframe_regnum" from these remotes. I did not change GDBRemoteCommunicationServerLLGS or debugserver to send these new packets. I don't know what kind of interoperability constraints we might be working under. At some point in the future we should transition to using the more descriptive names. Throughout lldb we're still using enum names like "gcc_r0" and "gdb_r0", for eh_frame and stabs register numberings. These should be cleaned up eventually too. The sources link cleanly on macosx native with xcode build. I don't think we'll see problems on other platforms but please let me know if I broke anyone. llvm-svn: 245141
2015-08-15 09:21:01 +08:00
reg_num = reg_info->kinds[eRegisterKindStabs];
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
if (reg_num != LLDB_INVALID_REGNUM)
{
A messy bit of cleanup: Move towards more descriptive names for eh_frame and stabs register numberings. This is not complete but it's a step in the right direction. It's almost entirely mechanical. lldb informally uses "gcc register numbering" to mean eh_frame. Why? Probably because there's a notorious bug with gcc on i386 darwin where the register numbers in eh_frame were incorrect. In all other cases, eh_frame register numbering is identical to dwarf. lldb informally uses "gdb register numbering" to mean stabs. There are no official definitions of stabs register numbers for different architectures, so the implementations of gdb and gcc are the de facto reference source. There were some incorrect uses of these register number types in lldb already. I fixed the ones that I saw as I made this change. This commit changes all references to "gcc" and "gdb" register numbers in lldb to "eh_frame" and "stabs" to make it clear what is actually being represented. lldb cannot parse the stabs debug format, and given that no one is using stabs any more, it is unlikely that it ever will. A more comprehensive cleanup would remove the stabs register numbers altogether - it's unnecessary cruft / complication to all of our register structures. In ProcessGDBRemote, when we get register definitions from the gdb-remote stub, we expect to see "gcc:" (qRegisterInfo) or "gcc_regnum" (qXfer:features:read: packet to get xml payload). This patch changes ProcessGDBRemote to also accept "ehframe:" and "ehframe_regnum" from these remotes. I did not change GDBRemoteCommunicationServerLLGS or debugserver to send these new packets. I don't know what kind of interoperability constraints we might be working under. At some point in the future we should transition to using the more descriptive names. Throughout lldb we're still using enum names like "gcc_r0" and "gdb_r0", for eh_frame and stabs register numberings. These should be cleaned up eventually too. The sources link cleanly on macosx native with xcode build. I don't think we'll see problems on other platforms but please let me know if I broke anyone. llvm-svn: 245141
2015-08-15 09:21:01 +08:00
reg_kind = eRegisterKindStabs;
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
return true;
}
return false;
}
uint32_t
EmulateInstruction::GetInternalRegisterNumber (RegisterContext *reg_ctx, const RegisterInfo &reg_info)
{
Replace uint32_t by lldb::RegisterKing in register context API. llvm-svn: 212172
2014-07-02 17:51:28 +08:00
lldb::RegisterKind reg_kind;
uint32_t reg_num;
While implementing unwind information using UnwindAssemblyInstEmulation I ran into some cleanup I have been wanting to do when reading/writing registers. Previously all RegisterContext subclasses would need to implement: virtual bool ReadRegisterBytes (uint32_t reg, DataExtractor &data); virtual bool WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0); There is now a new class specifically designed to hold register values: lldb_private::RegisterValue The new register context calls that subclasses must implement are: virtual bool ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0; virtual bool WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0; The RegisterValue class must be big enough to handle any register value. The class contains an enumeration for the value type, and then a union for the data value. Any integer/float values are stored directly in an appropriate host integer/float. Anything bigger is stored in a byte buffer that has a length and byte order. The RegisterValue class also knows how to copy register value bytes into in a buffer with a specified byte order which can be used to write the register value down into memory, and this does the right thing when not all bytes from the register values are needed (getting a uint8 from a uint32 register value..). All RegiterContext and other sources have been switched over to using the new regiter value class. llvm-svn: 131096
2011-05-10 04:18:18 +08:00
if (reg_ctx && GetBestRegisterKindAndNumber (&reg_info, reg_kind, reg_num))
Got the EmulateInstruction CFI code a lot closer to producing CFI data. Switch the EmulateInstruction to use the standard RegisterInfo structure that is defined in the lldb private types intead of passing the reg kind and reg num everywhere. EmulateInstruction subclasses also need to provide RegisterInfo structs given a reg kind and reg num. This eliminates the need for the GetRegisterName() virtual function and allows more complete information to be passed around in the read/write register callbacks. Subclasses should always provide RegiterInfo structs with the generic register info filled in as well as at least one kind of register number in the RegisterInfo.kinds[] array. llvm-svn: 130256
2011-04-27 07:48:45 +08:00
return reg_ctx->ConvertRegisterKindToRegisterNumber (reg_kind, reg_num);
return LLDB_INVALID_REGNUM;
}
bool
EmulateInstruction::CreateFunctionEntryUnwind (UnwindPlan &unwind_plan)
{
unwind_plan.Clear();
return false;
Add the rest of the mechanisms to make ARM instruction emulation usable/possible. llvm-svn: 128907
2011-04-06 02:46:00 +08:00
}