2019-07-09 10:27:29 +08:00
|
|
|
; REQUIRES: asserts
|
|
|
|
|
; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs\
|
|
|
|
|
; RUN: -mcpu=pwr9 --ppc-enable-pipeliner -debug-only=pipeliner 2>&1 \
|
|
|
|
|
; RUN: >/dev/null | FileCheck %s
|
|
|
|
|
define dso_local void @sha512() #0 {
|
|
|
|
|
;CHECK: prolog:
|
|
|
|
|
;CHECK: %16:g8rc = ADD8 %21:g8rc, %20:g8rc
|
|
|
|
|
;CHECK: epilog:
|
|
|
|
|
;CHECK: %23:g8rc_and_g8rc_nox0 = PHI %5:g8rc_and_g8rc_nox0, %bb.3, %18:g8rc_and_g8rc_nox0, %bb.4
|
|
|
|
|
;CHECK-NEXT: %24:g8rc = PHI %6:g8rc, %bb.3, %16:g8rc, %bb.4
|
[MachinePipeliner] Fix Phi refers to Phi in same stage in 1st epilogue
Summary:
This is exposed by functional testing on PowerPC.
In some pipelined loops, Phi refer to phi did not get value defined by
the Phi, hence getting wrong value later.
As the comment mentioned, we should "use the value defined by the Phi,
unless we're generating the firstepilog and the Phi refers to a Phi
in a different stage.", so Phi refering to same stage Phi should use
the value defined by the Phi here.
Reviewers: bcahoon, hfinkel
Reviewed By: hfinkel
Subscribers: MaskRay, wuzish, nemanjai, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64035
llvm-svn: 365428
2019-07-09 10:27:35 +08:00
|
|
|
;CHECK-NEXT: %25:g8rc = PHI %6:g8rc, %bb.3, %19:g8rc, %bb.4
|
2019-07-09 10:27:29 +08:00
|
|
|
br label %1
|
|
|
|
|
|
|
|
|
|
1: ; preds = %1, %0
|
|
|
|
|
%2 = phi i64 [ 0, %0 ], [ %12, %1 ]
|
|
|
|
|
%3 = phi i64 [ undef, %0 ], [ %11, %1 ]
|
|
|
|
|
%4 = phi i64 [ undef, %0 ], [ %3, %1 ]
|
|
|
|
|
%5 = getelementptr inbounds [80 x i64], [80 x i64]* null, i64 0, i64 %2
|
|
|
|
|
%6 = load i64, i64* %5, align 8
|
|
|
|
|
%7 = add i64 0, %6
|
|
|
|
|
%8 = and i64 %3, %4
|
|
|
|
|
%9 = or i64 0, %8
|
|
|
|
|
%10 = add i64 0, %9
|
|
|
|
|
%11 = add i64 %10, %7
|
|
|
|
|
%12 = add nuw nsw i64 %2, 1
|
|
|
|
|
%13 = icmp eq i64 %12, 80
|
|
|
|
|
br i1 %13, label %14, label %1
|
|
|
|
|
|
|
|
|
|
14: ; preds = %1
|
|
|
|
|
%15 = add i64 %4, 0
|
|
|
|
|
store i64 %15, i64* undef, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
