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llvm-project/llvm/test/MC/RISCV/rv32m-valid.s

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[RISCV] Enable emission of alias instructions by default This patch switches the default for -riscv-no-aliases to false and updates all affected MC and CodeGen tests. As recommended in D41071, MC tests use the canonical instructions and the CodeGen tests use the aliases. Additionally, for the f and d instructions with rounding mode, the tests for the aliased versions are moved and tightened such that they can actually detect if alias emission is enabled. (see D40902 for context) Differential Revision: https://reviews.llvm.org/D41225 Patch by Mario Werner. llvm-svn: 320797
2017-12-15 17:47:01 +08:00
# RUN: llvm-mc %s -triple=riscv32 -mattr=+m -riscv-no-aliases -show-encoding \
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands Standardise on check lines: * CHECK-ASM * CHECK-OBJ * CHECK-ASM-AND-OBJ This allows for the addition of tests involving symbol operands, which will not result in identical instructions in both assembly and disassembled object output. This commit doesn't exploit this reworking to increase test coverage of symbol operands - that will come in a future patch. llvm-svn: 341546
2018-09-06 21:41:04 +08:00
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
[RISCV] Enable emission of alias instructions by default This patch switches the default for -riscv-no-aliases to false and updates all affected MC and CodeGen tests. As recommended in D41071, MC tests use the canonical instructions and the CodeGen tests use the aliases. Additionally, for the f and d instructions with rounding mode, the tests for the aliased versions are moved and tightened such that they can actually detect if alias emission is enabled. (see D40902 for context) Differential Revision: https://reviews.llvm.org/D41225 Patch by Mario Werner. llvm-svn: 320797
2017-12-15 17:47:01 +08:00
# RUN: llvm-mc %s -triple=riscv64 -mattr=+m -riscv-no-aliases -show-encoding \
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands Standardise on check lines: * CHECK-ASM * CHECK-OBJ * CHECK-ASM-AND-OBJ This allows for the addition of tests involving symbol operands, which will not result in identical instructions in both assembly and disassembled object output. This commit doesn't exploit this reworking to increase test coverage of symbol operands - that will come in a future patch. llvm-svn: 341546
2018-09-06 21:41:04 +08:00
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+m < %s \
[RISCV] Support llvm-objdump -M no-aliases and -M numeric Summary: Now that llvm-objdump allows target-specific options, we match the `no-aliases` and `numeric` options for RISC-V, as supported by GNU objdump. This is done by overriding the variables used for the command-line options, so that the command-line options are still supported. This patch updates all tests using `llvm-objdump -riscv-no-aliases` to use `llvm-objdump -M no-aliases`. Reviewers: luismarques, asb Reviewed By: luismarques, asb Subscribers: pzheng, hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66139 llvm-svn: 371534
2019-09-11 00:24:03 +08:00
# RUN: | llvm-objdump -mattr=+m -M no-aliases -d -r - \
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands Standardise on check lines: * CHECK-ASM * CHECK-OBJ * CHECK-ASM-AND-OBJ This allows for the addition of tests involving symbol operands, which will not result in identical instructions in both assembly and disassembled object output. This commit doesn't exploit this reworking to increase test coverage of symbol operands - that will come in a future patch. llvm-svn: 341546
2018-09-06 21:41:04 +08:00
# RUN: | FileCheck -check-prefixes=CHECK-OBJ,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+m < %s \
[RISCV] Support llvm-objdump -M no-aliases and -M numeric Summary: Now that llvm-objdump allows target-specific options, we match the `no-aliases` and `numeric` options for RISC-V, as supported by GNU objdump. This is done by overriding the variables used for the command-line options, so that the command-line options are still supported. This patch updates all tests using `llvm-objdump -riscv-no-aliases` to use `llvm-objdump -M no-aliases`. Reviewers: luismarques, asb Reviewed By: luismarques, asb Subscribers: pzheng, hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66139 llvm-svn: 371534
2019-09-11 00:24:03 +08:00
# RUN: | llvm-objdump -mattr=+m -M no-aliases -d -r - \
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands Standardise on check lines: * CHECK-ASM * CHECK-OBJ * CHECK-ASM-AND-OBJ This allows for the addition of tests involving symbol operands, which will not result in identical instructions in both assembly and disassembled object output. This commit doesn't exploit this reworking to increase test coverage of symbol operands - that will come in a future patch. llvm-svn: 341546
2018-09-06 21:41:04 +08:00
# RUN: | FileCheck -check-prefixes=CHECK-OBJ,CHECK-ASM-AND-OBJ %s
[RISCV] MC layer support for the standard RV32M instruction set extension llvm-svn: 317788
2017-11-09 22:46:30 +08:00
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands Standardise on check lines: * CHECK-ASM * CHECK-OBJ * CHECK-ASM-AND-OBJ This allows for the addition of tests involving symbol operands, which will not result in identical instructions in both assembly and disassembled object output. This commit doesn't exploit this reworking to increase test coverage of symbol operands - that will come in a future patch. llvm-svn: 341546
2018-09-06 21:41:04 +08:00
# CHECK-ASM-AND-OBJ: mul a4, ra, s0
# CHECK-ASM: encoding: [0x33,0x87,0x80,0x02]
[RISCV] MC layer support for the standard RV32M instruction set extension llvm-svn: 317788
2017-11-09 22:46:30 +08:00
mul a4, ra, s0
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands Standardise on check lines: * CHECK-ASM * CHECK-OBJ * CHECK-ASM-AND-OBJ This allows for the addition of tests involving symbol operands, which will not result in identical instructions in both assembly and disassembled object output. This commit doesn't exploit this reworking to increase test coverage of symbol operands - that will come in a future patch. llvm-svn: 341546
2018-09-06 21:41:04 +08:00
# CHECK-ASM-AND-OBJ: mulh ra, zero, zero
# CHECK-ASM: encoding: [0xb3,0x10,0x00,0x02]
[RISCV] MC layer support for the standard RV32M instruction set extension llvm-svn: 317788
2017-11-09 22:46:30 +08:00
mulh x1, x0, x0
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands Standardise on check lines: * CHECK-ASM * CHECK-OBJ * CHECK-ASM-AND-OBJ This allows for the addition of tests involving symbol operands, which will not result in identical instructions in both assembly and disassembled object output. This commit doesn't exploit this reworking to increase test coverage of symbol operands - that will come in a future patch. llvm-svn: 341546
2018-09-06 21:41:04 +08:00
# CHECK-ASM-AND-OBJ: mulhsu t0, t2, t1
# CHECK-ASM: encoding: [0xb3,0xa2,0x63,0x02]
[RISCV] MC layer support for the standard RV32M instruction set extension llvm-svn: 317788
2017-11-09 22:46:30 +08:00
mulhsu t0, t2, t1
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands Standardise on check lines: * CHECK-ASM * CHECK-OBJ * CHECK-ASM-AND-OBJ This allows for the addition of tests involving symbol operands, which will not result in identical instructions in both assembly and disassembled object output. This commit doesn't exploit this reworking to increase test coverage of symbol operands - that will come in a future patch. llvm-svn: 341546
2018-09-06 21:41:04 +08:00
# CHECK-ASM-AND-OBJ: mulhu a5, a4, a3
# CHECK-ASM: encoding: [0xb3,0x37,0xd7,0x02]
[RISCV] MC layer support for the standard RV32M instruction set extension llvm-svn: 317788
2017-11-09 22:46:30 +08:00
mulhu a5, a4, a3
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands Standardise on check lines: * CHECK-ASM * CHECK-OBJ * CHECK-ASM-AND-OBJ This allows for the addition of tests involving symbol operands, which will not result in identical instructions in both assembly and disassembled object output. This commit doesn't exploit this reworking to increase test coverage of symbol operands - that will come in a future patch. llvm-svn: 341546
2018-09-06 21:41:04 +08:00
# CHECK-ASM-AND-OBJ: div s0, s0, s0
# CHECK-ASM: encoding: [0x33,0x44,0x84,0x02]
[RISCV] MC layer support for the standard RV32M instruction set extension llvm-svn: 317788
2017-11-09 22:46:30 +08:00
div s0, s0, s0
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands Standardise on check lines: * CHECK-ASM * CHECK-OBJ * CHECK-ASM-AND-OBJ This allows for the addition of tests involving symbol operands, which will not result in identical instructions in both assembly and disassembled object output. This commit doesn't exploit this reworking to increase test coverage of symbol operands - that will come in a future patch. llvm-svn: 341546
2018-09-06 21:41:04 +08:00
# CHECK-ASM-AND-OBJ: divu gp, a0, a1
# CHECK-ASM: encoding: [0xb3,0x51,0xb5,0x02]
[RISCV] MC layer support for the standard RV32M instruction set extension llvm-svn: 317788
2017-11-09 22:46:30 +08:00
divu gp, a0, a1
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands Standardise on check lines: * CHECK-ASM * CHECK-OBJ * CHECK-ASM-AND-OBJ This allows for the addition of tests involving symbol operands, which will not result in identical instructions in both assembly and disassembled object output. This commit doesn't exploit this reworking to increase test coverage of symbol operands - that will come in a future patch. llvm-svn: 341546
2018-09-06 21:41:04 +08:00
# CHECK-ASM-AND-OBJ: rem s2, s2, s8
# CHECK-ASM: encoding: [0x33,0x69,0x89,0x03]
[RISCV] MC layer support for the standard RV32M instruction set extension llvm-svn: 317788
2017-11-09 22:46:30 +08:00
rem s2, s2, s8
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands Standardise on check lines: * CHECK-ASM * CHECK-OBJ * CHECK-ASM-AND-OBJ This allows for the addition of tests involving symbol operands, which will not result in identical instructions in both assembly and disassembled object output. This commit doesn't exploit this reworking to increase test coverage of symbol operands - that will come in a future patch. llvm-svn: 341546
2018-09-06 21:41:04 +08:00
# CHECK-ASM-AND-OBJ: remu s2, s2, s8
# CHECK-ASM: encoding: [0x33,0x79,0x89,0x03]
[RISCV] MC layer support for the standard RV32M instruction set extension llvm-svn: 317788
2017-11-09 22:46:30 +08:00
remu x18, x18, x24