2017-09-02 00:56:32 +08:00
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# RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefix=GCN -check-prefix=VI %s
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2018-09-10 18:14:48 +08:00
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# RUN: llc -march=amdgcn -mcpu=gfx803 -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefix=GCN -check-prefix=GFX8 %s
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2017-09-02 00:56:32 +08:00
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# RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefix=GCN -check-prefix=GFX9 %s
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2017-09-06 21:50:13 +08:00
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# GCN-LABEL: name: hazard_implicit_def
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2017-09-02 00:56:32 +08:00
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# GCN: bb.0.entry:
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2018-02-01 06:04:26 +08:00
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# GCN: $m0 = S_MOV_B32
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2017-09-02 00:56:32 +08:00
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# GFX9: S_NOP 0
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# VI-NOT: S_NOP_0
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# GCN: V_INTERP_P1_F32
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---
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name: hazard_implicit_def
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
Summary:
This catches malformed mir files which specify alignment as log2 instead of pow2.
See https://reviews.llvm.org/D65945 for reference,
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: MatzeB, qcolombet, dschuff, arsenm, sdardis, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, s.egerton, pzheng, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67433
llvm-svn: 371608
2019-09-11 19:16:48 +08:00
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alignment: 1
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2017-09-02 00:56:32 +08:00
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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liveins:
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2018-02-01 06:04:26 +08:00
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- { reg: '$sgpr7', virtual-reg: '' }
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- { reg: '$vgpr4', virtual-reg: '' }
|
2017-09-02 00:56:32 +08:00
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body: |
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bb.0.entry:
|
2018-02-01 06:04:26 +08:00
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liveins: $sgpr7, $vgpr4
|
2017-09-02 00:56:32 +08:00
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2018-02-01 06:04:26 +08:00
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$m0 = S_MOV_B32 killed $sgpr7
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$vgpr5 = IMPLICIT_DEF
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$vgpr0 = V_INTERP_P1_F32 killed $vgpr4, 0, 0, implicit $m0, implicit $exec
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SI_RETURN_TO_EPILOG killed $vgpr5, killed $vgpr0
|
2017-09-02 00:56:32 +08:00
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|
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|
...
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2017-09-06 21:50:13 +08:00
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# GCN-LABEL: name: hazard_inlineasm
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# GCN: bb.0.entry:
|
2018-02-01 06:04:26 +08:00
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# GCN: $m0 = S_MOV_B32
|
2017-09-06 21:50:13 +08:00
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|
# GFX9: S_NOP 0
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|
# VI-NOT: S_NOP_0
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|
# GCN: V_INTERP_P1_F32
|
|
|
|
---
|
|
|
|
name: hazard_inlineasm
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
Summary:
This catches malformed mir files which specify alignment as log2 instead of pow2.
See https://reviews.llvm.org/D65945 for reference,
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: MatzeB, qcolombet, dschuff, arsenm, sdardis, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, s.egerton, pzheng, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67433
llvm-svn: 371608
2019-09-11 19:16:48 +08:00
|
|
|
alignment: 1
|
2017-09-06 21:50:13 +08:00
|
|
|
exposesReturnsTwice: false
|
|
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|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
registers:
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$sgpr7', virtual-reg: '' }
|
|
|
|
- { reg: '$vgpr4', virtual-reg: '' }
|
2017-09-06 21:50:13 +08:00
|
|
|
body: |
|
|
|
|
bb.0.entry:
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $sgpr7, $vgpr4
|
2017-09-06 21:50:13 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
$m0 = S_MOV_B32 killed $sgpr7
|
|
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|
INLINEASM &"; no-op", 1, 327690, def $vgpr5
|
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|
$vgpr0 = V_INTERP_P1_F32 killed $vgpr4, 0, 0, implicit $m0, implicit $exec
|
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|
SI_RETURN_TO_EPILOG killed $vgpr5, killed $vgpr0
|
2017-09-06 21:50:13 +08:00
|
|
|
...
|
2018-09-10 18:14:48 +08:00
|
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|
# IMPLICIT_DEF/DBG_VALUE instructions should not prevent the hazard recognizer
|
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|
# from adding s_nop instructions between m0 update and s_sendmsg.
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|
# GCN-LABEL: name: hazard-lookahead-implicit-def
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# GCN: $vgpr6 = IMPLICIT_DEF
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# GFX8-NEXT: S_NOP 0
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|
# GFX9-NEXT: S_NOP 0
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|
# GCN: S_SENDMSG 3, implicit $exec, implicit $m0
|
|
|
|
---
|
|
|
|
name: hazard-lookahead-implicit-def
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
$m0 = S_MOV_B32 killed $sgpr12
|
|
|
|
$vgpr0 = IMPLICIT_DEF
|
|
|
|
$vgpr1 = IMPLICIT_DEF
|
|
|
|
$vgpr2 = IMPLICIT_DEF
|
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|
$vgpr3 = IMPLICIT_DEF
|
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|
$vgpr4 = IMPLICIT_DEF
|
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|
$vgpr5 = IMPLICIT_DEF
|
|
|
|
$vgpr6 = IMPLICIT_DEF
|
|
|
|
S_SENDMSG 3, implicit $exec, implicit $m0
|
[AMDGPU] Add support for immediate operand for S_ENDPGM
Summary:
Add support for immediate operand in S_ENDPGM
Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6
Reviewers: alexshap
Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59213
llvm-svn: 355902
2019-03-12 17:52:58 +08:00
|
|
|
S_ENDPGM 0
|
2018-09-10 18:14:48 +08:00
|
|
|
...
|
|
|
|
|
|
|
|
# GCN-LABEL: name: hazard-lookahead-dbg-value
|
|
|
|
# GCN: DBG_VALUE 6
|
|
|
|
# GFX8-NEXT: S_NOP 0
|
|
|
|
# GFX9-NEXT: S_NOP 0
|
|
|
|
# GCN: S_SENDMSG 3, implicit $exec, implicit $m0
|
|
|
|
---
|
|
|
|
name: hazard-lookahead-dbg-value
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
$m0 = S_MOV_B32 killed $sgpr12
|
|
|
|
DBG_VALUE 0
|
|
|
|
DBG_VALUE 1
|
|
|
|
DBG_VALUE 2
|
|
|
|
DBG_VALUE 3
|
|
|
|
DBG_VALUE 4
|
|
|
|
DBG_VALUE 5
|
|
|
|
DBG_VALUE 6
|
|
|
|
S_SENDMSG 3, implicit $exec, implicit $m0
|
[AMDGPU] Add support for immediate operand for S_ENDPGM
Summary:
Add support for immediate operand in S_ENDPGM
Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6
Reviewers: alexshap
Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59213
llvm-svn: 355902
2019-03-12 17:52:58 +08:00
|
|
|
S_ENDPGM 0
|
2018-09-10 18:14:48 +08:00
|
|
|
...
|
|
|
|
|
|
|
|
# GCN-LABEL: name: hazard-lookahead-dbg-label
|
|
|
|
# GCN: DBG_LABEL 6
|
|
|
|
# GFX8-NEXT: S_NOP 0
|
|
|
|
# GFX9-NEXT: S_NOP 0
|
|
|
|
# GCN: S_SENDMSG 3, implicit $exec, implicit $m0
|
|
|
|
---
|
|
|
|
name: hazard-lookahead-dbg-label
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
$m0 = S_MOV_B32 killed $sgpr12
|
|
|
|
DBG_LABEL 0
|
|
|
|
DBG_LABEL 1
|
|
|
|
DBG_LABEL 2
|
|
|
|
DBG_LABEL 3
|
|
|
|
DBG_LABEL 4
|
|
|
|
DBG_LABEL 5
|
|
|
|
DBG_LABEL 6
|
|
|
|
S_SENDMSG 3, implicit $exec, implicit $m0
|
[AMDGPU] Add support for immediate operand for S_ENDPGM
Summary:
Add support for immediate operand in S_ENDPGM
Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6
Reviewers: alexshap
Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59213
llvm-svn: 355902
2019-03-12 17:52:58 +08:00
|
|
|
S_ENDPGM 0
|
2018-09-10 18:14:48 +08:00
|
|
|
...
|