llvm-project/llvm/test/CodeGen/X86/vec_shuffle-36.ll

; RUN: llc < %s -march=x86 -mattr=sse41 -o %t
; RUN: grep pshufb %t | count 1


define <8 x i16> @shuf6(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
entry:
	%tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 3, i32 2, i32 0, i32 2, i32 1, i32 5, i32 6 , i32 undef >
	ret <8 x i16> %tmp9
}
Eliminate more uses of llvm-as and llvm-dis. llvm-svn: 81290 2009-09-09 07:54:48 +08:00			`; RUN: llc < %s -march=x86 -mattr=sse41 -o %t`
Fixed a v8i16 shuffle case that should generate a pshufb instead of a pshuflw/hw. llvm-svn: 66645 2009-03-11 14:35:11 +08:00			`; RUN: grep pshufb %t \| count 1`


			`define <8 x i16> @shuf6(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {`
			`entry:`
			`%tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 3, i32 2, i32 0, i32 2, i32 1, i32 5, i32 6 , i32 undef >`
			`ret <8 x i16> %tmp9`
			`}`