2013-11-10 09:03:59 +08:00
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//===-- AMDGPUAsmPrinter.h - Print AMDGPU assembly code ---------*- C++ -*-===//
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2012-12-12 05:25:42 +08:00
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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2018-05-01 23:54:18 +08:00
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/// AMDGPU Assembly printer class.
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2012-12-12 05:25:42 +08:00
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//
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//===----------------------------------------------------------------------===//
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2016-03-11 16:00:27 +08:00
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#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUASMPRINTER_H
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#define LLVM_LIB_TARGET_AMDGPU_AMDGPUASMPRINTER_H
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2012-12-12 05:25:42 +08:00
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2017-03-27 22:04:01 +08:00
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#include "AMDGPU.h"
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2017-06-06 19:49:48 +08:00
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#include "AMDKernelCodeT.h"
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2017-10-12 06:59:35 +08:00
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#include "MCTargetDesc/AMDGPUHSAMetadataStreamer.h"
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2018-07-11 01:31:32 +08:00
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#include "SIProgramInfo.h"
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2017-01-21 01:52:16 +08:00
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#include "llvm/ADT/StringRef.h"
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2012-12-12 05:25:42 +08:00
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/Support/AMDHSAKernelDescriptor.h"
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#include <cstddef>
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#include <cstdint>
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#include <limits>
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#include <memory>
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#include <string>
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2013-10-12 13:02:51 +08:00
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#include <vector>
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2012-12-12 05:25:42 +08:00
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namespace llvm {
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2018-05-26 01:25:12 +08:00
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class AMDGPUMachineFunction;
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2017-03-23 06:32:22 +08:00
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class AMDGPUTargetStreamer;
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class MCOperand;
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class SISubtarget;
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2016-03-11 16:00:27 +08:00
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class AMDGPUAsmPrinter final : public AsmPrinter {
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private:
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// Track resource usage for callee functions.
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struct SIFunctionResourceInfo {
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// Track the number of explicitly used VGPRs. Special registers reserved at
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// the end are tracked separately.
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int32_t NumVGPR = 0;
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int32_t NumExplicitSGPR = 0;
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2017-11-15 04:33:14 +08:00
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uint64_t PrivateSegmentSize = 0;
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2017-05-03 01:14:00 +08:00
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bool UsesVCC = false;
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bool UsesFlatScratch = false;
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bool HasDynamicallySizedStack = false;
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bool HasRecursion = false;
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int32_t getTotalNumSGPRs(const SISubtarget &ST) const;
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};
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SIProgramInfo CurrentProgramInfo;
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DenseMap<const Function *, SIFunctionResourceInfo> CallGraphResourceInfo;
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AMDGPU::HSAMD::MetadataStreamer HSAMetadataStream;
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std::map<uint32_t, uint32_t> PALMetadataMap;
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2017-05-03 01:14:00 +08:00
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2017-04-18 03:48:30 +08:00
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uint64_t getFunctionCodeSize(const MachineFunction &MF) const;
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SIFunctionResourceInfo analyzeResourceUsage(const MachineFunction &MF) const;
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2017-10-12 06:41:09 +08:00
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void readPALMetadata(Module &M);
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void getSIProgramInfo(SIProgramInfo &Out, const MachineFunction &MF);
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2017-03-23 06:54:39 +08:00
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void getAmdKernelCode(amd_kernel_code_t &Out, const SIProgramInfo &KernelInfo,
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const MachineFunction &MF) const;
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void findNumUsedRegistersSI(const MachineFunction &MF,
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unsigned &NumSGPR,
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unsigned &NumVGPR) const;
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/// Emit register usage information so that the GPU driver
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/// can correctly setup the GPU state.
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void EmitProgramInfoSI(const MachineFunction &MF,
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const SIProgramInfo &KernelInfo);
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void EmitPALMetadata(const MachineFunction &MF,
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const SIProgramInfo &KernelInfo);
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2017-05-03 01:14:00 +08:00
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void emitCommonFunctionComments(uint32_t NumVGPR,
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uint32_t NumSGPR,
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uint64_t ScratchSize,
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uint64_t CodeSize,
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const AMDGPUMachineFunction* MFI);
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2018-06-13 02:02:46 +08:00
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uint16_t getAmdhsaKernelCodeProperties(
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const MachineFunction &MF) const;
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amdhsa::kernel_descriptor_t getAmdhsaKernelDescriptor(
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const MachineFunction &MF,
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const SIProgramInfo &PI) const;
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2012-12-12 05:25:42 +08:00
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public:
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2015-01-19 04:29:04 +08:00
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explicit AMDGPUAsmPrinter(TargetMachine &TM,
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std::unique_ptr<MCStreamer> Streamer);
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2012-12-12 05:25:42 +08:00
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2016-10-01 10:56:57 +08:00
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StringRef getPassName() const override;
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2012-12-12 05:25:42 +08:00
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2017-03-23 06:32:22 +08:00
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const MCSubtargetInfo* getSTI() const;
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2017-10-15 06:16:26 +08:00
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AMDGPUTargetStreamer* getTargetStreamer() const;
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2017-03-23 06:32:22 +08:00
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2017-05-03 01:14:00 +08:00
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bool doFinalization(Module &M) override;
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bool runOnMachineFunction(MachineFunction &MF) override;
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2018-05-01 23:54:18 +08:00
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/// Wrapper for MCInstLowering.lowerOperand() for the tblgen'erated
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2016-10-07 01:19:11 +08:00
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/// pseudo lowering.
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bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const;
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2018-05-01 23:54:18 +08:00
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/// Lower the specified LLVM Constant to an MCExpr.
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2017-02-07 08:43:21 +08:00
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/// The AsmPrinter::lowerConstantof does not know how to lower
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/// addrspacecast, therefore they should be lowered by this function.
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const MCExpr *lowerConstant(const Constant *CV) override;
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2018-05-01 23:54:18 +08:00
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/// tblgen'erated driver function for lowering simple MI->MC pseudo
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/// instructions.
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bool emitPseudoExpansionLowering(MCStreamer &OutStreamer,
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const MachineInstr *MI);
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2012-12-12 05:25:42 +08:00
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/// Implemented in AMDGPUMCInstLower.cpp
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void EmitInstruction(const MachineInstr *MI) override;
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2015-06-27 05:14:58 +08:00
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void EmitFunctionBodyStart() override;
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2018-06-13 02:02:46 +08:00
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void EmitFunctionBodyEnd() override;
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2015-11-06 19:45:14 +08:00
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void EmitFunctionEntryLabel() override;
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2017-12-08 22:09:34 +08:00
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void EmitBasicBlockStart(const MachineBasicBlock &MBB) const override;
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2015-12-03 01:00:42 +08:00
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void EmitGlobalVariable(const GlobalVariable *GV) override;
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2016-01-13 01:18:17 +08:00
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void EmitStartOfAsmFile(Module &M) override;
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2017-03-23 06:32:22 +08:00
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void EmitEndOfAsmFile(Module &M) override;
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2016-10-07 00:20:41 +08:00
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bool isBlockOnlyReachableByFallthrough(
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const MachineBasicBlock *MBB) const override;
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2015-04-08 09:09:26 +08:00
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bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode,
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2015-04-08 10:07:05 +08:00
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raw_ostream &O) override;
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2015-04-08 09:09:26 +08:00
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2013-10-12 13:02:51 +08:00
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protected:
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2017-12-08 22:09:34 +08:00
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mutable std::vector<std::string> DisasmLines, HexLines;
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mutable size_t DisasmLineMaxLen;
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2017-03-27 22:04:01 +08:00
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AMDGPUAS AMDGPUASI;
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2012-12-12 05:25:42 +08:00
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};
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2017-01-21 01:52:16 +08:00
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} // end namespace llvm
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2012-12-12 05:25:42 +08:00
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2017-01-21 01:52:16 +08:00
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#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUASMPRINTER_H
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