forked from OSchip/llvm-project
65 lines
2.5 KiB
Plaintext
65 lines
2.5 KiB
Plaintext
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# RUN: llc -o - %s -mtriple=x86_64-- -run-pass=x86-avoid-SFB | FileCheck %s
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--- |
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; ModuleID = '../test/CodeGen/X86/avoid-sfb-mir.ll'
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source_filename = "../test/CodeGen/X86/avoid-sfb-mir.ll"
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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%struct.S = type { i32, i32, i32, i32 }
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; Function Attrs: nounwind uwtable
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define void @test_imm_store(%struct.S* noalias nocapture %s1, %struct.S* nocapture %s2, i32 %x, %struct.S* nocapture %s3) local_unnamed_addr #0 {
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entry:
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%a2 = bitcast %struct.S* %s1 to i32*
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store i32 0, i32* %a2, align 4
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%a13 = bitcast %struct.S* %s3 to i32*
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store i32 1, i32* %a13, align 4
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%0 = bitcast %struct.S* %s2 to i8*
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%1 = bitcast %struct.S* %s1 to i8*
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 %1, i64 16, i1 false)
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ret void
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}
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declare void @bar(%struct.S*) local_unnamed_addr
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; Function Attrs: argmemonly nounwind
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1) #1
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...
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---
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name: test_imm_store
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alignment: 4
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gr64 }
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- { id: 1, class: gr64 }
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- { id: 2, class: gr32 }
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- { id: 3, class: gr64 }
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- { id: 4, class: vr128 }
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liveins:
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- { reg: '$rdi', virtual-reg: '%0' }
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- { reg: '$rsi', virtual-reg: '%1' }
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- { reg: '$rcx', virtual-reg: '%3' }
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body: |
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bb.0.entry:
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liveins: $rdi, $rsi, $rcx
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; CHECK: MOV32mi %0, 1, $noreg, 0, $noreg, 0 :: (store 4 into %ir.a2)
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; CHECK-NEXT: MOV32mi %3, 1, $noreg, 0, $noreg, 1 :: (store 4 into %ir.a13)
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; CHECK-NEXT: %5:gr32 = MOV32rm %0, 1, $noreg, 0, $noreg :: (load 4 from %ir.1)
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; CHECK-NEXT: MOV32mr %1, 1, $noreg, 0, $noreg, killed %5 :: (store 4 into %ir.0)
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; CHECK-NEXT: %6:gr64 = MOV64rm %0, 1, $noreg, 4, $noreg :: (load 8 from %ir.1 + 4, align 4)
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; CHECK-NEXT: MOV64mr %1, 1, $noreg, 4, $noreg, killed %6 :: (store 8 into %ir.0 + 4, align 4)
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; CHECK-NEXT: %7:gr32 = MOV32rm killed %0, 1, $noreg, 12, $noreg :: (load 4 from %ir.1 + 12)
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; CHECK-NEXT: MOV32mr killed %1, 1, $noreg, 12, $noreg, killed %7 :: (store 4 into %ir.0 + 12)
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%3:gr64 = COPY $rcx
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%1:gr64 = COPY $rsi
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%0:gr64 = COPY $rdi
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MOV32mi %0, 1, $noreg, 0, $noreg, 0 :: (store 4 into %ir.a2)
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MOV32mi %3, 1, $noreg, 0, $noreg, 1 :: (store 4 into %ir.a13)
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%4:vr128 = MOVUPSrm killed %0, 1, $noreg, 0, $noreg :: (load 16 from %ir.1, align 4)
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MOVUPSmr killed %1, 1, $noreg, 0, $noreg, killed %4 :: (store 16 into %ir.0, align 4)
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RET 0
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...
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