2016-07-18 14:48:25 +08:00
|
|
|
; We run the tests with both the default optimization level and O0, to make sure
|
|
|
|
; we don't have any ABI differences between them. In principle, the ABI checks
|
|
|
|
; should be the same for both optimization levels (there could be exceptions
|
|
|
|
; from this when a div and a mod with the same operands are not coallesced into
|
|
|
|
; the same divmod, but luckily this doesn't occur in practice even at O0).
|
|
|
|
; Sometimes the checks that the correct registers are used after the libcalls
|
|
|
|
; are different between optimization levels, so we have to separate them.
|
2013-07-16 17:32:17 +08:00
|
|
|
; RUN: llc -mtriple armv7-none-eabi %s -o - | FileCheck %s --check-prefix=EABI
|
2016-07-18 14:48:25 +08:00
|
|
|
; RUN: llc -mtriple armv7-none-eabi %s -o - -O0 -optimize-regalloc | FileCheck %s --check-prefix=EABI
|
2013-12-17 02:51:28 +08:00
|
|
|
; RUN: llc -mtriple armv7-none-eabihf %s -o - | FileCheck %s --check-prefix=EABI
|
2016-07-18 14:48:25 +08:00
|
|
|
; RUN: llc -mtriple armv7-none-eabihf %s -o - -O0 -optimize-regalloc | FileCheck %s --check-prefix=EABI
|
2016-02-04 00:10:54 +08:00
|
|
|
; All "eabi" (Bare, GNU and Android) must lower SREM/UREM to __aeabi_{u,i}divmod
|
2015-07-31 08:45:12 +08:00
|
|
|
; RUN: llc -mtriple armv7-linux-androideabi %s -o - | FileCheck %s --check-prefix=EABI
|
2016-07-18 14:48:25 +08:00
|
|
|
; RUN: llc -mtriple armv7-linux-androideabi %s -o - -O0 -optimize-regalloc | FileCheck %s --check-prefix=EABI
|
2016-02-04 00:10:54 +08:00
|
|
|
; RUN: llc -mtriple armv7-linux-gnueabi %s -o - | FileCheck %s --check-prefix=EABI
|
2016-07-18 14:48:25 +08:00
|
|
|
; RUN: llc -mtriple armv7-linux-gnueabi %s -o - -O0 -optimize-regalloc | FileCheck %s --check-prefix=EABI
|
2016-06-25 05:14:33 +08:00
|
|
|
; RUN: llc -mtriple armv7-linux-musleabi %s -o - | FileCheck %s --check-prefix=EABI
|
2016-07-18 14:48:25 +08:00
|
|
|
; RUN: llc -mtriple armv7-linux-musleabi %s -o - -O0 -optimize-regalloc | FileCheck %s --check-prefix=EABI
|
|
|
|
; RUN: llc -mtriple armv7-apple-darwin %s -o - | FileCheck %s --check-prefixes=DARWIN,DARWIN-DEFAULT
|
|
|
|
; RUN: llc -mtriple armv7-apple-darwin %s -o - -O0 -optimize-regalloc | FileCheck %s --check-prefixes=DARWIN,DARWIN-O0
|
2014-01-06 20:00:44 +08:00
|
|
|
; FIXME: long-term, we will use "-apple-macho" and won't need this exception:
|
2016-07-18 14:48:25 +08:00
|
|
|
; RUN: llc -mtriple armv7-apple-darwin-eabi %s -o - | FileCheck %s --check-prefixes=DARWIN,DARWIN-DEFAULT
|
|
|
|
; RUN: llc -mtriple armv7-apple-darwin-eabi %s -o - -O0 -optimize-regalloc | FileCheck %s --check-prefixes=DARWIN,DARWIN-O0
|
|
|
|
; RUN: llc -mtriple thumbv7-windows %s -o - | FileCheck %s --check-prefixes=WINDOWS,WINDOWS-DEFAULT
|
|
|
|
; RUN: llc -mtriple thumbv7-windows %s -o - -O0 -optimize-regalloc | FileCheck %s --check-prefixes=WINDOWS,WINDOWS-O0
|
2013-07-16 17:32:17 +08:00
|
|
|
|
|
|
|
define signext i16 @f16(i16 signext %a, i16 signext %b) {
|
2013-07-19 02:35:22 +08:00
|
|
|
; EABI-LABEL: f16:
|
|
|
|
; DARWIN-LABEL: f16:
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS-LABEL: f16:
|
2013-07-16 17:32:17 +08:00
|
|
|
entry:
|
|
|
|
%conv = sext i16 %a to i32
|
|
|
|
%conv1 = sext i16 %b to i32
|
|
|
|
%div = sdiv i32 %conv, %conv1
|
|
|
|
%rem = srem i32 %conv, %conv1
|
|
|
|
; EABI: __aeabi_idivmod
|
|
|
|
; EABI: mov [[div:r[0-9]+]], r0
|
|
|
|
; EABI: mov [[rem:r[0-9]+]], r1
|
|
|
|
; DARWIN: ___divsi3
|
2016-07-18 14:48:25 +08:00
|
|
|
; DARWIN: mov [[div:r[0-9]+]], r0
|
2013-07-16 17:32:17 +08:00
|
|
|
; DARWIN: __modsi3
|
2016-07-18 14:48:25 +08:00
|
|
|
; DARWIN-DEFAULT: add [[sum:r[0-9]+]], r0, [[div]]
|
|
|
|
; DARWIN-O0: mov [[rem:r[0-9]+]], r0
|
|
|
|
; WINDOWS: __rt_sdiv
|
2016-10-07 21:28:53 +08:00
|
|
|
; WINDOWS: __rt_sdiv
|
|
|
|
; WINDOWS-DEFAULT: add [[sum:r[0-9]+]], r1
|
|
|
|
; WINDOWS-O0: mov [[rem:r[0-9]+]], r1
|
2013-07-16 17:32:17 +08:00
|
|
|
%rem8 = srem i32 %conv1, %conv
|
|
|
|
; EABI: __aeabi_idivmod
|
|
|
|
; DARWIN: __modsi3
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS: __rt_sdiv
|
2013-07-16 17:32:17 +08:00
|
|
|
%add = add nsw i32 %rem, %div
|
|
|
|
%add13 = add nsw i32 %add, %rem8
|
|
|
|
%conv14 = trunc i32 %add13 to i16
|
|
|
|
; EABI: add r0{{.*}}r1
|
|
|
|
; EABI: sxth r0, r0
|
2016-07-18 14:48:25 +08:00
|
|
|
; DARWIN-DEFAULT: add [[res:r[0-9]+]], [[sum]], r0
|
|
|
|
; DARWIN-O0: add [[sum:r[0-9]+]], [[rem]], [[div]]
|
|
|
|
; DARWIN-O0: add [[res:r[0-9]+]], [[sum]], r0
|
|
|
|
; DARWIN: sxth r0, [[res]]
|
2016-10-07 21:28:53 +08:00
|
|
|
; WINDOWS-DEFAULT: adds [[sum1:r[0-9]+]], [[sum]], r1
|
|
|
|
; WINDOWS-O0: adds [[sum:r[0-9]+]], [[rem]],
|
|
|
|
; WINDOWS-O0: add [[sum1:r[0-9]+]], r1
|
|
|
|
; WINDOWS: sxth [[res:r[0-9]+]], [[sum1]]
|
2013-07-16 17:32:17 +08:00
|
|
|
ret i16 %conv14
|
|
|
|
}
|
|
|
|
|
|
|
|
define i32 @f32(i32 %a, i32 %b) {
|
2013-07-19 02:35:22 +08:00
|
|
|
; EABI-LABEL: f32:
|
|
|
|
; DARWIN-LABEL: f32:
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS-LABEL: f32:
|
2013-07-16 17:32:17 +08:00
|
|
|
entry:
|
|
|
|
%div = sdiv i32 %a, %b
|
|
|
|
%rem = srem i32 %a, %b
|
|
|
|
; EABI: __aeabi_idivmod
|
|
|
|
; EABI: mov [[div:r[0-9]+]], r0
|
|
|
|
; EABI: mov [[rem:r[0-9]+]], r1
|
|
|
|
; DARWIN: ___divsi3
|
2016-07-18 14:48:25 +08:00
|
|
|
; DARWIN: mov [[div:r[0-9]+]], r0
|
2013-07-16 17:32:17 +08:00
|
|
|
; DARWIN: __modsi3
|
2016-07-18 14:48:25 +08:00
|
|
|
; DARWIN-DEFAULT: add [[sum:r[0-9]+]], r0, [[div]]
|
|
|
|
; DARWIN-O0: mov [[rem:r[0-9]+]], r0
|
|
|
|
; WINDOWS: __rt_sdiv
|
|
|
|
; WINDOWS: mov [[div:r[0-9]+]], r0
|
|
|
|
; WINDOWS: __rt_sdiv
|
2016-10-07 21:28:53 +08:00
|
|
|
; WINDOWS-DEFAULT: add [[div]], r1
|
2013-07-16 17:32:17 +08:00
|
|
|
%rem1 = srem i32 %b, %a
|
|
|
|
; EABI: __aeabi_idivmod
|
|
|
|
; DARWIN: __modsi3
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS: __rt_sdiv
|
2013-07-16 17:32:17 +08:00
|
|
|
%add = add nsw i32 %rem, %div
|
|
|
|
%add2 = add nsw i32 %add, %rem1
|
|
|
|
; EABI: add r0{{.*}}r1
|
2016-07-18 14:48:25 +08:00
|
|
|
; DARWIN-DEFAULT: add r0, [[sum]], r0
|
|
|
|
; DARWIN-O0: add [[sum:r[0-9]+]], [[rem]], [[div]]
|
|
|
|
; DARWIN-O0: add [[res:r[0-9]+]], [[sum]], r0
|
2016-10-07 21:28:53 +08:00
|
|
|
; WINDOWS-DEFAULT: adds r0, [[div]], r1
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS-O0: adds [[sum:r[0-9]+]], [[rem]], [[div]]
|
2016-10-07 21:28:53 +08:00
|
|
|
; WINDOWS-O0: add [[sum]], r1
|
2013-07-16 17:32:17 +08:00
|
|
|
ret i32 %add2
|
|
|
|
}
|
|
|
|
|
|
|
|
define i32 @uf(i32 %a, i32 %b) {
|
2013-07-19 02:35:22 +08:00
|
|
|
; EABI-LABEL: uf:
|
|
|
|
; DARWIN-LABEL: uf:
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS-LABEL: uf:
|
2013-07-16 17:32:17 +08:00
|
|
|
entry:
|
|
|
|
%div = udiv i32 %a, %b
|
|
|
|
%rem = urem i32 %a, %b
|
|
|
|
; EABI: __aeabi_uidivmod
|
|
|
|
; DARWIN: ___udivsi3
|
2016-07-18 14:48:25 +08:00
|
|
|
; DARWIN: mov [[div:r[0-9]+]], r0
|
2013-07-16 17:32:17 +08:00
|
|
|
; DARWIN: __umodsi3
|
2016-07-18 14:48:25 +08:00
|
|
|
; DARWIN-DEFAULT: add [[sum:r[0-9]+]], r0, [[div]]
|
|
|
|
; DARWIN-O0: mov [[rem:r[0-9]+]], r0
|
|
|
|
; WINDOWS: __rt_udiv
|
|
|
|
; WINDOWS: mov [[div:r[0-9]+]], r0
|
|
|
|
; WINDOWS: __rt_udiv
|
2016-10-07 21:28:53 +08:00
|
|
|
; WINDOWS-DEFAULT: add [[div]], r1
|
2013-07-16 17:32:17 +08:00
|
|
|
%rem1 = urem i32 %b, %a
|
|
|
|
; EABI: __aeabi_uidivmod
|
|
|
|
; DARWIN: __umodsi3
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS: __rt_udiv
|
2013-07-16 17:32:17 +08:00
|
|
|
%add = add nuw i32 %rem, %div
|
|
|
|
%add2 = add nuw i32 %add, %rem1
|
|
|
|
; EABI: add r0{{.*}}r1
|
2016-07-18 14:48:25 +08:00
|
|
|
; DARWIN-DEFAULT: add r0, [[sum]], r0
|
|
|
|
; DARWIN-O0: add [[sum:r[0-9]+]], [[rem]], [[div]]
|
|
|
|
; DARWIN-O0: add [[res:r[0-9]+]], [[sum]], r0
|
2016-10-07 21:28:53 +08:00
|
|
|
; WINDOWS-DEFAULT: adds [[sum:r[0-9]+]], [[div]], r1
|
|
|
|
; WINDOWS-O0: adds [[sum:r[0-9]+]],
|
|
|
|
; WINDOWS-O0: add [[sum]], r1
|
2013-07-16 17:32:17 +08:00
|
|
|
ret i32 %add2
|
|
|
|
}
|
|
|
|
|
|
|
|
define i64 @longf(i64 %a, i64 %b) {
|
2013-07-19 02:35:22 +08:00
|
|
|
; EABI-LABEL: longf:
|
|
|
|
; DARWIN-LABEL: longf:
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS-LABEL: longf:
|
2013-07-16 17:32:17 +08:00
|
|
|
entry:
|
|
|
|
%div = sdiv i64 %a, %b
|
|
|
|
%rem = srem i64 %a, %b
|
|
|
|
; EABI: __aeabi_ldivmod
|
[ARM] Merging 64-bit divmod lib calls into one
When div+rem calls on the same arguments are found, the ARM back-end merges the
two calls into one __aeabi_divmod call for up to 32-bits values. However,
for 64-bit values, which also have a lib call (__aeabi_ldivmod), it wasn't
merging the calls, and thus calling ldivmod twice and spilling the temporary
results, which generated pretty bad code.
This patch legalises 64-bit lib calls for divmod, so that now all the spilling
and the second call are gone. It also relaxes the DivRem combiner a bit on the
legal type check, since it was already checking for isLegalOrCustom on every
value, so the extra check for isTypeLegal was redundant.
Second attempt, creating TLI.isOperationCustom like isOperationExpand, to make
sure we only emit valid types or the ones that were explicitly marked as custom.
Now, passing check-all and test-suite on x86, ARM and AArch64.
This patch fixes PR17193 (and a long time FIXME in the tests).
llvm-svn: 262738
2016-03-05 03:19:36 +08:00
|
|
|
; EABI-NEXT: adds r0
|
|
|
|
; EABI-NEXT: adc r1
|
|
|
|
; EABI-NOT: __aeabi_ldivmod
|
2013-07-16 17:32:17 +08:00
|
|
|
; DARWIN: ___divdi3
|
|
|
|
; DARWIN: mov [[div1:r[0-9]+]], r0
|
|
|
|
; DARWIN: mov [[div2:r[0-9]+]], r1
|
|
|
|
; DARWIN: __moddi3
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS: __rt_sdiv64
|
2013-07-16 17:32:17 +08:00
|
|
|
%add = add nsw i64 %rem, %div
|
|
|
|
; DARWIN: adds r0{{.*}}[[div1]]
|
|
|
|
; DARWIN: adc r1{{.*}}[[div2]]
|
2016-10-07 21:28:53 +08:00
|
|
|
; WINDOWS: adds r0, r0, r2
|
|
|
|
; WINDOWS: adcs r1, r3
|
2013-07-16 17:32:17 +08:00
|
|
|
ret i64 %add
|
|
|
|
}
|
|
|
|
|
[ARM] Merging 64-bit divmod lib calls into one
When div+rem calls on the same arguments are found, the ARM back-end merges the
two calls into one __aeabi_divmod call for up to 32-bits values. However,
for 64-bit values, which also have a lib call (__aeabi_ldivmod), it wasn't
merging the calls, and thus calling ldivmod twice and spilling the temporary
results, which generated pretty bad code.
This patch legalises 64-bit lib calls for divmod, so that now all the spilling
and the second call are gone. It also relaxes the DivRem combiner a bit on the
legal type check, since it was already checking for isLegalOrCustom on every
value, so the extra check for isTypeLegal was redundant.
Second attempt, creating TLI.isOperationCustom like isOperationExpand, to make
sure we only emit valid types or the ones that were explicitly marked as custom.
Now, passing check-all and test-suite on x86, ARM and AArch64.
This patch fixes PR17193 (and a long time FIXME in the tests).
llvm-svn: 262738
2016-03-05 03:19:36 +08:00
|
|
|
define i16 @shortf(i16 %a, i16 %b) {
|
|
|
|
; EABI-LABEL: shortf:
|
|
|
|
; DARWIN-LABEL: shortf:
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS-LABEL: shortf:
|
[ARM] Merging 64-bit divmod lib calls into one
When div+rem calls on the same arguments are found, the ARM back-end merges the
two calls into one __aeabi_divmod call for up to 32-bits values. However,
for 64-bit values, which also have a lib call (__aeabi_ldivmod), it wasn't
merging the calls, and thus calling ldivmod twice and spilling the temporary
results, which generated pretty bad code.
This patch legalises 64-bit lib calls for divmod, so that now all the spilling
and the second call are gone. It also relaxes the DivRem combiner a bit on the
legal type check, since it was already checking for isLegalOrCustom on every
value, so the extra check for isTypeLegal was redundant.
Second attempt, creating TLI.isOperationCustom like isOperationExpand, to make
sure we only emit valid types or the ones that were explicitly marked as custom.
Now, passing check-all and test-suite on x86, ARM and AArch64.
This patch fixes PR17193 (and a long time FIXME in the tests).
llvm-svn: 262738
2016-03-05 03:19:36 +08:00
|
|
|
entry:
|
|
|
|
%div = sdiv i16 %a, %b
|
|
|
|
%rem = srem i16 %a, %b
|
|
|
|
; EABI: __aeabi_idivmod
|
|
|
|
; DARWIN: ___divsi3
|
|
|
|
; DARWIN: mov [[div1:r[0-9]+]], r0
|
|
|
|
; DARWIN: __modsi3
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS: __rt_sdiv
|
|
|
|
; WINDOWS: mov [[div:r[0-9]+]], r0
|
|
|
|
; WINDOWS: __rt_sdiv
|
[ARM] Merging 64-bit divmod lib calls into one
When div+rem calls on the same arguments are found, the ARM back-end merges the
two calls into one __aeabi_divmod call for up to 32-bits values. However,
for 64-bit values, which also have a lib call (__aeabi_ldivmod), it wasn't
merging the calls, and thus calling ldivmod twice and spilling the temporary
results, which generated pretty bad code.
This patch legalises 64-bit lib calls for divmod, so that now all the spilling
and the second call are gone. It also relaxes the DivRem combiner a bit on the
legal type check, since it was already checking for isLegalOrCustom on every
value, so the extra check for isTypeLegal was redundant.
Second attempt, creating TLI.isOperationCustom like isOperationExpand, to make
sure we only emit valid types or the ones that were explicitly marked as custom.
Now, passing check-all and test-suite on x86, ARM and AArch64.
This patch fixes PR17193 (and a long time FIXME in the tests).
llvm-svn: 262738
2016-03-05 03:19:36 +08:00
|
|
|
%add = add nsw i16 %rem, %div
|
2016-07-18 14:48:25 +08:00
|
|
|
; EABI: add r0, r1
|
[ARM] Merging 64-bit divmod lib calls into one
When div+rem calls on the same arguments are found, the ARM back-end merges the
two calls into one __aeabi_divmod call for up to 32-bits values. However,
for 64-bit values, which also have a lib call (__aeabi_ldivmod), it wasn't
merging the calls, and thus calling ldivmod twice and spilling the temporary
results, which generated pretty bad code.
This patch legalises 64-bit lib calls for divmod, so that now all the spilling
and the second call are gone. It also relaxes the DivRem combiner a bit on the
legal type check, since it was already checking for isLegalOrCustom on every
value, so the extra check for isTypeLegal was redundant.
Second attempt, creating TLI.isOperationCustom like isOperationExpand, to make
sure we only emit valid types or the ones that were explicitly marked as custom.
Now, passing check-all and test-suite on x86, ARM and AArch64.
This patch fixes PR17193 (and a long time FIXME in the tests).
llvm-svn: 262738
2016-03-05 03:19:36 +08:00
|
|
|
; DARWIN: add r0{{.*}}[[div1]]
|
2016-10-07 21:28:53 +08:00
|
|
|
; WINDOWS: adds r0, r1, [[div]]
|
[ARM] Merging 64-bit divmod lib calls into one
When div+rem calls on the same arguments are found, the ARM back-end merges the
two calls into one __aeabi_divmod call for up to 32-bits values. However,
for 64-bit values, which also have a lib call (__aeabi_ldivmod), it wasn't
merging the calls, and thus calling ldivmod twice and spilling the temporary
results, which generated pretty bad code.
This patch legalises 64-bit lib calls for divmod, so that now all the spilling
and the second call are gone. It also relaxes the DivRem combiner a bit on the
legal type check, since it was already checking for isLegalOrCustom on every
value, so the extra check for isTypeLegal was redundant.
Second attempt, creating TLI.isOperationCustom like isOperationExpand, to make
sure we only emit valid types or the ones that were explicitly marked as custom.
Now, passing check-all and test-suite on x86, ARM and AArch64.
This patch fixes PR17193 (and a long time FIXME in the tests).
llvm-svn: 262738
2016-03-05 03:19:36 +08:00
|
|
|
ret i16 %add
|
|
|
|
}
|
|
|
|
|
2013-07-16 17:32:17 +08:00
|
|
|
define i32 @g1(i32 %a, i32 %b) {
|
2013-07-19 02:35:22 +08:00
|
|
|
; EABI-LABEL: g1:
|
|
|
|
; DARWIN-LABEL: g1:
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS-LABEL: g1:
|
2013-07-16 17:32:17 +08:00
|
|
|
entry:
|
|
|
|
%div = sdiv i32 %a, %b
|
|
|
|
%rem = srem i32 %a, %b
|
|
|
|
; EABI: __aeabi_idivmod
|
|
|
|
; DARWIN: ___divsi3
|
|
|
|
; DARWIN: mov [[sum:r[0-9]+]], r0
|
|
|
|
; DARWIN: __modsi3
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS: __rt_sdiv
|
|
|
|
; WINDOWS: mov [[div:r[0-9]+]], r0
|
|
|
|
; WINDOWS: __rt_sdiv
|
2013-07-16 17:32:17 +08:00
|
|
|
%add = add nsw i32 %rem, %div
|
2014-08-24 02:29:43 +08:00
|
|
|
; EABI: add r0{{.*}}r1
|
2013-07-16 17:32:17 +08:00
|
|
|
; DARWIN: add r0{{.*}}[[sum]]
|
2016-10-07 21:28:53 +08:00
|
|
|
; WINDOWS: adds r0, r1, [[div]]
|
2013-07-16 17:32:17 +08:00
|
|
|
ret i32 %add
|
|
|
|
}
|
|
|
|
|
|
|
|
; On both Darwin and Gnu, this is just a call to __modsi3
|
|
|
|
define i32 @g2(i32 %a, i32 %b) {
|
2013-07-19 02:35:22 +08:00
|
|
|
; EABI-LABEL: g2:
|
|
|
|
; DARWIN-LABEL: g2:
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS-LABEL: g2:
|
2013-07-16 17:32:17 +08:00
|
|
|
entry:
|
|
|
|
%rem = srem i32 %a, %b
|
|
|
|
; EABI: __aeabi_idivmod
|
|
|
|
; DARWIN: __modsi3
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS: __rt_sdiv
|
2013-07-16 17:32:17 +08:00
|
|
|
ret i32 %rem
|
|
|
|
; EABI: mov r0, r1
|
2016-10-07 21:28:53 +08:00
|
|
|
; WINDOWS: mov r0, r1
|
2013-07-16 17:32:17 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
define i32 @g3(i32 %a, i32 %b) {
|
2013-07-19 02:35:22 +08:00
|
|
|
; EABI-LABEL: g3:
|
|
|
|
; DARWIN-LABEL: g3:
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS-LABEL: g3:
|
2013-07-16 17:32:17 +08:00
|
|
|
entry:
|
|
|
|
%rem = srem i32 %a, %b
|
|
|
|
; EABI: __aeabi_idivmod
|
|
|
|
; EABI: mov [[mod:r[0-9]+]], r1
|
|
|
|
; DARWIN: __modsi3
|
|
|
|
; DARWIN: mov [[sum:r[0-9]+]], r0
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS: __rt_sdiv
|
2016-10-07 21:28:53 +08:00
|
|
|
; WINDOWS: mov [[rem:r[0-9]+]], r1
|
2013-07-16 17:32:17 +08:00
|
|
|
%rem1 = srem i32 %b, %rem
|
|
|
|
; EABI: __aeabi_idivmod
|
|
|
|
; DARWIN: __modsi3
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS: __rt_sdiv
|
2013-07-16 17:32:17 +08:00
|
|
|
%add = add nsw i32 %rem1, %rem
|
|
|
|
; EABI: add r0, r1, [[mod]]
|
|
|
|
; DARWIN: add r0{{.*}}[[sum]]
|
2016-10-07 21:28:53 +08:00
|
|
|
; WINDOWS: adds r0, r1, [[rem]]
|
2013-07-16 17:32:17 +08:00
|
|
|
ret i32 %add
|
|
|
|
}
|
|
|
|
|
|
|
|
define i32 @g4(i32 %a, i32 %b) {
|
2013-07-19 02:35:22 +08:00
|
|
|
; EABI-LABEL: g4:
|
|
|
|
; DARWIN-LABEL: g4:
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS-LABEL: g4:
|
2013-07-16 17:32:17 +08:00
|
|
|
entry:
|
|
|
|
%div = sdiv i32 %a, %b
|
Adding support for TargetLoweringBase::LibCall
Summary:
TargetLoweringBase::Expand is defined as "Try to expand this to other ops,
otherwise use a libcall." For ISD::UDIV and ISD::SDIV, the choice between
the two possibilities was defined in a rather convoluted way:
- if DIVREM is legal, expand to DIVREM
- if DIVREM has a custom lowering, expand to DIVREM
- if DIVREM libcall is defined and a remainder from the same division is
computed elsewhere, expand to a DIVREM libcall
- else, expand to a DIV libcall
This had the undesirable effect that if both DIV and DIVREM are implemented
as libcalls, then ISD::UDIV and ISD::SDIV are expanded to the heavier DIVREM
libcall, even when the remainder isn't used.
The new code adds a new LegalizeAction, TargetLoweringBase::LibCall, so that
backends can directly control whether they prefer an expansion or a conversion
to a libcall. This makes the generic lowering code even more generic,
allowing its reuse in a wider range of target-specific configurations.
The useful effect is that ARM backend will now generate a call
to __aeabi_{i,u}div rather than __aeabi_{i,u}divmod in cases where
it doesn't need the remainder. There's no functional change outside
the ARM backend.
Reviewers: t.p.northover, rengolin
Subscribers: t.p.northover, llvm-commits, aemerson
Differential Revision: http://reviews.llvm.org/D13862
llvm-svn: 250826
2015-10-20 21:14:52 +08:00
|
|
|
; EABI: __aeabi_idiv{{$}}
|
2013-07-16 17:32:17 +08:00
|
|
|
; EABI: mov [[div:r[0-9]+]], r0
|
|
|
|
; DARWIN: ___divsi3
|
|
|
|
; DARWIN: mov [[sum:r[0-9]+]], r0
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS: __rt_sdiv
|
|
|
|
; WINDOWS: mov [[div:r[0-9]+]], r0
|
2013-07-16 17:32:17 +08:00
|
|
|
%rem = srem i32 %b, %div
|
|
|
|
; EABI: __aeabi_idivmod
|
|
|
|
; DARWIN: __modsi3
|
2016-07-18 14:48:25 +08:00
|
|
|
; WINDOWS: __rt_sdiv
|
2013-07-16 17:32:17 +08:00
|
|
|
%add = add nsw i32 %rem, %div
|
|
|
|
; EABI: add r0, r1, [[div]]
|
|
|
|
; DARWIN: add r0{{.*}}[[sum]]
|
2016-10-07 21:28:53 +08:00
|
|
|
; WINDOWS: adds r0, r1, [[div]]
|
2013-07-16 17:32:17 +08:00
|
|
|
ret i32 %add
|
|
|
|
}
|