2005-01-25 02:45:41 +08:00
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//===-- AlphaTargetMachine.cpp - Define TargetMachine for Alpha -----------===//
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2005-04-22 07:13:11 +08:00
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//
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2005-01-23 07:41:55 +08:00
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// The LLVM Compiler Infrastructure
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//
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2007-12-30 04:36:04 +08:00
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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2005-04-22 07:13:11 +08:00
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//
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2005-01-23 07:41:55 +08:00
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//===----------------------------------------------------------------------===//
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2005-04-22 07:13:11 +08:00
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//
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2005-01-23 07:41:55 +08:00
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//
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//===----------------------------------------------------------------------===//
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#include "Alpha.h"
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2005-07-23 04:52:16 +08:00
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#include "AlphaJITInfo.h"
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2006-09-08 07:39:26 +08:00
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#include "AlphaTargetAsmInfo.h"
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2005-01-23 07:41:55 +08:00
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#include "AlphaTargetMachine.h"
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2005-02-02 04:35:11 +08:00
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#include "llvm/Module.h"
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2006-09-04 12:14:57 +08:00
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#include "llvm/PassManager.h"
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2005-01-23 07:41:55 +08:00
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#include "llvm/Target/TargetMachineRegistry.h"
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2008-08-21 08:14:44 +08:00
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#include "llvm/Support/raw_ostream.h"
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2005-02-02 04:35:11 +08:00
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2005-01-23 07:41:55 +08:00
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using namespace llvm;
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2008-11-16 05:36:30 +08:00
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/// AlphaTargetMachineModule - Note that this is used on hosts that cannot link
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/// in a library unless there are references into the library. In particular,
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/// it seems that it is not possible to get things to work on Win32 without
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/// this. Though it is unused, do not remove it.
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extern "C" int AlphaTargetMachineModule;
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int AlphaTargetMachineModule = 0;
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2008-05-13 08:00:25 +08:00
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// Register the targets
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2008-10-16 14:16:50 +08:00
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static RegisterTarget<AlphaTargetMachine> X("alpha", "Alpha [experimental]");
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2005-01-23 07:41:55 +08:00
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2006-09-08 07:39:26 +08:00
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const TargetAsmInfo *AlphaTargetMachine::createTargetAsmInfo() const {
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return new AlphaTargetAsmInfo(*this);
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}
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2005-02-02 04:35:11 +08:00
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unsigned AlphaTargetMachine::getModuleMatchQuality(const Module &M) {
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// We strongly match "alpha*".
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std::string TT = M.getTargetTriple();
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if (TT.size() >= 5 && TT[0] == 'a' && TT[1] == 'l' && TT[2] == 'p' &&
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TT[3] == 'h' && TT[4] == 'a')
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return 20;
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2007-07-10 01:25:29 +08:00
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// If the target triple is something non-alpha, we don't match.
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if (!TT.empty()) return 0;
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2005-02-02 04:35:11 +08:00
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if (M.getEndianness() == Module::LittleEndian &&
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M.getPointerSize() == Module::Pointer64)
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return 10; // Weak match
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else if (M.getEndianness() != Module::AnyEndianness ||
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M.getPointerSize() != Module::AnyPointerSize)
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return 0; // Match for some other target
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2005-10-31 00:44:01 +08:00
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return getJITMatchQuality()/2;
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2005-02-02 04:35:11 +08:00
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}
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2005-07-23 04:52:16 +08:00
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unsigned AlphaTargetMachine::getJITMatchQuality() {
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2005-07-23 05:00:30 +08:00
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#ifdef __alpha
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2005-07-23 04:52:16 +08:00
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return 10;
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#else
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return 0;
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#endif
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}
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2006-03-23 13:43:16 +08:00
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AlphaTargetMachine::AlphaTargetMachine(const Module &M, const std::string &FS)
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2007-08-04 04:20:50 +08:00
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: DataLayout("e-f128:128:128"),
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2005-08-04 06:33:21 +08:00
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FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
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2005-09-30 06:54:56 +08:00
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JITInfo(*this),
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2006-10-11 12:29:42 +08:00
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Subtarget(M, FS),
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TLInfo(*this) {
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2006-09-25 03:46:56 +08:00
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setRelocationModel(Reloc::PIC_);
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2005-09-30 06:54:56 +08:00
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}
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2005-01-23 07:41:55 +08:00
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2005-04-22 07:13:11 +08:00
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2006-09-04 12:14:57 +08:00
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//===----------------------------------------------------------------------===//
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// Pass Pipeline Configuration
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//===----------------------------------------------------------------------===//
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2005-01-23 07:41:55 +08:00
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2008-03-12 06:29:46 +08:00
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bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
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2006-01-24 05:56:07 +08:00
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PM.add(createAlphaISelDag(*this));
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2005-01-23 07:41:55 +08:00
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return false;
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}
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2008-03-12 06:29:46 +08:00
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bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
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2005-07-23 04:52:16 +08:00
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// Must run branch selection immediately preceding the asm printer
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2006-11-01 00:49:55 +08:00
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PM.add(createAlphaBranchSelectionPass());
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2006-09-04 12:14:57 +08:00
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return false;
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2005-07-23 04:52:16 +08:00
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}
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2008-03-12 06:29:46 +08:00
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bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
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2008-08-21 08:14:44 +08:00
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raw_ostream &Out) {
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2006-09-19 03:44:29 +08:00
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PM.add(createAlphaLLRPPass(*this));
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2006-09-04 12:14:57 +08:00
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PM.add(createAlphaCodePrinterPass(Out, *this));
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return false;
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}
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2008-03-12 06:29:46 +08:00
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bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
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2007-07-21 05:56:13 +08:00
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bool DumpAsm, MachineCodeEmitter &MCE) {
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2006-07-26 04:40:54 +08:00
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PM.add(createAlphaCodeEmitterPass(*this, MCE));
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2007-07-21 05:56:13 +08:00
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if (DumpAsm)
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2008-08-21 08:14:44 +08:00
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PM.add(createAlphaCodePrinterPass(errs(), *this));
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2005-07-23 04:52:16 +08:00
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return false;
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}
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2008-03-12 06:29:46 +08:00
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bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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2007-07-21 05:56:13 +08:00
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bool Fast, bool DumpAsm,
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2007-02-08 09:38:33 +08:00
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MachineCodeEmitter &MCE) {
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2007-07-21 05:56:13 +08:00
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return addCodeEmitter(PM, Fast, DumpAsm, MCE);
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2007-02-08 09:38:33 +08:00
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}
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