2010-10-08 02:41:20 +08:00
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//===-- CodeGen.cpp -------------------------------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the common initialization routines for the
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// CodeGen library.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/InitializePasses.h"
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#include "llvm-c/Initialization.h"
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2014-01-07 19:48:04 +08:00
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#include "llvm/PassRegistry.h"
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2010-10-08 02:41:20 +08:00
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using namespace llvm;
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/// initializeCodeGen - Initialize all passes linked into the CodeGen library.
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void llvm::initializeCodeGen(PassRegistry &Registry) {
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2014-08-22 05:50:01 +08:00
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initializeAtomicExpandPass(Registry);
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2012-02-09 05:22:48 +08:00
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initializeBranchFolderPassPass(Registry);
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2014-02-22 08:07:45 +08:00
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initializeCodeGenPreparePass(Registry);
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2010-10-08 02:41:20 +08:00
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initializeDeadMachineInstructionElimPass(Registry);
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2015-03-10 06:45:16 +08:00
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initializeDwarfEHPreparePass(Registry);
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2012-07-04 08:09:54 +08:00
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initializeEarlyIfConverterPass(Registry);
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2015-02-20 10:15:36 +08:00
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initializeExpandISelPseudosPass(Registry);
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2015-03-10 06:45:16 +08:00
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initializeExpandPostRAPass(Registry);
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2012-02-09 05:23:13 +08:00
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initializeFinalizeMachineBundlesPass(Registry);
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2015-09-18 04:45:18 +08:00
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initializeFuncletLayoutPass(Registry);
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2012-02-09 05:23:13 +08:00
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initializeGCMachineCodeAnalysisPass(Registry);
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2010-10-08 02:41:20 +08:00
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initializeGCModuleInfoPass(Registry);
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initializeIfConverterPass(Registry);
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2010-11-30 10:17:10 +08:00
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initializeLiveDebugVariablesPass(Registry);
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2010-10-08 02:41:20 +08:00
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initializeLiveIntervalsPass(Registry);
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initializeLiveStacksPass(Registry);
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initializeLiveVariablesPass(Registry);
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2012-02-09 05:23:13 +08:00
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initializeLocalStackSlotPassPass(Registry);
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2015-03-10 06:45:16 +08:00
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initializeLowerIntrinsicsPass(Registry);
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2011-07-26 03:25:40 +08:00
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initializeMachineBlockFrequencyInfoPass(Registry);
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Implement a block placement pass based on the branch probability and
block frequency analyses. This differs substantially from the existing
block-placement pass in LLVM:
1) It operates on the Machine-IR in the CodeGen layer. This exposes much
more (and more precise) information and opportunities. Also, the
results are more stable due to fewer transforms ocurring after the
pass runs.
2) It uses the generalized probability and frequency analyses. These can
model static heuristics, code annotation derived heuristics as well
as eventual profile loading. By basing the optimization on the
analysis interface it can work from any (or a combination) of these
inputs.
3) It uses a more aggressive algorithm, both building chains from tho
bottom up to maximize benefit, and using an SCC-based walk to layout
chains of blocks in a profitable ordering without O(N^2) iterations
which the old pass involves.
The pass is currently gated behind a flag, and not enabled by default
because it still needs to grow some important features. Most notably, it
needs to support loop aligning and careful layout of loop structures
much as done by hand currently in CodePlacementOpt. Once it supports
these, and has sufficient testing and quality tuning, it should replace
both of these passes.
Thanks to Nick Lewycky and Richard Smith for help authoring & debugging
this, and to Jakob, Andy, Eric, Jim, and probably a few others I'm
forgetting for reviewing and answering all my questions. Writing
a backend pass is *sooo* much better now than it used to be. =D
llvm-svn: 142641
2011-10-21 14:46:38 +08:00
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initializeMachineBlockPlacementPass(Registry);
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2011-11-02 15:17:12 +08:00
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initializeMachineBlockPlacementStatsPass(Registry);
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2015-02-20 10:15:36 +08:00
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initializeMachineCSEPass(Registry);
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2015-06-16 02:44:27 +08:00
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initializeImplicitNullChecksPass(Registry);
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2015-03-10 06:45:16 +08:00
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initializeMachineCombinerPass(Registry);
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initializeMachineCopyPropagationPass(Registry);
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2010-10-08 02:41:20 +08:00
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initializeMachineDominatorTreePass(Registry);
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2015-03-10 06:45:16 +08:00
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initializeMachineFunctionPrinterPassPass(Registry);
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2010-10-08 02:41:20 +08:00
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initializeMachineLICMPass(Registry);
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initializeMachineLoopInfoPass(Registry);
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initializeMachineModuleInfoPass(Registry);
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2015-03-10 06:45:16 +08:00
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initializeMachinePostDominatorTreePass(Registry);
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2012-02-09 05:23:13 +08:00
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initializeMachineSchedulerPass(Registry);
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2010-10-08 02:41:20 +08:00
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initializeMachineSinkingPass(Registry);
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initializeMachineVerifierPassPass(Registry);
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2016-04-19 13:24:47 +08:00
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initializePatchableFunctionPass(Registry);
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2010-10-08 02:41:20 +08:00
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initializeOptimizePHIsPass(Registry);
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2015-03-10 06:45:16 +08:00
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initializePEIPass(Registry);
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2010-10-08 02:41:20 +08:00
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initializePHIEliminationPass(Registry);
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initializePeepholeOptimizerPass(Registry);
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2013-12-29 05:56:51 +08:00
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initializePostMachineSchedulerPass(Registry);
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2012-02-09 05:23:13 +08:00
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initializePostRASchedulerPass(Registry);
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2010-10-08 02:41:20 +08:00
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initializeProcessImplicitDefsPass(Registry);
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2011-06-27 06:34:10 +08:00
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initializeRegisterCoalescerPass(Registry);
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[ShrinkWrap] Add (a simplified version) of shrink-wrapping.
This patch introduces a new pass that computes the safe point to insert the
prologue and epilogue of the function.
The interest is to find safe points that are cheaper than the entry and exits
blocks.
As an example and to avoid regressions to be introduce, this patch also
implements the required bits to enable the shrink-wrapping pass for AArch64.
** Context **
Currently we insert the prologue and epilogue of the method/function in the
entry and exits blocks. Although this is correct, we can do a better job when
those are not immediately required and insert them at less frequently executed
places.
The job of the shrink-wrapping pass is to identify such places.
** Motivating example **
Let us consider the following function that perform a call only in one branch of
a if:
define i32 @f(i32 %a, i32 %b) {
%tmp = alloca i32, align 4
%tmp2 = icmp slt i32 %a, %b
br i1 %tmp2, label %true, label %false
true:
store i32 %a, i32* %tmp, align 4
%tmp4 = call i32 @doSomething(i32 0, i32* %tmp)
br label %false
false:
%tmp.0 = phi i32 [ %tmp4, %true ], [ %a, %0 ]
ret i32 %tmp.0
}
On AArch64 this code generates (removing the cfi directives to ease
readabilities):
_f: ; @f
; BB#0:
stp x29, x30, [sp, #-16]!
mov x29, sp
sub sp, sp, #16 ; =16
cmp w0, w1
b.ge LBB0_2
; BB#1: ; %true
stur w0, [x29, #-4]
sub x1, x29, #4 ; =4
mov w0, wzr
bl _doSomething
LBB0_2: ; %false
mov sp, x29
ldp x29, x30, [sp], #16
ret
With shrink-wrapping we could generate:
_f: ; @f
; BB#0:
cmp w0, w1
b.ge LBB0_2
; BB#1: ; %true
stp x29, x30, [sp, #-16]!
mov x29, sp
sub sp, sp, #16 ; =16
stur w0, [x29, #-4]
sub x1, x29, #4 ; =4
mov w0, wzr
bl _doSomething
add sp, x29, #16 ; =16
ldp x29, x30, [sp], #16
LBB0_2: ; %false
ret
Therefore, we would pay the overhead of setting up/destroying the frame only if
we actually do the call.
** Proposed Solution **
This patch introduces a new machine pass that perform the shrink-wrapping
analysis (See the comments at the beginning of ShrinkWrap.cpp for more details).
It then stores the safe save and restore point into the MachineFrameInfo
attached to the MachineFunction.
This information is then used by the PrologEpilogInserter (PEI) to place the
related code at the right place. This pass runs right before the PEI.
Unlike the original paper of Chow from PLDI’88, this implementation of
shrink-wrapping does not use expensive data-flow analysis and does not need hack
to properly avoid frequently executed point. Instead, it relies on dominance and
loop properties.
The pass is off by default and each target can opt-in by setting the
EnableShrinkWrap boolean to true in their derived class of TargetPassConfig.
This setting can also be overwritten on the command line by using
-enable-shrink-wrap.
Before you try out the pass for your target, make sure you properly fix your
emitProlog/emitEpilog/adjustForXXX method to cope with basic blocks that are not
necessarily the entry block.
** Design Decisions **
1. ShrinkWrap is its own pass right now. It could frankly be merged into PEI but
for debugging and clarity I thought it was best to have its own file.
2. Right now, we only support one save point and one restore point. At some
point we can expand this to several save point and restore point, the impacted
component would then be:
- The pass itself: New algorithm needed.
- MachineFrameInfo: Hold a list or set of Save/Restore point instead of one
pointer.
- PEI: Should loop over the save point and restore point.
Anyhow, at least for this first iteration, I do not believe this is interesting
to support the complex cases. We should revisit that when we motivating
examples.
Differential Revision: http://reviews.llvm.org/D9210
<rdar://problem/3201744>
llvm-svn: 236507
2015-05-06 01:38:16 +08:00
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initializeShrinkWrapPass(Registry);
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2010-10-08 02:41:20 +08:00
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initializeSlotIndexesPass(Registry);
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2015-02-20 10:15:36 +08:00
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initializeStackColoringPass(Registry);
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2015-03-10 06:45:16 +08:00
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initializeStackMapLivenessPass(Registry);
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2015-12-16 19:09:48 +08:00
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initializeLiveDebugValuesPass(Registry);
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2016-01-28 00:53:42 +08:00
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initializeSafeStackPass(Registry);
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2015-03-10 06:45:16 +08:00
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initializeStackProtectorPass(Registry);
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2010-10-08 02:41:20 +08:00
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initializeStackSlotColoringPass(Registry);
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2012-02-09 05:23:13 +08:00
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initializeTailDuplicatePassPass(Registry);
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2012-02-04 10:56:45 +08:00
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initializeTargetPassConfigPass(Registry);
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2010-10-08 02:41:20 +08:00
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initializeTwoAddressInstructionPassPass(Registry);
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2012-02-09 05:23:13 +08:00
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initializeUnpackMachineBundlesPass(Registry);
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2010-10-08 02:41:20 +08:00
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initializeUnreachableBlockElimPass(Registry);
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initializeUnreachableMachineBlockElimPass(Registry);
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initializeVirtRegMapPass(Registry);
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2012-06-09 07:44:45 +08:00
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initializeVirtRegRewriterPass(Registry);
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2015-03-10 06:45:16 +08:00
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initializeWinEHPreparePass(Registry);
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2010-10-08 02:41:20 +08:00
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}
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void LLVMInitializeCodeGen(LLVMPassRegistryRef R) {
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initializeCodeGen(*unwrap(R));
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}
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