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llvm-project/llvm/test/CodeGen/PowerPC/2016-04-28-setjmp.ll

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[PowerPC] Fix the EH_SjLj_Setup pseudo. This instruction is just a control flow marker - it should not actually exist in the object file. Unfortunately, nothing catches it before it gets to AsmPrinter. If integrated assembler is used, it's considered to be a normal 4-byte instruction, and emitted as an all-0 word, crashing the program. With external assembler, a comment is emitted. Fixed by setting Size to 0 and handling it in MCCodeEmitter - this means the comment will still be emitted if integrated assembler is not used. This broke an ASan test, which has been disabled for a long time as a result (see the discussion on D19657). We can reenable it once this lands. llvm-svn: 267943
2016-04-29 05:24:37 +08:00
; RUN: llc -filetype=obj <%s | llvm-objdump --disassemble - | FileCheck %s
target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu"
@ptr = common global i8* null, align 8
; Verify there's no junk between these two instructions from misemitted
; EH_SjLj_Setup.
; CHECK: li 3, 1
[PowerPC] eliminate unconditional branch to the next instruction This patch makes analyzeBranch eliminate unconditional branch to the next instruction. After basic blocks are re-organized by optimizers, such as machine block placement, a BB may end with an unconditional branch to the next (fallthrough) BB. This patch removes such redundant branch instruction. Differential Revision: https://reviews.llvm.org/D37730 llvm-svn: 314297
2017-09-27 18:33:02 +08:00
; CHECK-NEXT: cmplwi 3, 0
[PowerPC] Fix the EH_SjLj_Setup pseudo. This instruction is just a control flow marker - it should not actually exist in the object file. Unfortunately, nothing catches it before it gets to AsmPrinter. If integrated assembler is used, it's considered to be a normal 4-byte instruction, and emitted as an all-0 word, crashing the program. With external assembler, a comment is emitted. Fixed by setting Size to 0 and handling it in MCCodeEmitter - this means the comment will still be emitted if integrated assembler is not used. This broke an ASan test, which has been disabled for a long time as a result (see the discussion on D19657). We can reenable it once this lands. llvm-svn: 267943
2016-04-29 05:24:37 +08:00
define void @h() nounwind {
%1 = load i8**, i8*** bitcast (i8** @ptr to i8***), align 8
%2 = tail call i8* @llvm.frameaddress(i32 0)
store i8* %2, i8** %1, align 8
%3 = tail call i8* @llvm.stacksave()
%4 = getelementptr inbounds i8*, i8** %1, i64 2
store i8* %3, i8** %4, align 8
%5 = bitcast i8** %1 to i8*
%6 = tail call i32 @llvm.eh.sjlj.setjmp(i8* %5)
%7 = icmp eq i32 %6, 0
br i1 %7, label %9, label %8
; <label>:8: ; preds = %0
tail call void @g()
br label %10
; <label>:9: ; preds = %0
tail call void @f()
br label %10
; <label>:10: ; preds = %9, %8
ret void
}
; Function Attrs: nounwind readnone
declare i8* @llvm.frameaddress(i32)
; Function Attrs: nounwind
declare i8* @llvm.stacksave()
; Function Attrs: nounwind
declare i32 @llvm.eh.sjlj.setjmp(i8*)
declare void @g()
declare void @f()