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llvm-project/llvm/test/DebugInfo/X86/pr34545.ll

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[DebugInfo] Insert DEBUG_VALUEs after each register redefinition Summary: When reinserting debug values after register allocation, make sure to insert debug values after each redefinition of debug value register in the slot index range. The reason for this is that DwarfDebug will end the range of a debug variable when the physical reg is defined. For instructions with e.g. tied operands this result in prematurely ended debug range. This resolves pr34545 Patch by Karl-Johan Karlsson and Bjorn Pettersson Reviewers: rnk, aprantl Reviewed By: rnk Subscribers: bjope, llvm-commits Differential Revision: https://reviews.llvm.org/D38229 llvm-svn: 314974
2017-10-05 16:37:31 +08:00
; RUN: llc -O1 -filetype=asm -mtriple x86_64-unknown-linux-gnu -mcpu=x86-64 -o - %s -stop-after=livedebugvars | FileCheck %s
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
; CHECK: $eax = MOV32rm
[DebugInfo] Make sure all DBG_VALUEs' reguse operands have IsDebug property Summary: In some cases, these operands lacked the IsDebug property, which is meant to signal that they should not affect codegen. This patch adds a check for this property in the MachineVerifier and adds it where it was missing. This includes refactorings to use MachineInstrBuilder construction functions instead of manually setting up the intrinsic everywhere. Patch by: JesperAntonsson Reviewers: aprantl, rnk, echristo, javed.absar Reviewed By: aprantl Subscribers: qcolombet, sdardis, nemanjai, JDevlieghere, atanasyan, llvm-commits Differential Revision: https://reviews.llvm.org/D48319 llvm-svn: 335214
2018-06-21 18:03:34 +08:00
; CHECK: DBG_VALUE debug-use $eax
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
; CHECK: $eax = SHL32rCL killed renamable $eax
[DebugInfo] Make sure all DBG_VALUEs' reguse operands have IsDebug property Summary: In some cases, these operands lacked the IsDebug property, which is meant to signal that they should not affect codegen. This patch adds a check for this property in the MachineVerifier and adds it where it was missing. This includes refactorings to use MachineInstrBuilder construction functions instead of manually setting up the intrinsic everywhere. Patch by: JesperAntonsson Reviewers: aprantl, rnk, echristo, javed.absar Reviewed By: aprantl Subscribers: qcolombet, sdardis, nemanjai, JDevlieghere, atanasyan, llvm-commits Differential Revision: https://reviews.llvm.org/D48319 llvm-svn: 335214
2018-06-21 18:03:34 +08:00
; CHECK: DBG_VALUE debug-use $eax
; CHECK: DBG_VALUE debug-use $rsp, 0, !{{[0-9]+}}, !DIExpression(DW_OP_constu, 4, DW_OP_minus)
; CHECK: DBG_VALUE debug-use $eax
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
; CHECK: $eax = SHL32rCL killed renamable $eax
[DebugInfo] Make sure all DBG_VALUEs' reguse operands have IsDebug property Summary: In some cases, these operands lacked the IsDebug property, which is meant to signal that they should not affect codegen. This patch adds a check for this property in the MachineVerifier and adds it where it was missing. This includes refactorings to use MachineInstrBuilder construction functions instead of manually setting up the intrinsic everywhere. Patch by: JesperAntonsson Reviewers: aprantl, rnk, echristo, javed.absar Reviewed By: aprantl Subscribers: qcolombet, sdardis, nemanjai, JDevlieghere, atanasyan, llvm-commits Differential Revision: https://reviews.llvm.org/D48319 llvm-svn: 335214
2018-06-21 18:03:34 +08:00
; CHECK: DBG_VALUE debug-use $eax
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
; CHECK: RETQ $eax
[DebugInfo] Insert DEBUG_VALUEs after each register redefinition Summary: When reinserting debug values after register allocation, make sure to insert debug values after each redefinition of debug value register in the slot index range. The reason for this is that DwarfDebug will end the range of a debug variable when the physical reg is defined. For instructions with e.g. tied operands this result in prematurely ended debug range. This resolves pr34545 Patch by Karl-Johan Karlsson and Bjorn Pettersson Reviewers: rnk, aprantl Reviewed By: rnk Subscribers: bjope, llvm-commits Differential Revision: https://reviews.llvm.org/D38229 llvm-svn: 314974
2017-10-05 16:37:31 +08:00
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@var = local_unnamed_addr global i32 8, !dbg !0
@sc = local_unnamed_addr global i32 1, !dbg !6
define i32 @main() local_unnamed_addr !dbg !14 {
entry:
%0 = load i32, i32* @var
tail call void @llvm.dbg.value(metadata i32 %0, metadata !18, metadata !DIExpression()), !dbg !20
%1 = load i32, i32* @sc
%shl = shl i32 %0, %1
tail call void @llvm.dbg.value(metadata i32 %shl, metadata !18, metadata !DIExpression()), !dbg !20
tail call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{dirflag},~{fpsr},~{flags}"(), !srcloc !25
%2 = load i32, i32* @sc
%shl2 = shl i32 %shl, %2
tail call void @llvm.dbg.value(metadata i32 %shl2, metadata !18, metadata !DIExpression()), !dbg !20
store i32 %shl2, i32* @var
ret i32 %shl2
}
declare void @llvm.dbg.value(metadata, metadata, metadata)
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!10, !11, !12}
!0 = !DIGlobalVariableExpression(var: !1, expr: !DIExpression())
!1 = distinct !DIGlobalVariable(name: "var", scope: !2, file: !3, line: 10, type: !9, isLocal: false, isDefinition: true)
!2 = distinct !DICompileUnit(language: DW_LANG_C99, file: !3, producer: "clang version 6.0.0", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !4, globals: !5)
!3 = !DIFile(filename: "bar.c", directory: ".")
!4 = !{}
!5 = !{!0, !6}
!6 = !DIGlobalVariableExpression(var: !7, expr: !DIExpression())
!7 = distinct !DIGlobalVariable(name: "sc", scope: !2, file: !3, line: 11, type: !8, isLocal: false, isDefinition: true)
!8 = !DIBasicType(name: "unsigned int", size: 32, encoding: DW_ATE_unsigned)
!9 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
!10 = !{i32 2, !"Dwarf Version", i32 4}
!11 = !{i32 2, !"Debug Info Version", i32 3}
!12 = !{i32 1, !"wchar_size", i32 4}
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. In order to set breakpoints on labels and list source code around labels, we need collect debug information for labels, i.e., label name, the function label belong, line number in the file, and the address label located. In order to keep these information in LLVM IR and to allow backend to generate debug information correctly. We create a new kind of metadata for labels, DILabel. The format of DILabel is !DILabel(scope: !1, name: "foo", file: !2, line: 3) We hope to keep debug information as much as possible even the code is optimized. So, we create a new kind of intrinsic for label metadata to avoid the metadata is eliminated with basic block. The intrinsic will keep existing if we keep it from optimized out. The format of the intrinsic is llvm.dbg.label(metadata !1) It has only one argument, that is the DILabel metadata. The intrinsic will follow the label immediately. Backend could get the label metadata through the intrinsic's parameter. We also create DIBuilder API for labels to be used by Frontend. Frontend could use createLabel() to allocate DILabel objects, and use insertLabel() to insert llvm.dbg.label intrinsic in LLVM IR. Differential Revision: https://reviews.llvm.org/D45024 Patch by Hsiangkai Wang. llvm-svn: 331841
2018-05-09 10:40:45 +08:00
!14 = distinct !DISubprogram(name: "main", scope: !3, file: !3, line: 12, type: !15, isLocal: false, isDefinition: true, scopeLine: 12, isOptimized: true, unit: !2, retainedNodes: !17)
[DebugInfo] Insert DEBUG_VALUEs after each register redefinition Summary: When reinserting debug values after register allocation, make sure to insert debug values after each redefinition of debug value register in the slot index range. The reason for this is that DwarfDebug will end the range of a debug variable when the physical reg is defined. For instructions with e.g. tied operands this result in prematurely ended debug range. This resolves pr34545 Patch by Karl-Johan Karlsson and Bjorn Pettersson Reviewers: rnk, aprantl Reviewed By: rnk Subscribers: bjope, llvm-commits Differential Revision: https://reviews.llvm.org/D38229 llvm-svn: 314974
2017-10-05 16:37:31 +08:00
!15 = !DISubroutineType(types: !16)
!16 = !{!9}
!17 = !{!18}
!18 = !DILocalVariable(name: "bazinga", scope: !14, file: !3, line: 13, type: !9)
!20 = !DILocation(line: 13, column: 7, scope: !14)
!25 = !{i32 -2147471481}