2018-05-13 07:14:39 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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2018-06-03 03:43:14 +08:00
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; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,SSE
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; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
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; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
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2018-05-13 07:14:39 +08:00
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define <2 x double> @test_x86_sse2_cvtsi642sd(<2 x double> %a0, i64 %a1) {
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; SSE-LABEL: test_x86_sse2_cvtsi642sd:
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; SSE: ## %bb.0:
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; SSE-NEXT: cvtsi2sdq %rdi, %xmm0 ## encoding: [0xf2,0x48,0x0f,0x2a,0xc7]
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; SSE-NEXT: retq ## encoding: [0xc3]
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;
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2018-06-03 03:43:14 +08:00
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; AVX1-LABEL: test_x86_sse2_cvtsi642sd:
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; AVX1: ## %bb.0:
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; AVX1-NEXT: vcvtsi2sdq %rdi, %xmm0, %xmm0 ## encoding: [0xc4,0xe1,0xfb,0x2a,0xc7]
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; AVX1-NEXT: retq ## encoding: [0xc3]
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2018-05-13 07:14:39 +08:00
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;
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2018-06-03 03:43:14 +08:00
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; AVX512-LABEL: test_x86_sse2_cvtsi642sd:
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; AVX512: ## %bb.0:
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; AVX512-NEXT: vcvtsi2sdq %rdi, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc4,0xe1,0xfb,0x2a,0xc7]
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; AVX512-NEXT: retq ## encoding: [0xc3]
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2018-05-13 07:14:39 +08:00
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%res = call <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double> %a0, i64 %a1) ; <<2 x double>> [#uses=1]
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ret <2 x double> %res
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}
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declare <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double>, i64) nounwind readnone
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