forked from OSchip/llvm-project
78 lines
2.7 KiB
LLVM
78 lines
2.7 KiB
LLVM
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; RUN: llc --force-dwarf-frame-section %s -o - | FileCheck %s
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target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
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target triple = "thumbv8.1m.main-arm-none-eabi"
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%"struct.std::__va_list" = type { i8* }
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define hidden i32 @_Z1fiz(i32 %n, ...) local_unnamed_addr #0 {
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entry:
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%ap = alloca %"struct.std::__va_list", align 4
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%0 = bitcast %"struct.std::__va_list"* %ap to i8*
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call void @llvm.va_start(i8* nonnull %0)
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%cmp7 = icmp sgt i32 %n, 0
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br i1 %cmp7, label %for.body.lr.ph, label %for.cond.cleanup
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for.body.lr.ph: ; preds = %entry
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%1 = getelementptr inbounds %"struct.std::__va_list", %"struct.std::__va_list"* %ap, i32 0, i32 0
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%argp.cur.pre = load i8*, i8** %1, align 4
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br label %for.body
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for.cond.cleanup: ; preds = %for.body, %entry
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%s.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ]
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call void @llvm.va_end(i8* nonnull %0)
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ret i32 %s.0.lcssa
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for.body: ; preds = %for.body.lr.ph, %for.body
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%argp.cur = phi i8* [ %argp.cur.pre, %for.body.lr.ph ], [ %argp.next, %for.body ]
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%i.09 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
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%s.08 = phi i32 [ 0, %for.body.lr.ph ], [ %add, %for.body ]
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%argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 4
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store i8* %argp.next, i8** %1, align 4
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%2 = bitcast i8* %argp.cur to i32*
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%3 = load i32, i32* %2, align 4
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%add = add nsw i32 %3, %s.08
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%inc = add nuw nsw i32 %i.09, 1
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%exitcond.not = icmp eq i32 %inc, %n
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
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}
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; CHECK-LABEL: _Z1fiz:
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; CHECK: pac r12, lr, sp
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; CHECK-NEXT: .pad #12
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; CHECK-NEXT: sub sp, #12
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; CHECK-NEXT: .cfi_def_cfa_offset 12
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; CHECK-NEXT: .save {r7, lr}
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; CHECK-NEXT: push {r7, lr}
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; CHECK-NEXT: .cfi_def_cfa_offset 20
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; CHECK-NEXT: .cfi_offset lr, -16
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; CHECK-NEXT: .cfi_offset r7, -20
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; CHECK-NEXT: .save {ra_auth_code}
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; CHECK-NEXT: str r12, [sp, #-4]!
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; CHECK-NEXT: .cfi_def_cfa_offset 24
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; CHECK-NEXT: .cfi_offset ra_auth_code, -24
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; CHECK-NEXT: .pad #4
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; CHECK-NEXT: sub sp, #4
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; CHECK-NEXT: .cfi_def_cfa_offset 28
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; ...
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; CHECK: add.w r[[N:[0-9]*]], sp, #16
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; CHECK: stm.w r[[N]], {r1, r2, r3}
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; ...
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; CHECK: add sp, #4
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; CHECK-NEXT: ldr r12, [sp], #4
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; CHECK-NEXT: pop.w {r7, lr}
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; CHECK-NEXT: add sp, #12
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; CHECK-NEXT: aut r12, lr, sp
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; CHECK-NEXT: bx lr
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declare void @llvm.va_start(i8*) #1
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declare void @llvm.va_end(i8*) #1
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attributes #0 = { nounwind optsize}
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attributes #1 = { nounwind }
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!llvm.module.flags = !{!0, !1, !2}
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!0 = !{i32 1, !"branch-target-enforcement", i32 0}
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!1 = !{i32 1, !"sign-return-address", i32 1}
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!2 = !{i32 1, !"sign-return-address-all", i32 0}
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