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llvm-project/llvm/test/CodeGen/Thumb2/thumb2-sxt_rot.ll

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ARM: yet another round of ARM test clean ups llvm-svn: 205586
2014-04-04 07:47:24 +08:00
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk %s -o - \
; RUN: | FileCheck %s
Add thumb2 sign / zero extend with rotate instructions. llvm-svn: 74755
2009-07-03 09:43:10 +08:00
define i32 @test0(i8 %A) {
Convert to FileCheck llvm-svn: 89002
2009-11-17 08:03:38 +08:00
; CHECK: test0
; CHECK: sxtb r0, r0
Add thumb2 sign / zero extend with rotate instructions. llvm-svn: 74755
2009-07-03 09:43:10 +08:00
%B = sext i8 %A to i32
ret i32 %B
}
manually upgrade a bunch of tests to modern syntax, and remove some that are either unreduced or only test old syntax. llvm-svn: 133228
2011-06-17 11:14:27 +08:00
define signext i8 @test1(i32 %A) {
Convert to FileCheck llvm-svn: 89002
2009-11-17 08:03:38 +08:00
; CHECK: test1
[SDAG] Make the DAGCombine worklist not grow endlessly due to duplicate insertions. The old behavior could cause arbitrarily bad memory usage in the DAG combiner if there was heavy traffic of adding nodes already on the worklist to it. This commit switches the DAG combine worklist to work the same way as the instcombine worklist where we null-out removed entries and only add new entries to the worklist. My measurements of codegen time shows slight improvement. The memory utilization is unsurprisingly dominated by other factors (the IR and DAG itself I suspect). This change results in subtle, frustrating churn in the particular order in which DAG combines are applied which causes a number of minor regressions where we fail to match a pattern previously matched by accident. AFAICT, all of these should be using AddToWorklist to directly or should be written in a less brittle way. None of the changes seem drastically bad, and a few of the changes seem distinctly better. A major change required to make this work is to significantly harden the way in which the DAG combiner handle nodes which become dead (zero-uses). Previously, we relied on the ability to "priority-bump" them on the combine worklist to achieve recursive deletion of these nodes and ensure that the frontier of remaining live nodes all were added to the worklist. Instead, I've introduced a routine to just implement that precise logic with no indirection. It is a significantly simpler operation than that of the combiner worklist proper. I suspect this will also fix some other problems with the combiner. I think the x86 changes are really minor and uninteresting, but the avx512 change at least is hiding a "regression" (despite the test case being just noise, not testing some performance invariant) that might be looked into. Not sure if any of the others impact specific "important" code paths, but they didn't look terribly interesting to me, or the changes were really minor. The consensus in review is to fix any regressions that show up after the fact here. Thanks to the other reviewers for checking the output on other architectures. There is a specific regression on ARM that Tim already has a fix prepped to commit. Differential Revision: http://reviews.llvm.org/D4616 llvm-svn: 213727
2014-07-23 15:08:53 +08:00
; CHECK: lsrs r0, r0, #8
; CHECK: sxtb r0, r0
Add thumb2 sign / zero extend with rotate instructions. llvm-svn: 74755
2009-07-03 09:43:10 +08:00
%B = lshr i32 %A, 8
%C = shl i32 %A, 24
%D = or i32 %B, %C
%E = trunc i32 %D to i8
ret i8 %E
}
manually upgrade a bunch of tests to modern syntax, and remove some that are either unreduced or only test old syntax. llvm-svn: 133228
2011-06-17 11:14:27 +08:00
define signext i32 @test2(i32 %A, i32 %X) {
Convert to FileCheck llvm-svn: 89002
2009-11-17 08:03:38 +08:00
; CHECK: test2
; CHECK: lsrs r0, r0, #8
; CHECK: sxtab r0, r1, r0
Add thumb2 sign / zero extend with rotate instructions. llvm-svn: 74755
2009-07-03 09:43:10 +08:00
%B = lshr i32 %A, 8
%C = shl i32 %A, 24
%D = or i32 %B, %C
%E = trunc i32 %D to i8
%F = sext i8 %E to i32
%G = add i32 %F, %X
ret i32 %G
}